- 61c2937 Updating the shuttle_url value in `info.yaml` file. by Tim 'mithro' Ansell · 1 year, 11 months ago main
- 53199a8 final gds & signoff results by Jeff DiCorpo · 2 years, 11 months ago
- b3e5898 final gds oasis by Jeff DiCorpo · 2 years, 11 months ago
- f4e6684 final gds & signoff results by Jeff DiCorpo · 2 years, 11 months ago
- bed6f01 final gds oasis by Jeff DiCorpo · 2 years, 11 months ago
- 8e996cf final gds & signoff results by Jeff DiCorpo · 3 years ago
- 2341ce7 final gds oasis by Jeff DiCorpo · 3 years ago
- a1a2045 final gds & signoff results by Jeff DiCorpo · 3 years ago
- 8d48927 final gds oasis by Jeff DiCorpo · 3 years ago
- 637418b final gds & signoff results by Jeff DiCorpo · 3 years ago
- 2c4537e final gds oasis by Jeff DiCorpo · 3 years ago
- 0713bef final gds & signoff results by Jeff DiCorpo · 3 years ago
- 077e7f9 final gds oasis by Jeff DiCorpo · 3 years ago
- 14f0f87 final gds & signoff results by Jeff DiCorpo · 3 years ago
- 29c4c15 final gds oasis by Jeff DiCorpo · 3 years ago
- 6567a5c final gds & signoff results by Jeff DiCorpo · 3 years ago
- 676b347 final gds oasis by Jeff DiCorpo · 3 years ago
- 6df99cb tapeout.log by Jeff DiCorpo · 3 years, 2 months ago
- b6b2979 update oasis file by Jeff DiCorpo · 3 years, 2 months ago
- b31da3d final gds & signoff results by Jeff DiCorpo · 3 years, 4 months ago
- bd41451 final gds oasis by Jeff DiCorpo · 3 years, 4 months ago
- d195f8e update gds for drc violations by Jesse Cirimelli-Low · 3 years, 4 months ago
- 0504986 Fix README sizes by mrg · 3 years, 4 months ago master
- a5189a7 Add authors to README by mrg · 3 years, 4 months ago
- 2a92077 Edit README with correct memories by mrg · 3 years, 4 months ago
- c67e6c6 DRC in single ports fixed. by mrg · 3 years, 4 months ago
- de193bc Fixed final gds merge by mrg · 3 years, 4 months ago
- 2cda10b Final design by mrg · 3 years, 4 months ago
- 9c8b600 Sp macros by mrg · 3 years, 5 months ago
- cfead8e Update with new single port macros by mrg · 3 years, 5 months ago
- 16df1c4 Assign spare din/dout signals by mrg · 3 years, 5 months ago
- cca8635 Remove wmask as bus by mrg · 3 years, 5 months ago
- 2f90459 Merge branch 'main' of github.com:AmoghLonkar/openram_testchip into main by mrg · 3 years, 5 months ago
- 9150950 Updates... by mrg · 3 years, 5 months ago
- 201fac9 Removed extra write to address 2 by AmoghLonkar · 3 years, 5 months ago
- 7657e52 Works for all memories by AmoghLonkar · 3 years, 5 months ago
- 93a84d7 Dual port memories work properly by AmoghLonkar · 3 years, 5 months ago
- 4433376 Correct setup, debug incorrect byte value by AmoghLonkar · 3 years, 5 months ago
- b30333e Make checks consistent with gpio test by AmoghLonkar · 3 years, 5 months ago
- ca8c347 la_test.c by AmoghLonkar · 3 years, 5 months ago
- ea79ae3 Updated description to match LA test by AmoghLonkar · 3 years, 5 months ago
- fd29518 Interacted with each SRAM, test la_out pin values by AmoghLonkar · 3 years, 5 months ago
- ce25d7a Properly writes, reads and replaces din with correct dout by AmoghLonkar · 3 years, 5 months ago
- 33eab50 Writes correctly to SRAM 0 by AmoghLonkar · 3 years, 5 months ago
- b6ecf06 Moved xfer up, can see proper delays now by AmoghLonkar · 3 years, 5 months ago
- ae1a45f Only use single pin to signal start and end by AmoghLonkar · 3 years, 5 months ago
- d945632 Test now starts and terminates by AmoghLonkar · 3 years, 5 months ago
- ee86546 Revert to original by AmoghLonkar · 3 years, 5 months ago
- e1eed46 Fixed reg_mprj_data, doesn't timeout anymore by AmoghLonkar · 3 years, 5 months ago
- 73a59cc Add gpio_clk back and it is sync with clock by mrg · 3 years, 5 months ago
- 8411fd2 Debugged la_test clock error by mrg · 3 years, 5 months ago
- 0306794 Cleanup gpio_test_tb by mrg · 3 years, 5 months ago
- abe0289 Restrict data to < 8bits for SRAM0 by mrg · 3 years, 5 months ago
- 18d2c0e Fix SRAM11 64-bit errors. by mrg · 3 years, 5 months ago
- 180a052 Fix sram load with extra cycle by mrg · 3 years, 5 months ago
- e0af871 Deassert gpio_sram_load by mrg · 3 years, 5 months ago
- 1574e7b Add error when read mismatch by mrg · 3 years, 5 months ago
- 7690a5f Use some different data by mrg · 3 years, 5 months ago
- f5e29db Write tasks for write and read by mrg · 3 years, 5 months ago
- 68cc0a9 Add signal from mgmt to start testing by mrg · 3 years, 5 months ago
- 785acbf Update memory macros to have unique names by mrg · 3 years, 5 months ago
- 1e29eda Merge branch 'main' of github.com:AmoghLonkar/openram_testchip into main by mrg · 3 years, 5 months ago
- be1762c Merge branch 'main' of github.com:AmoghLonkar/openram_testchip into main by mrg · 3 years, 5 months ago
- 261bdc5 Added output display by AmoghLonkar · 3 years, 5 months ago
- 80511b3 Final run for precheck by mrg · 3 years, 5 months ago
- 307b86c Final run for precheck by mrg · 3 years, 5 months ago
- 0f01622 Final run for precheck by mrg · 3 years, 5 months ago
- 2cb8c08 Merge branch 'main' of https://github.com/AmoghLonkar/openram_testchip into main by AmoghLonkar · 3 years, 5 months ago
- 383e94b Removed asserts by AmoghLonkar · 3 years, 5 months ago
- bac364d Merge branch 'main' of github.com:AmoghLonkar/openram_testchip into main by mrg · 3 years, 5 months ago
- c79b1ec Latest LA test by mrg · 3 years, 5 months ago
- 785473b Added tests for single port memories. Assert causing errors but still running tests by AmoghLonkar · 3 years, 5 months ago
- 1450be6 Add initial la test by mrg · 3 years, 5 months ago
- 319d6ed Add initial la test skeleton by mrg · 3 years, 5 months ago
- 1339831 Update gpio test by mrg · 3 years, 5 months ago
- c9fb6b0 Make LA reset and cs active high for reset by mrg · 3 years, 5 months ago
- dfe137d Make LA reset and cs active high for reset by mrg · 3 years, 5 months ago
- 0145b27 Use LA for reset too by mrg · 3 years, 5 months ago
- 9184a51 Update latest version by mrg · 3 years, 5 months ago
- 5a6aee0 Merge branch 'main' of https://github.com/AmoghLonkar/openram_testchip into main by AmoghLonkar · 3 years, 5 months ago
- 3baac70 Correct input scanning by AmoghLonkar · 3 years, 5 months ago
- 9377327 Adding makefile by AmoghLonkar · 3 years, 5 months ago
- f0bd15b update README by mrg · 3 years, 5 months ago
- 71dedcd Merge branch 'main' of https://github.com/AmoghLonkar/openram_testchip into main by AmoghLonkar · 3 years, 5 months ago
- 38954f1 Up to date tb model by AmoghLonkar · 3 years, 5 months ago
- 6a1c098 Can communicate with SRAMs now by AmoghLonkar · 3 years, 5 months ago
- a6be5e0 Modified pin declarations by AmoghLonkar · 3 years, 5 months ago
- 8b8d027 Removed unused gpio sram clk port by AmoghLonkar · 3 years, 5 months ago
- e988856 Update SP SRAMs to have spare_wen0 by mrg · 3 years, 5 months ago
- 1946164 Cleanup by mrg · 3 years, 5 months ago
- 2ff0e70 Code cleanup by mrg · 3 years, 5 months ago
- 2d08cd6 Compiles without error by AmoghLonkar · 3 years, 5 months ago
- d07f5ba Merge branch 'main' of https://github.com/AmoghLonkar/openram_testchip into main by AmoghLonkar · 3 years, 5 months ago
- 662b8ad Removed left and right addr0, etc by AmoghLonkar · 3 years, 5 months ago
- 2e70f51 Resolved compile errors by AmoghLonkar · 3 years, 5 months ago
- 328535d Fix missing gpio_in by mrg · 3 years, 5 months ago
- ad78217 Change csr to csb by mrg · 3 years, 5 months ago
- fc1a774 Merge branch 'main' of https://github.com/AmoghLonkar/openram_testchip into main by AmoghLonkar · 3 years, 5 months ago
- a522bcc Figure out how to send signal over pin by AmoghLonkar · 3 years, 5 months ago
- 4a0200e Remove left/right separate pins by mrg · 3 years, 5 months ago