commit | b30333eb69902a92ccb1165778856269baacd1ea | [log] [tgz] |
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author | AmoghLonkar <alonkar@ucsc.edu> | Mon Jun 28 08:34:21 2021 -0700 |
committer | AmoghLonkar <alonkar@ucsc.edu> | Mon Jun 28 08:34:21 2021 -0700 |
tree | 1a65ed4cb862138a696a7e3c9c01690d7935e5ce | |
parent | ca8c34714930a83edaf1aed07e3f708d028144ea [diff] |
Make checks consistent with gpio test
:exclamation: Important Note |
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This project contains a test chip for several OpenRAM memory configurations. The configurations have varying levels of verification. In particular, it has these sizes:
There are two test modes available. Each one inputs an packet that configures the read and write operations of a particular SRAM. The GPIO pin io_in[16] determines whether to use GPIO (1) or LA mode (0).
The test packet is a 112-bit value that has the follow signals and bit size:
During a read operation, the din bits are replaced with the data output bits so that they can be verified.
Note: The 64-bit memory leaves the middle 32-bits as a value of 0 and instead reads/writes the upper and lower 16-bits to reduce the number of packet bits.
In GPIO mode, the test packet is scanned in/out with the GPIO pins in 112 cycles. The GPIO pins used are as follows:
In LA mode, the test packet is directly written from the output of the 128-bit LA. The top bits of the LA register are used for the control signals during test: