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foss-eda-tools
/
third_party
/
shuttle
/
sky130
/
mpw-002
/
slot-009
/
2ff0e708301352793a6067ed209e4b71fa1368ca
commit
2ff0e708301352793a6067ed209e4b71fa1368ca
[
log
]
author
mrg <mrg@ucsc.edu>
Thu Jun 17 20:10:54 2021 -0700
committer
mrg <mrg@ucsc.edu>
Thu Jun 17 20:10:54 2021 -0700
tree
39a5bc20135567cd46e68fdd80fea41e07b203a8
parent
328535ddf6f75a5eff359e00df136a97e734e325
[
diff
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Code cleanup
verilog/rtl/openram_defines.v
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diff
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verilog/rtl/openram_testchip.v
[
diff
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verilog/rtl/user_project_wrapper.v
[
diff
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3 files changed
tree: 39a5bc20135567cd46e68fdd80fea41e07b203a8
.github/
def/
docs/
gds/
lef/
mag/
maglef/
openlane/
signoff/
single_port/
spi/
verilog/
caravel
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.gitmodules
info.yaml
LICENSE
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README.md
README.md
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