commit | 268eea7f7faa70bd2b2b9da3909001606a930f16 | [log] [tgz] |
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author | Kevin Kelley <kevin.kelley@skywatertechnology.com> | Wed May 06 11:01:00 2020 +0700 |
committer | Kevin Kelley <kevin.kelley@skywatertechnology.com> | Wed May 06 11:01:00 2020 +0700 |
tree | ebf9a6a0a01ee9d79bbf50ba475ce5701f405998 | |
parent | d82def7d80c8fd4ef3691bec6cde1a16867af8db [diff] |
Significant improvements to library sky130_fd_sc_hdll version 0.1.0. This commit contains major improvements to all files by regenerating from original data, improving consistency and automated cross checking of data. These improvements should drastically reduce customer confusion when using the library and further reduce future possibility for human errors to creep into designs. Notable improvements include; * A large number of files have been regenerated from original source data including most liberty timing files and spice simulation models (compared to previous hand created versions). * Catalog and other library aggregations are now automatically generated from library contents (compared to previous hand created versions). * Significant improvements to documentation for all cells, including producing graphical representations, verified metadata and descriptions. * Names have been cross referenced between file types (such as simulation, layout, schematic and timing) and now verified to match. * Names have been improved to fix a standard format across all supported libraries and PDK contents. * Significant improvements to the contents of text files (like the verilog files) through improving consistent style that has been automatically checked. * Simplified verilog files for usage with open tools, including new black box stubs have been created. * Too many numerous other changes to list here. Signed-off-by: Kevin Kelley <kevin.kelley@skywatertechnology.com>