| { | |
| "area": 11.2608, | |
| "cell_footprint": "a22o", | |
| "cell_leakage_power": 0.01183862, | |
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| "value": 0.0006892, | |
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| }, | |
| { | |
| "value": 0.0006816, | |
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| }, | |
| { | |
| "value": 0.0007813, | |
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| }, | |
| { | |
| "value": 0.0006815, | |
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| }, | |
| { | |
| "value": 0.0006998, | |
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| }, | |
| { | |
| "value": 0.0006912, | |
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| }, | |
| { | |
| "value": 0.0007818, | |
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| }, | |
| { | |
| "value": 0.0007, | |
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| }, | |
| { | |
| "value": 0.0007093, | |
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| }, | |
| { | |
| "value": 0.177411, | |
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| }, | |
| { | |
| "value": 0.0007818, | |
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| }, | |
| { | |
| "value": 0.0029194, | |
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| }, | |
| { | |
| "value": 0.0004731, | |
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| }, | |
| { | |
| "value": 0.0001413, | |
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| }, | |
| { | |
| "value": 0.0008025, | |
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| }, | |
| { | |
| "value": 0.000473, | |
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| } | |
| ], | |
| "pg_pin VGND": { | |
| "pg_type": "primary_ground", | |
| "related_bias_pin": "VNB", | |
| "voltage_name": "VGND" | |
| }, | |
| "pg_pin VNB": { | |
| "pg_type": "pwell", | |
| "voltage_name": "VNB" | |
| }, | |
| "pg_pin VPB": { | |
| "pg_type": "nwell", | |
| "voltage_name": "VPB" | |
| }, | |
| "pg_pin VPWR": { | |
| "pg_type": "primary_power", | |
| "related_bias_pin": "VPB", | |
| "voltage_name": "VPWR" | |
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| 0.01, | |
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| 0.650743, | |
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| 0.0041202 | |
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| "related_ground_pin": "VGND", | |
| "related_power_pin": "VPWR", | |
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| 0.003454, | |
| 0.0034124 | |
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| "rise_power power_inputs_1": { | |
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| }, | |
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| }, | |
| "pin B1": { | |
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| "fall_capacitance": 0.00212, | |
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| "fall_power power_inputs_1": { | |
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| 0.01, | |
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| 0.0531329, | |
| 0.122474, | |
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| "values": [ | |
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| 0.0038239, | |
| 0.0038426, | |
| 0.0038859 | |
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| "rise_power power_inputs_1": { | |
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| }, | |
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| }, | |
| "pin B2": { | |
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| "fall_capacitance": 0.002053, | |
| "internal_power": { | |
| "fall_power power_inputs_1": { | |
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| 0.01, | |
| 0.0230506, | |
| 0.0531329, | |
| 0.122474, | |
| 0.282311, | |
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| 0.0032298, | |
| 0.0032125 | |
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| "rise_power power_inputs_1": { | |
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| 0.01, | |
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| 0.0531329, | |
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| 0.282311, | |
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| }, | |
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| "related_ground_pin": "VGND", | |
| "related_power_pin": "VPWR", | |
| "rise_capacitance": 0.002447 | |
| }, | |
| "pin X": { | |
| "direction": "output", | |
| "function": "(B1&B2) | (A1&A2)", | |
| "internal_power": [ | |
| { | |
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| [ | |
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| [ | |
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| [ | |
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| [ | |
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| [ | |
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| ] | |
| }, | |
| "related_pin": "A1", | |
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| [ | |
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| [ | |
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| [ | |
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| }, | |
| "when": "(A2&!B1&!B2)" | |
| }, | |
| { | |
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| [ | |
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| ] | |
| }, | |
| "related_pin": "A1", | |
| "rise_power power_outputs_1": { | |
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| }, | |
| "when": "(A2&!B1&B2)" | |
| }, | |
| { | |
| "fall_power power_outputs_1": { | |
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| "related_pin": "A1", | |
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