| { |
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| "cell_footprint": "nor4bb", |
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| { |
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| { |
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| }, |
| { |
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| }, |
| { |
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| { |
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| { |
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| { |
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| { |
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| { |
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| { |
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| }, |
| { |
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| { |
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| { |
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| { |
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| { |
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| "pg_pin VGND": { |
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| "related_bias_pin": "VNB", |
| "voltage_name": "VGND" |
| }, |
| "pg_pin VNB": { |
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| "pg_pin VPB": { |
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| "voltage_name": "VPB" |
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| }, |
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| 0.0230506, |
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| }, |
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| "clock": "false", |
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| "related_power_pin": "VPWR", |
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| }, |
| "pin Y": { |
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| "function": "(!A&!B&C_N&D_N)", |
| "internal_power": [ |
| { |
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| ] |
| }, |
| "related_pin": "A", |
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| 0.122474, |
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| }, |
| { |
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| }, |
| "related_pin": "B", |
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| 0.0308089, |
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| }, |
| { |
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| }, |
| "related_pin": "C_N", |
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