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foss-eda-tools/third_party/shuttle/sky130/mpw-002/slot-038/HEAD
  1. 046281b Updating the shuttle_url value in `info.yaml` file. by Tim 'mithro' Ansell · 3 years, 10 months ago main
  2. 311dad9 final gds & signoff results by Jeff DiCorpo · 4 years, 10 months ago
  3. 58e55fc final gds oasis by Jeff DiCorpo · 4 years, 10 months ago
  4. f8b6f78 final gds & signoff results by Jeff DiCorpo · 4 years, 10 months ago
  5. b4dd0ae final gds oasis by Jeff DiCorpo · 4 years, 10 months ago
  6. c629229 final gds & signoff results by Jeff DiCorpo · 4 years, 11 months ago
  7. 0191f47 final gds oasis by Jeff DiCorpo · 4 years, 11 months ago
  8. 10a050e final gds & signoff results by Jeff DiCorpo · 4 years, 11 months ago
  9. c5dcf95 final gds oasis by Jeff DiCorpo · 4 years, 11 months ago
  10. 95d624c final gds & signoff results by Jeff DiCorpo · 4 years, 11 months ago
  11. a4ee9bb final gds oasis by Jeff DiCorpo · 4 years, 11 months ago
  12. 7b2c51e final gds & signoff results by Jeff DiCorpo · 4 years, 11 months ago
  13. 780b264 final gds oasis by Jeff DiCorpo · 4 years, 11 months ago
  14. fc8722f tapeout.log by Jeff DiCorpo · 5 years ago
  15. 9d885d2 final gds oasis by Jeff DiCorpo · 5 years ago
  16. 9621e8d final gds & signoff results by Jeff DiCorpo · 5 years ago
  17. 56b8add final gds oasis by Jeff DiCorpo · 5 years ago
  18. ed2714c final gds & signoff results by Jeff DiCorpo · 5 years ago
  19. 4256705 final gds & signoff results by Jeff DiCorpo · 5 years ago
  20. c0eb08e final gds & signoff results by Jeff DiCorpo · 5 years ago
  21. a6c0c41 updating ./signoff by Jeff DiCorpo · 5 years ago
  22. 57844d2 adding ./signoff/tapeout.log by Jeff DiCorpo · 5 years ago
  23. 0935d1c final gds & signoff results by Jeff DiCorpo · 5 years ago
  24. 3c651aa final gds oasis by Jeff DiCorpo · 5 years ago
  25. 0c1b263 update README by Mariano Alvira · 5 years ago
  26. 4300a9d adding .gds. This passes all the prechecks. by Mariano Alvira · 5 years ago
  27. 4fb4901 top level LVS passes. There is a weird bug where xschem subckt ordering in cellA gets messed from the cell to the analog tb. But that's a xschem problem not the layout. by Mariano Alvira · 5 years ago
  28. 4b7b1f9 wrapper level routing complete. will try netgen with a newer version now for pin matching issues. by Mariano Alvira · 5 years ago
  29. 0771409 Placed the sawgen cell and identified output pins. ready for final routing. by Mariano Alvira · 5 years ago
  30. e270658 replace diodes w/ FET and passes LVS if I replace VSUBS -> vss by Mariano Alvira · 5 years ago
  31. 46c1085 Using diode connected fet instead of diodes to avoid buggy LVS problem. This works just as well. Need to redo layout next. by Mariano Alvira · 5 years ago
  32. f150160 This layout is good but fails LVS. Looks like there is a problem with the diode model and LVS. by Mariano Alvira · 5 years ago
  33. 2924d3f sawgen: first cut at layout. could be done. need to LVS / hand inspect a little. by Mariano Alvira · 5 years ago
  34. 73bff3e sawgen: got all the ports sorted out by Mariano Alvira · 5 years ago
  35. 19f2936 initial magic w/ cells pulled in by Mariano Alvira · 5 years ago
  36. e66f60e created a schematic cell and testbench for the sawgen by Mariano Alvira · 5 years ago
  37. 23fa8cd checkpoint: working on making this a cell and testbench by Mariano Alvira · 5 years ago
  38. 902d29b cosmetic change to resistor value label (reduced font size and updated to nominal value) by Mariano Alvira · 5 years ago
  39. eabdb81 This sawgen is good enough. Going to use offchip cap. by Mariano Alvira · 5 years ago
  40. 3f86e97 this "works" but uses 5000x vpp caps. Will try varactor caps and more step down current mirrors... by Mariano Alvira · 5 years ago
  41. 565ace7 added a working FET version of the sawgen. Need to replace the BJT current source with a FET version and translate over to sky130. by Mariano Alvira · 5 years ago
  42. 48437ae got a working bjt version of a saw generator (using 3904 and 3906 models). It isn't great but it "works" by Mariano Alvira · 5 years ago
  43. b594877 add .gds by Mariano Alvira · 5 years ago
  44. 5371abc add compressed gds by Mariano Alvira · 5 years ago
  45. b6939d7 removed unused spice files in netgen by Mariano Alvira · 5 years ago
  46. 2726fff corrected DRC errors. This is DRC clean. by Mariano Alvira · 5 years ago
  47. b486a3b needed to create the .gds manually with magic before running make run-precheck. now the precheck runs. I have a few DRC things to fix. by Mariano Alvira · 5 years ago
  48. 61afc05 added CARAVEL_ROOT to the source.this by Mariano Alvira · 5 years ago
  49. 422aea5 added source.this to setup env by Mariano Alvira · 5 years ago
  50. b6c1060 layout complete and passes LVS. turn off parasitics: extract no capacitance, resistance, coupling. extract all. by Mariano Alvira · 5 years ago
  51. 4464a60 added test resistor .mag by Mariano Alvira · 5 years ago
  52. a4ef6cf added a test resistor to help determin what the fabbed value will be by Mariano Alvira · 5 years ago
  53. b5dbdb2 cell passes LVS. by Mariano Alvira · 5 years ago
  54. 49650f0 progress on layout and ports by Mariano Alvira · 5 years ago
  55. 26c027a indexed ports correctly on the layout. subckt ports match schematic. by Mariano Alvira · 5 years ago
  56. beb4f42 lvs runs now (needed the testbech on the schematic side to get the includes). They don't match. by Mariano Alvira · 5 years ago
  57. c879bef made a layout and named some ports (incorrectly) but extract then ext2spice produces a subckt. lvs isn't running correctly (can't detect the cell in the xschem netlist for some reason) by Mariano Alvira · 5 years ago
  58. 727bf6f pull the test circuit out into a subckt and make a testbench for it. getting ready to layout and lvs just the cell. by Mariano Alvira · 5 years ago
  59. e1877c2 added cellA: a simple common source amplifier w/ 9kOhm resistor load to get started. Gain about 100, rolls off between 1 and 10 GHz. by Mariano Alvira · 5 years ago
  60. 67640ef Auto updated submodule references by Git bot · 5 years ago
  61. c68f39e Updated the documentation to include a description of the power-on-reset by Tim Edwards · 5 years ago
  62. 13f142e Update index.rst by Manar · 5 years ago
  63. 520ff4a Update index.rst by Manar · 5 years ago
  64. a119592 Update index.rst by Manar · 5 years ago
  65. dd3d811 Doc updates by manarabdelaty · 5 years ago
  66. 55c9fff Merge branch 'main' of https://github.com/efabless/caravel_analog_user into main by manarabdelaty · 5 years ago
  67. 9e46db5 Auto updated submodule references by Git bot · 5 years ago
  68. f9e592b Update submodule reference to caravel-lite by manarabdelaty · 5 years ago
  69. 3f75a89 Update Makefile by manarabdelaty · 5 years ago
  70. 206bfb5 Update run-xor.sh by manarabdelaty · 5 years ago
  71. b7fad20 [CI] update run-xor by manarabdelaty · 5 years ago
  72. 9b861b2 Add pattern to dv Makefile and drop obselete openlane wrapper dir by manarabdelaty · 5 years ago
  73. b07e408 Update README.md by Manar · 5 years ago
  74. 7b7b2f6 Update index.rst by Manar · 5 years ago
  75. 722391b Merge branch 'main' of github.com:efabless/caravel_user_project_analog into main by Tim Edwards · 5 years ago
  76. e982ef8 Update README.md by Manar · 5 years ago
  77. 9422266 Modified the wrapper to extend the analog pins out 4um like the rest of by Tim Edwards · 5 years ago
  78. 1f15094 [CI] Add github workflows for running the precheck/dv/caravan_build by manarabdelaty · 5 years ago
  79. a1553af Add docs dir by manarabdelaty · 5 years ago
  80. 892f0d2 Update Makefile by manarabdelaty · 5 years ago
  81. ff42add Update info.yaml to have the user_level_netlist point to the rtl netlist by manarabdelaty · 5 years ago
  82. 35111e9 Corrected ngspice testbenches for change in the name of the parameter by Tim Edwards · 5 years ago
  83. dba051e Modifications to the wrapper testbench schematic (not quite working by Tim Edwards · 5 years ago
  84. 5cc020d Added xschem schematic and symbol for the analog project wrapper, and a by Tim Edwards · 5 years ago
  85. a26abdd Redid the layout for the example analog project based on the updated by Tim Edwards · 5 years ago
  86. 60e4dcb Update Makefile by manarabdelaty · 5 years ago
  87. 8a1d5f2 Corrected the info.yaml file to point to the caravan.v file as the by Tim Edwards · 5 years ago
  88. 6bb2165 Added layout for the user_analog_project_wrapper example. by Tim Edwards · 5 years ago
  89. 5ea70cb Changed the schematics so that the resistor does not set a W by Tim Edwards · 5 years ago
  90. 796099e Corrected the schematic for the proper orientation of the topmost by Tim Edwards · 5 years ago
  91. dfc24ad Added xschem schematic of the POR and testbench simulations and results. by Tim Edwards · 5 years ago
  92. fb13001 Simple layout, unwired (needs modifications to the project wrapper) by Tim Edwards · 5 years ago
  93. a44a60b Preliminary work on the analog user project example. Added verilog RTL and by Tim Edwards · 5 years ago
  94. 6af7408 Initial commit by manarabdelaty · 5 years ago