| commit | 727bf6f88939be0327c3d950f5c8a31f067e8bc8 | [log] [tgz] |
|---|---|---|
| author | Mariano Alvira <mar@devl.org> | Wed May 19 20:37:44 2021 -0600 |
| committer | Mariano Alvira <mar@devl.org> | Wed May 19 20:37:44 2021 -0600 |
| tree | 7c8c479667417dc2cceb0711fd8fa571bb50a10f | |
| parent | e1877c28d8f1cded37415042c3a15430bda0c09b [diff] |
pull the test circuit out into a subckt and make a testbench for it. getting ready to layout and lvs just the cell.
| :exclamation: Important Note |
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| :warning: | Use this sample project for analog user projects. |
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Refer to README for this sample project documentation.