1. afa96ea [LICENSE] Add SPDX Identifier by agorararmard · 4 years ago
  2. e5780bf [LICENSE] used addlicense to add licenses to all source files by agorararmard · 4 years ago
  3. 9e76a15 [Makefile] don't include manifest when creating manifest by agorararmard · 4 years ago
  4. 7eebfe4 [Makefile] Added a basic manifest target to hash rtl/.v files by agorararmard · 4 years ago
  5. c752431 Added more macros under GL by manarabdelaty · 4 years ago
  6. 589a528 RTL updates to fix gl sim by manarabdelaty · 4 years, 1 month ago
  7. 08dd483 Added global default value for the clock divisor by manarabdelaty · 4 years, 1 month ago
  8. 31c3465 First pruned version of the repo (~470MB w/o .git) by Ahmed Ghazy · 4 years, 1 month ago
  9. 9e230f8 Updated power net name in mgmt_core to match the one in the GL by manarabdelaty · 4 years, 1 month ago
  10. 8839d6a Correct instance names that iverilog doesn't like by Ahmed Ghazy · 4 years, 1 month ago
  11. 65065c6 Correct path of sky130_ef_io__gpiov2_pad_wrapped.v by Ahmed Ghazy · 4 years, 1 month ago
  12. a115bdd Added GL simulations by manarabdelaty · 4 years, 1 month ago
  13. 1d1679d Wrap lsbufhv2lv to eliminate li1 pins at the top by Ahmed Ghazy · 4 years, 1 month ago
  14. 14645b9 Merge branch 'develop' into new_wrapper by ax3ghazy · 4 years, 1 month ago
  15. 886f48b Merge pull request #9 from ax3ghazy/develop-fork by ax3ghazy · 4 years, 1 month ago
  16. fe9c3bb Add two more missing USE_POWER_PINS guards by Ahmed Ghazy · 4 years, 1 month ago
  17. 27200e9 Add more missing USE_POWER_PINS by Ahmed Ghazy · 4 years, 1 month ago
  18. df4dd88 Minor RTL fixes, switching to wrapped GPIOV2 by Ahmed Ghazy · 4 years, 1 month ago
  19. bc03551 Split the high voltage part of the mgmt_protect.v module into its own by Tim Edwards · 4 years, 1 month ago
  20. 1070832 Added ngspice netlist and testbenches for the power-on-reset circuit. by Tim Edwards · 4 years, 1 month ago
  21. 4518c62 Corrected the logic in mgmt_protect; also corrected a problem in the la_test2 by Tim Edwards · 4 years, 1 month ago
  22. 43e5c60 Corrections to the management protection buffer block, and a couple of corrections by Tim Edwards · 4 years, 1 month ago
  23. 581068f Corrected the mess caused by introducing default_nettype none into the design by Tim Edwards · 4 years, 1 month ago
  24. 64c17e8 Add missing USE_POWER_PINS in other modules by Ahmed Ghazy · 4 years, 1 month ago
  25. 69663c7 Eliminate the two inverters at the top level by Ahmed Ghazy · 4 years, 1 month ago
  26. 336e082 add missing signals by Matt Venn · 4 years, 1 month ago
  27. 08cd6eb add default nettype none by Matt Venn · 4 years, 1 month ago
  28. 8f13179 Updated custom memory by Manar · 4 years, 1 month ago
  29. 61dce92 Renamed lvs guard to use_power_pins by Manar · 4 years, 1 month ago
  30. ffe6cad Updated storage area by Manar · 4 years, 1 month ago
  31. e5ac00f Merge pull request #33 from Manarabdelaty/custom_mem by R. Timothy Edwards · 4 years, 1 month ago
  32. 50b0ea0 Merge pull request #32 from dan-rodrigues/user_proj_wb_ack by R. Timothy Edwards · 4 years, 1 month ago
  33. 68e0363 Added power pins to the custom memory cells by Manar · 4 years, 1 month ago
  34. 2517fa8 Add USE_CUSTOM_DFFRAM guard by Ahmed Ghazy · 4 years, 1 month ago
  35. b9a8c91 user_proj_example: fix wbs_ack_o wiring by Dan Rodrigues · 4 years, 1 month ago
  36. 5586f1b Add the custom DFF RAM by Ahmed Ghazy · 4 years, 1 month ago
  37. cd4cff7 Connected WB MI A port outputs to the wb bus by Manar · 4 years, 2 months ago
  38. 6bedda9 Added localparam for calculating mem address bits by Manar · 4 years, 2 months ago
  39. db08adb Updated default number of sram blocks for the user area by Manar · 4 years, 2 months ago
  40. cd41a1d Merge pull request #27 from ax3ghazy/conflict_warnings_fix by R. Timothy Edwards · 4 years, 2 months ago
  41. 706c312 Reset iomem_ready to 0 only in one block by Ahmed Ghazy · 4 years, 2 months ago
  42. f46273f Fix for the synthesis warnings about iomem_rdata by Ahmed Ghazy · 4 years, 2 months ago
  43. 55ec369 Connected storage area to mgmt_core by Manar · 4 years, 2 months ago
  44. 0cefb93 Seperated mgmt and user storage blocks base addresses by Manar · 4 years, 2 months ago
  45. 14f7ca0 Added storage area standalone rtl by Manar · 4 years, 2 months ago
  46. ec9b536 Removed storage area from mgmt_core by Manar · 4 years, 2 months ago
  47. d01c637 Modified the mprj_ctrl.v verilog to be completely clear about how by Tim Edwards · 4 years, 2 months ago
  48. 22d29d6 Add a global defines.v and rely less on parameters by Ahmed Ghazy · 4 years, 2 months ago
  49. 0445c08 Revised the mprj_ctrl module verilog so that it does not generate by Tim Edwards · 4 years, 2 months ago
  50. ba32890 Revised the mprj_ctrl to treat the power control as a single bit by Tim Edwards · 4 years, 2 months ago
  51. e6eda80 Fix a typo in a previous fix... by Ahmed Ghazy · 4 years, 2 months ago
  52. 0b6219d Fix to an issue with index arithmetic by Ahmed Ghazy · 4 years, 2 months ago
  53. 496a08a Corrected an issue with the JTAG and SDO pins that prevented them from by Tim Edwards · 4 years, 2 months ago
  54. 7be29a2 Made a number of modifications to the counter-timer to correctly pipeline by Tim Edwards · 4 years, 2 months ago
  55. 14d35ac Added synthesized memory (4kb) by Manar · 4 years, 2 months ago
  56. 05ad4fc Added two additional signals for monitoring the user areas 1 and 2 by Tim Edwards · 4 years, 2 months ago
  57. 2a62066 Merge pull request #19 from Manarabdelaty/rm_xbar by R. Timothy Edwards · 4 years, 2 months ago
  58. 32d0542 Added two additional features: (1) Timer chaining, which allows one by Tim Edwards · 4 years, 2 months ago
  59. 98a7adc Removed cross bar switch port from mgmt core by Manar · 4 years, 2 months ago
  60. b6dd152 Updated testbenches to declare 38 bits for the user project GPIO pins. by Tim Edwards · 4 years, 2 months ago
  61. 268a90b Merge pull request #18 from ax3ghazy/params by R. Timothy Edwards · 4 years, 2 months ago
  62. f757546 Merge pull request #15 from ax3ghazy/release by R. Timothy Edwards · 4 years, 2 months ago
  63. 2adba10 Fix typos in parameter names by Ahmed Ghazy · 4 years, 2 months ago
  64. 6d9739d Removed references to "Mega-Project" and replaced them with "User Project". by Tim Edwards · 4 years, 2 months ago
  65. 81d5a89 Move wire declarations before they're first used by Ahmed Ghazy · 4 years, 2 months ago
  66. b86fc84 (1) Added a wrapper interface between the top level verilog and the user project by Tim Edwards · 4 years, 2 months ago
  67. 21a9aac Testbench simulations are now all working correctly with the pre-release by Tim Edwards · 4 years, 2 months ago
  68. e2ef673 Additional corrections to the pads and connections for sky130_fd_io. by Tim Edwards · 4 years, 2 months ago
  69. 4c73335 Modified I/O references to match the sky130_fd_io release. Mostly by Tim Edwards · 4 years, 2 months ago
  70. 7a8cbb1 Added a secondary clock output, going to the user area, that is derived by Tim Edwards · 4 years, 2 months ago
  71. 53d9218 Added additional protection for all the signals output to the user by Tim Edwards · 4 years, 2 months ago
  72. ef2b68d Made a few testbench corrections and added the missing OEB lines from the by Tim Edwards · 4 years, 2 months ago
  73. 4286ae1 Made a change to all of the testbench Makefiles to define PDK_PATH as the by Tim Edwards · 4 years, 2 months ago
  74. f645a84 Finalized the voltage clamp arrangement and the total number of pads. by Tim Edwards · 4 years, 2 months ago
  75. 3245e2f Revised the clocking scheme in several ways: (1) Removed the output by Tim Edwards · 4 years, 2 months ago
  76. bb3cd69 Added a behavioral model for the ring oscillator, and a testbench by Tim Edwards · 4 years, 2 months ago
  77. 8115320 Modified code to let SPI master control the housekeeping SPI through by Tim Edwards · 4 years, 2 months ago
  78. 856b092 Corrected the counter/timer and made an enhancement to respond to a by Tim Edwards · 4 years, 2 months ago
  79. b78e1c1 Added management flash SPI pass-through mode testbench and debugged it. by Tim Edwards · 4 years, 2 months ago
  80. b3cef09 Removed temporary file. by Tim Edwards · 4 years, 2 months ago
  81. 5ae07d9 Corrected the error causing the failure of the GPIO testbench. by Tim Edwards · 4 years, 2 months ago
  82. 9eda80d Split the main power supply into managment and two user areas. Mostly by Tim Edwards · 4 years, 2 months ago
  83. 0553751 Most testbenches are working again now. Renamed "mprj_counter" to "user_proj_example" by Tim Edwards · 4 years, 2 months ago
  84. ca2f318 Various corrections to simplify the user project I/O wiring by Tim Edwards · 4 years, 2 months ago
  85. f51dd08 Added a simple power-on-reset circuit with schmitt trigger output, and by Tim Edwards · 4 years, 3 months ago
  86. 89f0924 Made corrections; GPIO testbench now passes. by Tim Edwards · 4 years, 3 months ago
  87. 251e0df Serial chain loading of the I/O configurations is now working. by Tim Edwards · 4 years, 3 months ago
  88. 44bab47 In spite of many errors that still need fixing, this is a major advance by Tim Edwards · 4 years, 3 months ago
  89. 61bfc1f Corrected the primary issue with simulation, which was the failure by Tim Edwards · 4 years, 3 months ago
  90. c18c474 Fixed the syntactical loose ends from yesterday. There are by Tim Edwards · 4 years, 3 months ago
  91. 04ba17f Vast and substantial changes: Removed the old GPIO control with the new one by Tim Edwards · 4 years, 3 months ago
  92. c5265b8 Corrected some things from the initial pass of removing unused GPIO by Tim Edwards · 4 years, 3 months ago
  93. ef8312e Caravel 2nd phase (branch phase2): First pass at removing the analog by Tim Edwards · 4 years, 3 months ago
  94. 0d14e6e harness phase1 initial commit by shalan · 4 years, 4 months ago
  95. fd13eb5 initial commit by shalan · 4 years, 4 months ago
  96. cd64af5 Started adding RTL for the Caravel project by Tim Edwards · 4 years, 4 months ago