Blame - README.md - third_party/shuttle/sky130/mpw-006/slot-032

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Charlie	4562681	2022-05-24 12:32:51 +0100	[diff] [blame]	1	[![License](https://img.shields.io/badge/License-Apache%202.0-blue.svg)](https://opensource.org/licenses/Apache-2.0) [![UPRJ_CI](https://github.com/Wevel/ExperiarSoC/actions/workflows/user_project_ci.yml/badge.svg)](https://github.com/Wevel/ExperiarSoC/actions/workflows/user_project_ci.yml)
				2	<!-- [![Caravel Build](https://github.com/Wevel/ExperiarSoC/actions/workflows/caravel_build.yml/badge.svg)](https://github.com/Wevel/ExperiarSoC/actions/workflows/caravel_build.yml) -->
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Wevel	fc8ae01	2022-03-31 22:01:54 +0100	[diff] [blame]	4	# ExperiarSoC
Charlie	c8a9669	2022-05-20 17:42:32 +0100	[diff] [blame]	5	RISC-V SoC designed for the Efabless Open MPW Program. This project
Charlie	d62bdfe	2022-05-07 19:31:28 +0100	[diff] [blame]	6
				7	![Block diagram of Experiar SoC](docs/Design/ExperiarSoC.png "Block diagram of Experiar SoC")
				8
Charlie	c8a9669	2022-05-20 17:42:32 +0100	[diff] [blame]	9	## Features
Charlie	d62bdfe	2022-05-07 19:31:28 +0100	[diff] [blame]	10	- Dual RV32I cores
				11	- Per core SRAM
Charlie	a41bb8b	2022-05-19 22:41:45 +0100	[diff] [blame]	12	- JTAG interface
Charlie	d62bdfe	2022-05-07 19:31:28 +0100	[diff] [blame]	13	- External flash controller
Charlie	a41bb8b	2022-05-19 22:41:45 +0100	[diff] [blame]	14	- Shared video SRAM
				15	- Configurable VGA output
				16	- 3x UART ports + 1 internal to caravel
				17	- 1x SPI ports
Charlie	7d7207a	2022-05-21 18:43:37 +0100	[diff] [blame]	18	- 4x PWM counters with 4x separate outputs (2 are internal read only)
Charlie	d62bdfe	2022-05-07 19:31:28 +0100	[diff] [blame]	19
Charlie	c8a9669	2022-05-20 17:42:32 +0100	[diff] [blame]	20	## Memory Map
Charlie	2da27a2	2022-05-07 21:00:34 +0100	[diff] [blame]	21
				22	![Memory map for Experiar SoC](docs/Design/MemoryMap.png "Memory map for Experiar SoC")
				23
Charlie	c8a9669	2022-05-20 17:42:32 +0100	[diff] [blame]	24	## Macro Layout
Charlie	5d5650c	2022-05-16 23:05:51 +0100	[diff] [blame]	25
Charlie	ff79e92	2022-05-22 16:49:09 +0100	[diff] [blame]	26	<p float="left">
				27	<img alt="Experiar SoC macro layout" src="docs/Design/MacrosPlacement.png" width = 49% />
				28	<img alt="Experiar SoC macro layout with detailed routing guide overlay" src="docs/Scripts/detailed.guide.jpg" width = 49% />
				29	</p>
Charlie	5d5650c	2022-05-16 23:05:51 +0100	[diff] [blame]	30
Charlie	c8a9669	2022-05-20 17:42:32 +0100	[diff] [blame]	31	## Build Status
				32	- CaravelHost: Success
Charlie	7e13152	2022-05-24 23:56:27 +0100	[diff] [blame]	33	- ExperiarCore: Success
Charlie	c8a9669	2022-05-20 17:42:32 +0100	[diff] [blame]	34	- Flash: Success
				35	- Peripherals: Success
				36	- Video: Success
				37	- WishboneInterconnect: Success
Charlie	7e13152	2022-05-24 23:56:27 +0100	[diff] [blame]	38	- user_project_wrapper: Success
				39
				40	Several macros have max slew violations.
Charlie	c8a9669	2022-05-20 17:42:32 +0100	[diff] [blame]	41
				42	# Tests
Charlie	7d7207a	2022-05-21 18:43:37 +0100	[diff] [blame]	43	## RTL
				44	### verify-peripheralsGPIO-rtl: Success
Charlie	b2e455b	2022-05-26 00:31:14 +0100	[diff] [blame]	45	### verify-peripheralsUART-rtl: Success
Charlie	7d7207a	2022-05-21 18:43:37 +0100	[diff] [blame]	46	### verify-peripheralsSPI-rtl: Not implemented
				47	### verify-peripheralsPWM-rtl: Not implemented
				48	### verify-memory-rtl: Not implemented
Charlie	b2e455b	2022-05-26 00:31:14 +0100	[diff] [blame]	49	### verify-video-rtl: Not run
Charlie	7e13152	2022-05-24 23:56:27 +0100	[diff] [blame]	50	### verify-corePC-rtl: Success
Charlie	5286602	2022-05-23 23:35:40 +0100	[diff] [blame]	51	### verify-coreMem-rtl: Not implemented
				52	### verify-coreArch-rtl: Not implemented
Charlie	c8a9669	2022-05-20 17:42:32 +0100	[diff] [blame]	53
Charlie	7d7207a	2022-05-21 18:43:37 +0100	[diff] [blame]	54	## GL
Charlie	b2e455b	2022-05-26 00:31:14 +0100	[diff] [blame]	55	### verify-peripheralsGPIO-gl: Failed
				56	### verify-peripheralsUART-gl: Failed
Charlie	7d7207a	2022-05-21 18:43:37 +0100	[diff] [blame]	57	### verify-peripheralsSPI-gl: Not implemented
				58	### verify-peripheralsPWM-gl: Not implemented
				59	### verify-memory-gl: Not implemented
				60	### verify-video-gl: Not implemented
Charlie	b2e455b	2022-05-26 00:31:14 +0100	[diff] [blame]	61	### verify-corePC-gl: Failed
Charlie	7e13152	2022-05-24 23:56:27 +0100	[diff] [blame]	62	### verify-coreMem-gl: Not implemented
				63	### verify-coreArch-gl: Not implemented
Charlie	b8c7bb2	2022-05-21 01:21:54 +0100	[diff] [blame]	64
Charlie	ff79e92	2022-05-22 16:49:09 +0100	[diff] [blame]	65	# Need to do
Charlie	ff79e92	2022-05-22 16:49:09 +0100	[diff] [blame]	66	- Write remaining tests (and fix everything until they pass)
				67	- Fix timing violations
Charlie	4562681	2022-05-24 12:32:51 +0100	[diff] [blame]	68	- Fix precheck errors
Charlie	ff79e92	2022-05-22 16:49:09 +0100	[diff] [blame]	69
				70	# Could do
Charlie	9cc2031	2022-05-24 19:11:00 +0100	[diff] [blame]	71	- Add uart pin swapping
Charlie	d62bdfe	2022-05-07 19:31:28 +0100	[diff] [blame]	72	- Flash controller
Charlie	7d7207a	2022-05-21 18:43:37 +0100	[diff] [blame]	73	- JTAG core management controller
Charlie	a41bb8b	2022-05-19 22:41:45 +0100	[diff] [blame]	74	- CSRs
Charlie	ff79e92	2022-05-22 16:49:09 +0100	[diff] [blame]	75	- More tests
				76	- Tile map rendering
Charlie	5286602	2022-05-23 23:35:40 +0100	[diff] [blame]	77	- Change peripheral bus design to have a read ready signal
				78	- Fetch next instruction a clock cycle earlier so instructions only take 2 cycles
Charlie	14a14af	2022-05-07 18:56:52 +0100	[diff] [blame]	79
				80	# Reference work and inspiration
Charlie	c8a9669	2022-05-20 17:42:32 +0100	[diff] [blame]	81	- [Zero to ASIC Course](https://www.zerotoasiccourse.com/): Complete course on ASIC design. Also has useful references and terminology definitions.
Charlie	d62bdfe	2022-05-07 19:31:28 +0100	[diff] [blame]	82	- [Openlane Documentation](https://openlane-docs.readthedocs.io/en/rtd-develop/index.html): Reference for a lot of configuration. The [Variables](https://openlane-docs.readthedocs.io/en/rtd-develop/configuration/README.html) and [Hardening Macros](https://openlane-docs.readthedocs.io/en/rtd-develop/doc/hardening_macros.html#) pages have been particularity useful.
Charlie	c8a9669	2022-05-20 17:42:32 +0100	[diff] [blame]	83	- [Caravel Documentation](https://caravel-harness.readthedocs.io/en/latest/index.html): Reference for caravel and configuration. This seems slightly out of date, but an alternate version can be found in the [github repository](https://github.com/efabless/caravel/tree/main/docs/pdf).
				84	- [Riscduino](https://github.com/dineshannayya/riscduino): Used for inspiration and as a reference for using openlane. There are a number of similar aspects to this project, but all have been reimplemented rather than copied.