| commit | 14a14af2b1bf4567a600968bf3d3f984a8c45186 | [log] [tgz] |
|---|---|---|
| author | Charlie <charlie.david.smith@hotmail.co.uk> | Sat May 07 18:56:52 2022 +0100 |
| committer | Charlie <charlie.david.smith@hotmail.co.uk> | Sat May 07 18:56:52 2022 +0100 |
| tree | 83453330a0f2c783abccfc7525e7676946a2102a | |
| parent | 9fa85607bafaffc5a1c6a0a4d9c6b1800f0fdb9a [diff] |
Updated readme to include some links to references.
RISC-V SoC designed for the Efabless Open MPW Program
Riscduino: Used for inspiration and as a reference for using openlane. There are a number of similar aspects to this project, but all have been reimplemented rather than copied. Openlane Documentation: Reference for a lot of configuration. The Variables and Hardening Macros pages have been particularity useful. Caravel Documentation: Reference for caravel and configuration.