commit | e790209fd6ad3ebb2f48a452d611ba528498784c | [log] [tgz] |
---|---|---|
author | Matt Venn <matt@mattvenn.net> | Fri Mar 18 15:34:42 2022 +0100 |
committer | Matt Venn <matt@mattvenn.net> | Fri Mar 18 15:34:42 2022 +0100 |
tree | 6258f6906ea18b2d250554d401a261ea282b9aa3 | |
parent | 1917a6ac8030d629052dba614f3750ce98fa387c [diff] |
updated with new shared ram infrastructure and hacksoc reharden
This ASIC was designed by members of the Zero to ASIC course.
This submission was configured and built by the multi project tools at commit e936b9cae8ef3f98a938902fd391758a5c1a6736.
# clone all repos, and include support for shared OpenRAM ./multi_tool.py --clone-repos --clone-shared-repos --create-openlane-config --copy-gds --copy-project --openram # run all the tests ./multi_tool.py --test-all --force-delete # build user project wrapper submission cd $CARAVEL_ROOT; make user_project_wrapper # create docs ./multi_tool.py --generate-doc --annotate-image