final gds oasis
diff --git a/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/logs/gds.info b/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/logs/gds.info
new file mode 100644
index 0000000..84c4a46
--- /dev/null
+++ b/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/logs/gds.info
@@ -0,0 +1 @@
+user_project_wrapper.gds: e0794b96c6061fde8b386613fa2fea63274f53b3
\ No newline at end of file
diff --git a/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/logs/git.info b/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/logs/git.info
new file mode 100644
index 0000000..fdc8659
--- /dev/null
+++ b/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/logs/git.info
@@ -0,0 +1,3 @@
+Repository: https://github.com/asinghani/caravel-picorF0.git
+Branch: main
+Commit: d85d3858e8da4402c8b4772913fd5f184b1e3147
diff --git a/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/logs/klayout_beol_check.log b/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/logs/klayout_beol_check.log
new file mode 100644
index 0000000..27b73a9
--- /dev/null
+++ b/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/logs/klayout_beol_check.log
@@ -0,0 +1,1080 @@
+/opt/checks/tech-files/sky130A_mr.drc:37: warning: already initialized constant DRC::DRCEngine::BEOL
+/opt/checks/tech-files/sky130A_mr.drc:29: warning: previous definition of BEOL was here
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+DRC section
+BEOL section
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+Writing report database: /mnt/uffs/user/u4699_anishsi/design/picorf0/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/outputs/reports/klayout_beol_check.xml ..
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diff --git a/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/logs/klayout_beol_check.total b/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/logs/klayout_beol_check.total
new file mode 100644
index 0000000..c227083
--- /dev/null
+++ b/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/logs/klayout_beol_check.total
@@ -0,0 +1 @@
+0
\ No newline at end of file
diff --git a/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/logs/klayout_feol_check.log b/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/logs/klayout_feol_check.log
new file mode 100644
index 0000000..4168328
--- /dev/null
+++ b/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/logs/klayout_feol_check.log
@@ -0,0 +1,726 @@
+/opt/checks/tech-files/sky130A_mr.drc:34: warning: already initialized constant DRC::DRCEngine::FEOL
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+"output" in: sky130A_mr.drc:586
+ Edge pairs: 0 (flat) 0 (hierarchical)
+ Elapsed: 0.000s Memory: 1231.00M
+END: 125/20 (hvntm)
+Writing report database: /mnt/uffs/user/u4699_anishsi/design/picorf0/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/outputs/reports/klayout_feol_check.xml ..
+Total elapsed: 24.890s Memory: 1223.00M
diff --git a/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/logs/klayout_feol_check.total b/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/logs/klayout_feol_check.total
new file mode 100644
index 0000000..c227083
--- /dev/null
+++ b/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/logs/klayout_feol_check.total
@@ -0,0 +1 @@
+0
\ No newline at end of file
diff --git a/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/logs/klayout_met_min_ca_density_check.log b/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/logs/klayout_met_min_ca_density_check.log
new file mode 100644
index 0000000..950936d
--- /dev/null
+++ b/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/logs/klayout_met_min_ca_density_check.log
@@ -0,0 +1,79 @@
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+"area" in: met_min_ca_density.lydrc:59
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+"area" in: met_min_ca_density.lydrc:69
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+"area" in: met_min_ca_density.lydrc:79
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+"area" in: met_min_ca_density.lydrc:89
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+m3_ca_density is 0.9952076130039695
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+"area" in: met_min_ca_density.lydrc:99
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+ Elapsed: 0.010s Memory: 776.00M
+"area" in: met_min_ca_density.lydrc:109
+ Elapsed: 0.060s Memory: 776.00M
+m5_ca_density is 0.8455329452054794
+Writing report database: /mnt/uffs/user/u4699_anishsi/design/picorf0/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/outputs/reports/klayout_met_min_ca_density_check.xml ..
+Total elapsed: 18.210s Memory: 768.00M
diff --git a/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/logs/klayout_met_min_ca_density_check.total b/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/logs/klayout_met_min_ca_density_check.total
new file mode 100644
index 0000000..c227083
--- /dev/null
+++ b/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/logs/klayout_met_min_ca_density_check.total
@@ -0,0 +1 @@
+0
\ No newline at end of file
diff --git a/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/logs/klayout_offgrid_check.log b/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/logs/klayout_offgrid_check.log
new file mode 100644
index 0000000..8f1074f
--- /dev/null
+++ b/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/logs/klayout_offgrid_check.log
@@ -0,0 +1,744 @@
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+Writing report database: /mnt/uffs/user/u4699_anishsi/design/picorf0/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/outputs/reports/klayout_offgrid_check.xml ..
+Total elapsed: 48.600s Memory: 1027.00M
diff --git a/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/logs/klayout_offgrid_check.total b/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/logs/klayout_offgrid_check.total
new file mode 100644
index 0000000..c227083
--- /dev/null
+++ b/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/logs/klayout_offgrid_check.total
@@ -0,0 +1 @@
+0
\ No newline at end of file
diff --git a/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/logs/klayout_pin_label_purposes_overlapping_drawing_check.log b/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/logs/klayout_pin_label_purposes_overlapping_drawing_check.log
new file mode 100644
index 0000000..260fff3
--- /dev/null
+++ b/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/logs/klayout_pin_label_purposes_overlapping_drawing_check.log
@@ -0,0 +1,29 @@
+Running pin_label_purposes_overlapping_drawing.rb.drc on file=/root/picorf0/gds/user_project_wrapper.gds, topcell=user_project_wrapper, output to /mnt/uffs/user/u4699_anishsi/design/picorf0/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/outputs/reports/klayout_pin_label_purposes_overlapping_drawing_check.xml
+ deep:true tiled:false threads:8
+--- #err|description, table for cell: user_project_wrapper
+NO-Check ---- pwell:64/44/EMP 122/16/dat 64/59/EMP 44/16/EMP 44/5/EMP
+ ---- nwell:64/20/dat 64/16/dat 64/5/EMP
+ ---- diff:65/20/dat 65/16/EMP 65/6/EMP
+ ---- tap:65/44/dat 65/48/EMP 65/5/EMP
+ ---- poly:66/20/dat 66/16/EMP 66/5/EMP
+ ---- licon1:66/44/dat 66/58/EMP
+ ---- li1:67/20/dat 67/16/dat 67/5/EMP
+ ---- mcon:67/44/dat 67/48/EMP
+ ---- met1:68/20/dat 68/16/dat 68/5/EMP
+ ---- via:68/44/dat 68/58/EMP
+ ---- met2:69/20/dat 69/16/dat 69/5/EMP
+ ---- via2:69/44/dat 69/58/EMP
+ ---- met3:70/20/dat 70/16/dat 70/5/EMP
+ ---- via3:70/44/dat 70/48/EMP
+ ---- met4:71/20/dat 71/16/dat 71/5/EMP
+ ---- via4:71/44/dat 71/48/EMP
+ ---- met5:72/20/dat 72/16/dat 72/5/EMP
+ ---- pad:76/20/EMP 76/5/EMP 76/16/EMP
+ ---- pnp:82/44/EMP 82/59/EMP
+ ---- npn:82/20/EMP 82/5/EMP
+ ---- rdl:74/20/EMP 74/16/EMP 74/5/EMP
+ ---- inductor:82/24/EMP 82/25/EMP
+ 0 total error(s) among 0 error type(s), 33 checks, cell: user_project_wrapper
+Writing report...
+VmPeak: 2004820 kB
+VmHWM: 537452 kB
diff --git a/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/logs/klayout_pin_label_purposes_overlapping_drawing_check.total b/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/logs/klayout_pin_label_purposes_overlapping_drawing_check.total
new file mode 100644
index 0000000..c227083
--- /dev/null
+++ b/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/logs/klayout_pin_label_purposes_overlapping_drawing_check.total
@@ -0,0 +1 @@
+0
\ No newline at end of file
diff --git a/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/logs/klayout_zeroarea_check.log b/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/logs/klayout_zeroarea_check.log
new file mode 100644
index 0000000..c0cf4bf
--- /dev/null
+++ b/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/logs/klayout_zeroarea_check.log
@@ -0,0 +1,4 @@
+0 zero-area shapes
+writing to /mnt/uffs/user/u4699_anishsi/design/picorf0/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/outputs/user_project_wrapper_no_zero_areas.gds
+VmPeak: 818516 kB
+VmHWM: 525608 kB
diff --git a/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/logs/klayout_zeroarea_check.total b/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/logs/klayout_zeroarea_check.total
new file mode 100644
index 0000000..c227083
--- /dev/null
+++ b/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/logs/klayout_zeroarea_check.total
@@ -0,0 +1 @@
+0
\ No newline at end of file
diff --git a/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/logs/magic_drc_check.log b/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/logs/magic_drc_check.log
new file mode 100644
index 0000000..53d6b19
--- /dev/null
+++ b/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/logs/magic_drc_check.log
@@ -0,0 +1,232 @@
+
+Magic 8.3 revision 220 - Compiled on Thu Nov 4 14:40:59 UTC 2021.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+Processing system .magicrc file
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/opt/checks/drc_checks/magic/magic_drc_check.tcl" from command line.
+Warning: Calma reading is not undoable! I hope that's OK.
+Library written using GDS-II Release 3.0
+Library name: user_project_wrapper
+Reading "sky130_fd_sc_hd__tapvpwrvgnd_1".
+Reading "sky130_fd_sc_hd__decap_3".
+Reading "sky130_fd_sc_hd__decap_4".
+Reading "sky130_fd_sc_hd__decap_12".
+Reading "sky130_fd_sc_hd__fill_1".
+Reading "sky130_fd_sc_hd__decap_6".
+Reading "sky130_fd_sc_hd__clkbuf_1".
+Reading "sky130_fd_sc_hd__fill_2".
+Reading "sky130_fd_sc_hd__buf_2".
+Reading "sky130_fd_sc_hd__diode_2".
+Reading "sky130_fd_sc_hd__decap_8".
+Reading "sky130_fd_sc_hd__buf_4".
+Reading "sky130_fd_sc_hd__clkdlybuf4s50_1".
+Reading "sky130_fd_sc_hd__clkdlybuf4s25_1".
+Reading "sky130_fd_sc_hd__clkbuf_2".
+Reading "sky130_fd_sc_hd__conb_1".
+Reading "sky130_fd_sc_hd__dlymetal6s2s_1".
+Reading "sky130_fd_sc_hd__dfxtp_2".
+Reading "sky130_fd_sc_hd__dlygate4sd3_1".
+Reading "sky130_fd_sc_hd__clkbuf_16".
+Reading "sky130_fd_sc_hd__dfxtp_4".
+Reading "sky130_fd_sc_hd__o221a_1".
+Reading "sky130_fd_sc_hd__inv_2".
+Reading "sky130_fd_sc_hd__dfxtp_1".
+Reading "sky130_fd_sc_hd__or2_2".
+Reading "sky130_fd_sc_hd__or2_1".
+Reading "sky130_fd_sc_hd__or2_4".
+Reading "sky130_fd_sc_hd__inv_4".
+Reading "sky130_fd_sc_hd__clkinv_2".
+Reading "sky130_fd_sc_hd__o21a_1".
+Reading "sky130_fd_sc_hd__clkbuf_4".
+Reading "sky130_fd_sc_hd__nor2_8".
+Reading "sky130_fd_sc_hd__and4b_1".
+Reading "sky130_fd_sc_hd__o21ai_1".
+Reading "sky130_fd_sc_hd__mux2_1".
+Reading "sky130_fd_sc_hd__and2_1".
+Reading "sky130_fd_sc_hd__o21ai_4".
+Reading "sky130_fd_sc_hd__clkbuf_8".
+Reading "sky130_fd_sc_hd__nor2_4".
+Reading "sky130_fd_sc_hd__o2bb2a_1".
+Reading "sky130_fd_sc_hd__and4_1".
+Reading "sky130_fd_sc_hd__a31o_1".
+Reading "sky130_fd_sc_hd__a31oi_1".
+Reading "sky130_fd_sc_hd__a221oi_1".
+Reading "sky130_fd_sc_hd__o31ai_2".
+Reading "sky130_fd_sc_hd__o22a_1".
+Reading "sky130_fd_sc_hd__buf_6".
+Reading "sky130_fd_sc_hd__or3_2".
+Reading "sky130_fd_sc_hd__nor2_1".
+Reading "sky130_fd_sc_hd__a2111o_1".
+CIF file read warning: CIF style sky130(vendor): units rescaled by factor of 5 / 1
+CIF file read warning: Input off lambda grid by 2/5; snapped to grid.
+Reading "sky130_fd_sc_hd__o221ai_1".
+Reading "sky130_fd_sc_hd__o41a_4".
+Reading "sky130_fd_sc_hd__or2b_1".
+Reading "sky130_fd_sc_hd__clkinv_4".
+Reading "sky130_fd_sc_hd__o32a_1".
+Reading "sky130_fd_sc_hd__a21oi_1".
+Reading "sky130_fd_sc_hd__or4b_1".
+Reading "sky130_fd_sc_hd__or3b_1".
+Reading "sky130_fd_sc_hd__nor3_1".
+Reading "sky130_fd_sc_hd__nand2_1".
+Reading "sky130_fd_sc_hd__mux2_2".
+Reading "sky130_fd_sc_hd__o21a_2".
+Reading "sky130_fd_sc_hd__a2bb2o_1".
+Reading "sky130_fd_sc_hd__a21bo_1".
+Reading "sky130_fd_sc_hd__o21ba_1".
+Reading "sky130_fd_sc_hd__and3_1".
+Reading "sky130_fd_sc_hd__nand2_2".
+Reading "sky130_fd_sc_hd__o21ai_2".
+Reading "sky130_fd_sc_hd__a31o_4".
+Reading "sky130_fd_sc_hd__and2_4".
+Reading "sky130_fd_sc_hd__o41a_2".
+Reading "sky130_fd_sc_hd__or4bb_2".
+Reading "sky130_fd_sc_hd__a41o_1".
+Reading "sky130_fd_sc_hd__o2111a_1".
+Reading "sky130_fd_sc_hd__a22o_1".
+Reading "sky130_fd_sc_hd__a32o_1".
+Reading "sky130_fd_sc_hd__or4_1".
+Reading "sky130_fd_sc_hd__a2bb2oi_1".
+Reading "sky130_fd_sc_hd__o211a_1".
+Reading "sky130_fd_sc_hd__a211o_1".
+Reading "sky130_fd_sc_hd__a21o_2".
+Reading "sky130_fd_sc_hd__or4bb_1".
+Reading "sky130_fd_sc_hd__o22ai_1".
+Reading "sky130_fd_sc_hd__o311a_1".
+Reading "sky130_fd_sc_hd__o22a_4".
+Reading "sky130_fd_sc_hd__a21oi_2".
+Reading "sky130_fd_sc_hd__or3_1".
+Reading "sky130_fd_sc_hd__o22a_2".
+Reading "sky130_fd_sc_hd__nor2_2".
+Reading "sky130_fd_sc_hd__o221ai_4".
+Reading "sky130_fd_sc_hd__buf_8".
+Reading "sky130_fd_sc_hd__o211ai_4".
+Reading "sky130_fd_sc_hd__o221ai_2".
+Reading "sky130_fd_sc_hd__a31o_2".
+Reading "sky130_fd_sc_hd__a41o_2".
+Reading "sky130_fd_sc_hd__o2111ai_4".
+Reading "sky130_fd_sc_hd__o31ai_1".
+Reading "sky130_fd_sc_hd__and3_2".
+Reading "sky130_fd_sc_hd__a22o_2".
+Reading "sky130_fd_sc_hd__a21oi_4".
+Reading "sky130_fd_sc_hd__o221a_2".
+Reading "sky130_fd_sc_hd__or4b_2".
+Reading "sky130_fd_sc_hd__o2111ai_1".
+Reading "sky130_fd_sc_hd__or4_2".
+Reading "sky130_fd_sc_hd__and2_2".
+Reading "sky130_fd_sc_hd__a21o_1".
+Reading "sky130_fd_sc_hd__a221o_1".
+Reading "sky130_fd_sc_hd__a31oi_4".
+Reading "sky130_fd_sc_hd__a2bb2o_2".
+Reading "sky130_fd_sc_hd__and3_4".
+Reading "sky130_fd_sc_hd__and4_2".
+Reading "sky130_fd_sc_hd__buf_1".
+Reading "sky130_fd_sc_hd__o21a_4".
+Reading "sky130_fd_sc_hd__clkinv_8".
+Reading "sky130_fd_sc_hd__nand2_8".
+Reading "sky130_fd_sc_hd__a211oi_1".
+Reading "sky130_fd_sc_hd__nor4_1".
+Reading "sky130_fd_sc_hd__inv_6".
+Reading "sky130_fd_sc_hd__o2bb2a_2".
+Reading "sky130_fd_sc_hd__or3_4".
+Reading "sky130_fd_sc_hd__or4b_4".
+Reading "sky130_fd_sc_hd__o2111a_2".
+Reading "sky130_fd_sc_hd__a32o_4".
+Reading "sky130_fd_sc_hd__o211ai_1".
+Reading "sky130_fd_sc_hd__o31a_1".
+Reading "sky130_fd_sc_hd__o32a_2".
+Reading "sky130_fd_sc_hd__o221a_4".
+Reading "sky130_fd_sc_hd__a31oi_2".
+Reading "sky130_fd_sc_hd__and4bb_1".
+Reading "sky130_fd_sc_hd__a41o_4".
+Reading "sky130_fd_sc_hd__a221o_2".
+Reading "sky130_fd_sc_hd__a311o_1".
+Reading "sky130_fd_sc_hd__o311a_2".
+Reading "sky130_fd_sc_hd__o211ai_2".
+Reading "sky130_fd_sc_hd__o22ai_4".
+Reading "sky130_fd_sc_hd__a2111oi_2".
+Reading "sky130_fd_sc_hd__nand2_4".
+Reading "sky130_fd_sc_hd__o2111ai_2".
+Reading "sky130_fd_sc_hd__a2111o_4".
+Reading "sky130_fd_sc_hd__a21boi_1".
+Reading "sky130_fd_sc_hd__nand4_1".
+Reading "sky130_fd_sc_hd__or4_4".
+Reading "sky130_fd_sc_hd__o211a_2".
+Reading "sky130_fd_sc_hd__o31a_2".
+Reading "sky130_fd_sc_hd__or3b_2".
+Reading "sky130_fd_sc_hd__a311oi_2".
+Reading "sky130_fd_sc_hd__a221o_4".
+Reading "sky130_fd_sc_hd__and4b_4".
+Reading "sky130_fd_sc_hd__mux4_1".
+Reading "sky130_fd_sc_hd__mux4_2".
+Reading "sky130_fd_sc_hd__o41a_1".
+Reading "sky130_fd_sc_hd__a2111oi_1".
+Reading "sky130_fd_sc_hd__a2bb2o_4".
+Reading "sky130_fd_sc_hd__a221oi_4".
+Reading "sky130_fd_sc_hd__o31a_4".
+Reading "sky130_fd_sc_hd__o21bai_1".
+Reading "sky130_fd_sc_hd__buf_12".
+Reading "sky130_fd_sc_hd__and2b_1".
+Reading "sky130_fd_sc_hd__mux2_8".
+Reading "sky130_fd_sc_hd__nor3_4".
+Reading "sky130_fd_sc_hd__nor3_2".
+Reading "sky130_fd_sc_hd__a21o_4".
+Reading "sky130_fd_sc_hd__mux2_4".
+Reading "sky130_fd_sc_hd__o21ba_4".
+Reading "sky130_fd_sc_hd__a2111oi_4".
+Reading "sky130_fd_sc_hd__a22oi_1".
+Reading "sky130_fd_sc_hd__inv_12".
+Reading "sky130_fd_sc_hd__inv_8".
+Reading "sky130_fd_sc_hd__nor4_4".
+Reading "sky130_fd_sc_hd__a22o_4".
+Reading "sky130_fd_sc_hd__a2111o_2".
+Reading "sky130_fd_sc_hd__o21bai_2".
+Reading "sky130_fd_sc_hd__or3b_4".
+Reading "sky130_fd_sc_hd__o32a_4".
+Reading "sky130_fd_sc_hd__and3b_1".
+Reading "sky130_fd_sc_hd__o311a_4".
+Reading "sky130_fd_sc_hd__o21ba_2".
+Reading "sky130_fd_sc_hd__a221oi_2".
+Reading "sky130_fd_sc_hd__and2b_4".
+Reading "sky130_fd_sc_hd__a211o_2".
+Reading "sky130_fd_sc_hd__nor4_2".
+Reading "sky130_fd_sc_hd__or2b_4".
+Reading "user_proj".
+ 5000 uses
+ 10000 uses
+ 15000 uses
+ 20000 uses
+ 25000 uses
+ 30000 uses
+ 35000 uses
+ 40000 uses
+ 45000 uses
+ 50000 uses
+ 55000 uses
+ 60000 uses
+ 65000 uses
+ 70000 uses
+ 75000 uses
+ 80000 uses
+ 85000 uses
+ 90000 uses
+ 95000 uses
+ 100000 uses
+ 105000 uses
+Reading "user_project_wrapper".
+[INFO]: Loading user_project_wrapper
+
+DRC style is now "drc(full)"
+Loading DRC CIF style.
+No errors found.
+[INFO]: COUNT: 0
+[INFO]: Should be divided by 3 or 4
+[INFO]: DRC Checking DONE (/mnt/uffs/user/u4699_anishsi/design/picorf0/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/outputs/reports/magic_drc_check.drc.report)
+[INFO]: Saving mag view with DRC errors(/mnt/uffs/user/u4699_anishsi/design/picorf0/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/outputs/user_project_wrapper.magic.drc.mag)
+[INFO]: Saved
diff --git a/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/logs/magic_drc_check.total b/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/logs/magic_drc_check.total
new file mode 100644
index 0000000..c227083
--- /dev/null
+++ b/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/logs/magic_drc_check.total
@@ -0,0 +1 @@
+0
\ No newline at end of file
diff --git a/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/logs/manifest_check.log b/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/logs/manifest_check.log
new file mode 100644
index 0000000..c34bd2b
--- /dev/null
+++ b/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/logs/manifest_check.log
@@ -0,0 +1,48 @@
+/root/picorf0/caravel/verilog/rtl/DFFRAM.v: OK
+/root/picorf0/caravel/verilog/rtl/DFFRAMBB.v: OK
+/root/picorf0/caravel/verilog/rtl/__uprj_analog_netlists.v: OK
+/root/picorf0/caravel/verilog/rtl/__uprj_netlists.v: OK
+/root/picorf0/caravel/verilog/rtl/__user_analog_project_wrapper.v: OK
+/root/picorf0/caravel/verilog/rtl/__user_project_wrapper.v: OK
+/root/picorf0/caravel/verilog/rtl/caravan.v: OK
+/root/picorf0/caravel/verilog/rtl/caravan_netlists.v: OK
+/root/picorf0/caravel/verilog/rtl/caravel.v: OK
+/root/picorf0/caravel/verilog/rtl/caravel_clocking.v: OK
+/root/picorf0/caravel/verilog/rtl/chip_io.v: OK
+/root/picorf0/caravel/verilog/rtl/chip_io_alt.v: OK
+/root/picorf0/caravel/verilog/rtl/clock_div.v: OK
+/root/picorf0/caravel/verilog/rtl/convert_gpio_sigs.v: OK
+/root/picorf0/caravel/verilog/rtl/counter_timer_high.v: OK
+/root/picorf0/caravel/verilog/rtl/counter_timer_low.v: OK
+/root/picorf0/caravel/verilog/rtl/digital_pll.v: OK
+/root/picorf0/caravel/verilog/rtl/digital_pll_controller.v: OK
+/root/picorf0/caravel/verilog/rtl/gpio_control_block.v: OK
+/root/picorf0/caravel/verilog/rtl/gpio_logic_high.v: OK
+/root/picorf0/caravel/verilog/rtl/gpio_wb.v: OK
+/root/picorf0/caravel/verilog/rtl/housekeeping_spi.v: OK
+/root/picorf0/caravel/verilog/rtl/la_wb.v: OK
+/root/picorf0/caravel/verilog/rtl/mem_wb.v: OK
+/root/picorf0/caravel/verilog/rtl/mgmt_core.v: OK
+/root/picorf0/caravel/verilog/rtl/mgmt_protect.v: OK
+/root/picorf0/caravel/verilog/rtl/mgmt_protect_hv.v: OK
+/root/picorf0/caravel/verilog/rtl/mgmt_soc.v: OK
+/root/picorf0/caravel/verilog/rtl/mprj2_logic_high.v: OK
+/root/picorf0/caravel/verilog/rtl/mprj_ctrl.v: OK
+/root/picorf0/caravel/verilog/rtl/mprj_io.v: OK
+/root/picorf0/caravel/verilog/rtl/mprj_logic_high.v: OK
+/root/picorf0/caravel/verilog/rtl/pads.v: OK
+/root/picorf0/caravel/verilog/rtl/picorv32.v: OK
+/root/picorf0/caravel/verilog/rtl/ring_osc2x13.v: OK
+/root/picorf0/caravel/verilog/rtl/simple_por.v: OK
+/root/picorf0/caravel/verilog/rtl/simple_spi_master.v: OK
+/root/picorf0/caravel/verilog/rtl/simpleuart.v: OK
+/root/picorf0/caravel/verilog/rtl/sky130_fd_sc_hvl__lsbufhv2lv_1_wrapped.v: OK
+/root/picorf0/caravel/verilog/rtl/spimemio.v: OK
+/root/picorf0/caravel/verilog/rtl/sram_1rw1r_32_256_8_sky130.v: OK
+/root/picorf0/caravel/verilog/rtl/storage.v: OK
+/root/picorf0/caravel/verilog/rtl/storage_bridge_wb.v: OK
+/root/picorf0/caravel/verilog/rtl/sysctrl.v: OK
+/root/picorf0/caravel/verilog/rtl/wb_intercon.v: OK
+/root/picorf0/caravel/scripts/set_user_id.py: OK
+/root/picorf0/caravel/scripts/generate_fill.py: OK
+/root/picorf0/caravel/scripts/compositor.py: OK
diff --git a/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/logs/pdks.info b/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/logs/pdks.info
new file mode 100644
index 0000000..222f634
--- /dev/null
+++ b/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/logs/pdks.info
@@ -0,0 +1,2 @@
+Open PDKs 14db32aa8ba330e88632ff3ad2ff52f4f4dae1ad
+Skywater PDK c094b6e83a4f9298e47f696ec5a7fd53535ec5eb
\ No newline at end of file
diff --git a/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/logs/precheck.log b/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/logs/precheck.log
new file mode 100644
index 0000000..e497803
--- /dev/null
+++ b/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/logs/precheck.log
@@ -0,0 +1,72 @@
+2021-11-15 05:49:38 - [INFO] - {{Project Git Info}} Repository: https://github.com/asinghani/caravel-picorF0.git | Branch: main | Commit: d85d3858e8da4402c8b4772913fd5f184b1e3147
+2021-11-15 05:49:38 - [INFO] - {{EXTRACTING GDS}} Extracting GDS files in: picorf0
+2021-11-15 05:49:39 - [INFO] - {{Project GDS Info}} user_project_wrapper: e0794b96c6061fde8b386613fa2fea63274f53b3
+2021-11-15 05:49:39 - [INFO] - {{Tools Info}} KLayout: v0.27.3 | Magic: v8.3.220
+2021-11-15 05:49:39 - [INFO] - {{PDKs Info}} Open PDKs: 14db32aa8ba330e88632ff3ad2ff52f4f4dae1ad | Skywater PDK: c094b6e83a4f9298e47f696ec5a7fd53535ec5eb
+2021-11-15 05:49:39 - [INFO] - {{START}} Precheck Started, the full log 'precheck.log' will be located in 'picorf0/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/logs'
+2021-11-15 05:49:39 - [INFO] - {{PRECHECK SEQUENCE}} Precheck will run the following checks: License Manifest Makefile Default Documentation Consistency XOR Magic DRC Klayout FEOL Klayout BEOL Klayout Offgrid Klayout Metal Minimum Clear Area Density Klayout Pin Label Purposes Overlapping Drawing Klayout ZeroArea
+2021-11-15 05:49:39 - [INFO] - {{STEP UPDATE}} Executing Check 1 of 14: License
+2021-11-15 05:49:40 - [INFO] - An approved LICENSE (Apache-2.0) was found in picorf0.
+2021-11-15 05:49:40 - [INFO] - {{MAIN LICENSE CHECK PASSED}} An approved LICENSE was found in project root.
+2021-11-15 05:49:41 - [INFO] - An approved LICENSE (Apache-2.0) was found in picorf0.
+2021-11-15 05:49:41 - [INFO] - {{SUBMODULES LICENSE CHECK PASSED}} No prohibited LICENSE file(s) was found in project submodules
+2021-11-15 05:49:41 - [WARNING] - {{SPDX COMPLIANCE CHECK FAILED}} Found 15 non-compliant file(s) with the SPDX Standard.
+2021-11-15 05:49:41 - [INFO] - SPDX COMPLIANCE: NON-COMPLIANT FILE(S) PREVIEW: ['picorf0/Makefile', 'picorf0/verilog/dv/Makefile', 'picorf0/verilog/dv/rf0/Makefile', 'picorf0/verilog/dv/rf0/rf0_tb.v', 'picorf0/verilog/dv/rf0/printio.h', 'picorf0/verilog/dv/rf0/rf0.c', 'picorf0/verilog/rtl/CanTop.v', 'picorf0/verilog/rtl/CoreTop.v', 'picorf0/verilog/rtl/game.v', 'picorf0/verilog/rtl/uprj_netlists.v', 'picorf0/verilog/rtl/user_proj.v', 'picorf0/verilog/rtl/user_project_wrapper.v', 'picorf0/openlane/Makefile', 'picorf0/openlane/user_project_wrapper/config.tcl', 'picorf0/openlane/user_proj/config.tcl']
+2021-11-15 05:49:41 - [INFO] - For the full SPDX compliance report check: picorf0/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/logs/spdx_compliance_report.log
+2021-11-15 05:49:41 - [INFO] - {{STEP UPDATE}} Executing Check 2 of 14: Manifest
+2021-11-15 05:49:41 - [INFO] - Caravel version matches, for the full report check: picorf0/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/logs/manifest_check.log
+2021-11-15 05:49:41 - [INFO] - {{MANIFEST CHECKS PASSED}} Manifest Checks Passed. Caravel version matches.
+2021-11-15 05:49:41 - [INFO] - {{STEP UPDATE}} Executing Check 3 of 14: Makefile
+2021-11-15 05:49:41 - [INFO] - {{MAKEFILE CHECK PASSED}} Makefile valid.
+2021-11-15 05:49:41 - [INFO] - {{STEP UPDATE}} Executing Check 4 of 14: Default
+2021-11-15 05:49:41 - [INFO] - {{README DEFAULT CHECK PASSED}} Project 'README.md' was modified and is not identical to the default 'README.md'
+2021-11-15 05:49:42 - [INFO] - {{CONTENT DEFAULT CHECK PASSED}} Project 'gds' was modified and is not identical to the default 'gds'
+2021-11-15 05:49:42 - [INFO] - {{STEP UPDATE}} Executing Check 5 of 14: Documentation
+2021-11-15 05:49:42 - [INFO] - {{DOCUMENTATION CHECK PASSED}} Project documentation is appropriate.
+2021-11-15 05:49:42 - [INFO] - {{STEP UPDATE}} Executing Check 6 of 14: Consistency
+2021-11-15 05:49:42 - [INFO] - Trying to get file https://raw.githubusercontent.com/efabless/caravel/ca9025570d8180598301d874117a63d372d4243c/verilog/rtl/__user_project_wrapper.v
+2021-11-15 05:49:42 - [INFO] - Got file https://raw.githubusercontent.com/efabless/caravel/ca9025570d8180598301d874117a63d372d4243c/verilog/rtl/__user_project_wrapper.v
+2021-11-15 05:49:42 - [INFO] - Trying to get file https://raw.githubusercontent.com/efabless/caravel/ca9025570d8180598301d874117a63d372d4243c/verilog/rtl/defines.v
+2021-11-15 05:49:42 - [INFO] - Got file https://raw.githubusercontent.com/efabless/caravel/ca9025570d8180598301d874117a63d372d4243c/verilog/rtl/defines.v
+2021-11-15 05:49:47 - [INFO] - HIERARCHY CHECK PASSED: Module user_project_wrapper is instantiated in caravel.
+2021-11-15 05:49:47 - [INFO] - COMPLEXITY CHECK PASSED: Netlist caravel contains at least 8 instances (46 instances).
+2021-11-15 05:49:47 - [INFO] - MODELING CHECK PASSED: Netlist caravel is structural.
+2021-11-15 05:49:47 - [INFO] - SUBMODULE HOOKS CHECK PASSED: All module ports for user_project_wrapper are correctly connected in the top level netlist caravel.
+2021-11-15 05:49:47 - [INFO] - POWER CONNECTIONS CHECK PASSED: All instances in caravel are connected to power
+2021-11-15 05:49:47 - [INFO] - {{NETLIST CONSISTENCY CHECK PASSED}} caravel netlist passed all consistency checks.
+2021-11-15 05:49:47 - [INFO] - PORTS CHECK PASSED: Netlist user_project_wrapper ports match the golden wrapper ports
+2021-11-15 05:49:47 - [INFO] - COMPLEXITY CHECK PASSED: Netlist user_project_wrapper contains at least 1 instances (1 instances).
+2021-11-15 05:49:47 - [INFO] - MODELING CHECK PASSED: Netlist user_project_wrapper is structural.
+2021-11-15 05:49:47 - [INFO] - LAYOUT CHECK PASSED: The GDS layout for user_project_wrapper matches the provided structural netlist.
+2021-11-15 05:49:47 - [INFO] - POWER CONNECTIONS CHECK PASSED: All instances in user_project_wrapper are connected to power
+2021-11-15 05:49:47 - [INFO] - PORT TYPES CHECK PASSED: Netlist user_project_wrapper port types match the golden wrapper port types.
+2021-11-15 05:49:47 - [INFO] - {{NETLIST CONSISTENCY CHECK PASSED}} user_project_wrapper netlist passed all consistency checks.
+2021-11-15 05:49:47 - [INFO] - {{CONSISTENCY CHECK PASSED}} The user netlist and the top netlist are valid.
+2021-11-15 05:49:47 - [INFO] - {{STEP UPDATE}} Executing Check 7 of 14: XOR
+2021-11-15 05:49:47 - [INFO] - Trying to get file https://raw.githubusercontent.com/efabless/caravel/ca9025570d8180598301d874117a63d372d4243c/gds/user_project_wrapper_empty.gds.gz
+2021-11-15 05:49:48 - [INFO] - Got file https://raw.githubusercontent.com/efabless/caravel/ca9025570d8180598301d874117a63d372d4243c/gds/user_project_wrapper_empty.gds.gz
+2021-11-15 05:50:07 - [INFO] - {XOR CHECK UPDATE} Total XOR differences: 0, for more details view picorf0/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/outputs/user_project_wrapper.xor.gds
+2021-11-15 05:50:07 - [INFO] - {{XOR CHECK PASSED}} The GDS file has no XOR violations.
+2021-11-15 05:50:07 - [INFO] - {{STEP UPDATE}} Executing Check 8 of 14: Magic DRC
+2021-11-15 05:54:48 - [INFO] - 0 DRC violations
+2021-11-15 05:54:48 - [INFO] - {{MAGIC DRC CHECK PASSED}} The GDS file, user_project_wrapper.gds, has no DRC violations.
+2021-11-15 05:54:48 - [INFO] - {{STEP UPDATE}} Executing Check 9 of 14: Klayout FEOL
+2021-11-15 05:55:14 - [INFO] - No DRC Violations found
+2021-11-15 05:55:14 - [INFO] - {{Klayout FEOL CHECK PASSED}} The GDS file, user_project_wrapper.gds, has no DRC violations.
+2021-11-15 05:55:14 - [INFO] - {{STEP UPDATE}} Executing Check 10 of 14: Klayout BEOL
+2021-11-15 06:12:24 - [INFO] - No DRC Violations found
+2021-11-15 06:12:24 - [INFO] - {{Klayout BEOL CHECK PASSED}} The GDS file, user_project_wrapper.gds, has no DRC violations.
+2021-11-15 06:12:24 - [INFO] - {{STEP UPDATE}} Executing Check 11 of 14: Klayout Offgrid
+2021-11-15 06:13:13 - [INFO] - No DRC Violations found
+2021-11-15 06:13:13 - [INFO] - {{Klayout Offgrid CHECK PASSED}} The GDS file, user_project_wrapper.gds, has no DRC violations.
+2021-11-15 06:13:13 - [INFO] - {{STEP UPDATE}} Executing Check 12 of 14: Klayout Metal Minimum Clear Area Density
+2021-11-15 06:13:33 - [INFO] - No DRC Violations found
+2021-11-15 06:13:33 - [INFO] - {{Klayout Metal Minimum Clear Area Density CHECK PASSED}} The GDS file, user_project_wrapper.gds, has no DRC violations.
+2021-11-15 06:13:33 - [INFO] - {{STEP UPDATE}} Executing Check 13 of 14: Klayout Pin Label Purposes Overlapping Drawing
+2021-11-15 06:13:44 - [INFO] - No DRC Violations found
+2021-11-15 06:13:44 - [INFO] - {{Klayout Pin Label Purposes Overlapping Drawing CHECK PASSED}} The GDS file, user_project_wrapper.gds, has no DRC violations.
+2021-11-15 06:13:44 - [INFO] - {{STEP UPDATE}} Executing Check 14 of 14: Klayout ZeroArea
+2021-11-15 06:13:49 - [INFO] - No DRC Violations found
+2021-11-15 06:13:49 - [INFO] - {{Klayout ZeroArea CHECK PASSED}} The GDS file, user_project_wrapper.gds, has no DRC violations.
+2021-11-15 06:13:49 - [INFO] - {{FINISH}} Executing Finished, the full log 'precheck.log' can be found in 'picorf0/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/logs'
+2021-11-15 06:13:49 - [INFO] - {{SUCCESS}} All Checks Passed !!!
diff --git a/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/logs/spdx_compliance_report.log b/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/logs/spdx_compliance_report.log
new file mode 100644
index 0000000..24fa427
--- /dev/null
+++ b/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/logs/spdx_compliance_report.log
@@ -0,0 +1,15 @@
+/root/picorf0/Makefile
+/root/picorf0/verilog/dv/Makefile
+/root/picorf0/verilog/dv/rf0/Makefile
+/root/picorf0/verilog/dv/rf0/rf0_tb.v
+/root/picorf0/verilog/dv/rf0/printio.h
+/root/picorf0/verilog/dv/rf0/rf0.c
+/root/picorf0/verilog/rtl/CanTop.v
+/root/picorf0/verilog/rtl/CoreTop.v
+/root/picorf0/verilog/rtl/game.v
+/root/picorf0/verilog/rtl/uprj_netlists.v
+/root/picorf0/verilog/rtl/user_proj.v
+/root/picorf0/verilog/rtl/user_project_wrapper.v
+/root/picorf0/openlane/Makefile
+/root/picorf0/openlane/user_project_wrapper/config.tcl
+/root/picorf0/openlane/user_proj/config.tcl
diff --git a/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/logs/tools.info b/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/logs/tools.info
new file mode 100644
index 0000000..b4cf097
--- /dev/null
+++ b/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/logs/tools.info
@@ -0,0 +1,2 @@
+KLayout: 0.27.3
+Magic: 8.3.220
\ No newline at end of file
diff --git a/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/logs/xor_check.log b/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/logs/xor_check.log
new file mode 100644
index 0000000..c63cdd9
--- /dev/null
+++ b/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/logs/xor_check.log
@@ -0,0 +1,386 @@
+Reading file /root/picorf0/gds/user_project_wrapper.gds for cell user_project_wrapper
+dbu=0.001
+cell user_project_wrapper dbu-bbox(ll;ur)=(-43630,-38270;2963250,3557950)
+cell user_project_wrapper dbu-bbox(left,bottom,right,top)=(-43630,-38270,2963250,3557950)
+cell user_project_wrapper dbu-size(width,height)=(3006880,3596220)
+cell user_project_wrapper micron-bbox(left,bottom,right,top)=(-43.63,-38.27,2963.25,3557.9500000000003)
+cell user_project_wrapper micron-size(width,height)=(3006.88,3596.2200000000003)
+Done.
+
+Magic 8.3 revision 220 - Compiled on Thu Nov 4 14:40:59 UTC 2021.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+Processing system .magicrc file
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/opt/checks/xor_check/erase_box.tcl" from command line.
+CIF input style is now "sky130(vendor)"
+Warning: Calma reading is not undoable! I hope that's OK.
+Library written using GDS-II Release 3.0
+Library name: user_project_wrapper
+Reading "sky130_fd_sc_hd__tapvpwrvgnd_1".
+Reading "sky130_fd_sc_hd__decap_3".
+Reading "sky130_fd_sc_hd__decap_4".
+Reading "sky130_fd_sc_hd__decap_12".
+Reading "sky130_fd_sc_hd__fill_1".
+Reading "sky130_fd_sc_hd__decap_6".
+Reading "sky130_fd_sc_hd__clkbuf_1".
+Reading "sky130_fd_sc_hd__fill_2".
+Reading "sky130_fd_sc_hd__buf_2".
+Reading "sky130_fd_sc_hd__diode_2".
+Reading "sky130_fd_sc_hd__decap_8".
+Reading "sky130_fd_sc_hd__buf_4".
+Reading "sky130_fd_sc_hd__clkdlybuf4s50_1".
+Reading "sky130_fd_sc_hd__clkdlybuf4s25_1".
+Reading "sky130_fd_sc_hd__clkbuf_2".
+Reading "sky130_fd_sc_hd__conb_1".
+Reading "sky130_fd_sc_hd__dlymetal6s2s_1".
+Reading "sky130_fd_sc_hd__dfxtp_2".
+Reading "sky130_fd_sc_hd__dlygate4sd3_1".
+Reading "sky130_fd_sc_hd__clkbuf_16".
+Reading "sky130_fd_sc_hd__dfxtp_4".
+Reading "sky130_fd_sc_hd__o221a_1".
+Reading "sky130_fd_sc_hd__inv_2".
+Reading "sky130_fd_sc_hd__dfxtp_1".
+Reading "sky130_fd_sc_hd__or2_2".
+Reading "sky130_fd_sc_hd__or2_1".
+Reading "sky130_fd_sc_hd__or2_4".
+Reading "sky130_fd_sc_hd__inv_4".
+Reading "sky130_fd_sc_hd__clkinv_2".
+Reading "sky130_fd_sc_hd__o21a_1".
+Reading "sky130_fd_sc_hd__clkbuf_4".
+Reading "sky130_fd_sc_hd__nor2_8".
+Reading "sky130_fd_sc_hd__and4b_1".
+Reading "sky130_fd_sc_hd__o21ai_1".
+Reading "sky130_fd_sc_hd__mux2_1".
+Reading "sky130_fd_sc_hd__and2_1".
+Reading "sky130_fd_sc_hd__o21ai_4".
+Reading "sky130_fd_sc_hd__clkbuf_8".
+Reading "sky130_fd_sc_hd__nor2_4".
+Reading "sky130_fd_sc_hd__o2bb2a_1".
+Reading "sky130_fd_sc_hd__and4_1".
+Reading "sky130_fd_sc_hd__a31o_1".
+Reading "sky130_fd_sc_hd__a31oi_1".
+Reading "sky130_fd_sc_hd__a221oi_1".
+Reading "sky130_fd_sc_hd__o31ai_2".
+Reading "sky130_fd_sc_hd__o22a_1".
+Reading "sky130_fd_sc_hd__buf_6".
+Reading "sky130_fd_sc_hd__or3_2".
+Reading "sky130_fd_sc_hd__nor2_1".
+Reading "sky130_fd_sc_hd__a2111o_1".
+CIF file read warning: CIF style sky130(vendor): units rescaled by factor of 5 / 1
+CIF file read warning: Input off lambda grid by 2/5; snapped to grid.
+Reading "sky130_fd_sc_hd__o221ai_1".
+Reading "sky130_fd_sc_hd__o41a_4".
+Reading "sky130_fd_sc_hd__or2b_1".
+Reading "sky130_fd_sc_hd__clkinv_4".
+Reading "sky130_fd_sc_hd__o32a_1".
+Reading "sky130_fd_sc_hd__a21oi_1".
+Reading "sky130_fd_sc_hd__or4b_1".
+Reading "sky130_fd_sc_hd__or3b_1".
+Reading "sky130_fd_sc_hd__nor3_1".
+Reading "sky130_fd_sc_hd__nand2_1".
+Reading "sky130_fd_sc_hd__mux2_2".
+Reading "sky130_fd_sc_hd__o21a_2".
+Reading "sky130_fd_sc_hd__a2bb2o_1".
+Reading "sky130_fd_sc_hd__a21bo_1".
+Reading "sky130_fd_sc_hd__o21ba_1".
+Reading "sky130_fd_sc_hd__and3_1".
+Reading "sky130_fd_sc_hd__nand2_2".
+Reading "sky130_fd_sc_hd__o21ai_2".
+Reading "sky130_fd_sc_hd__a31o_4".
+Reading "sky130_fd_sc_hd__and2_4".
+Reading "sky130_fd_sc_hd__o41a_2".
+Reading "sky130_fd_sc_hd__or4bb_2".
+Reading "sky130_fd_sc_hd__a41o_1".
+Reading "sky130_fd_sc_hd__o2111a_1".
+Reading "sky130_fd_sc_hd__a22o_1".
+Reading "sky130_fd_sc_hd__a32o_1".
+Reading "sky130_fd_sc_hd__or4_1".
+Reading "sky130_fd_sc_hd__a2bb2oi_1".
+Reading "sky130_fd_sc_hd__o211a_1".
+Reading "sky130_fd_sc_hd__a211o_1".
+Reading "sky130_fd_sc_hd__a21o_2".
+Reading "sky130_fd_sc_hd__or4bb_1".
+Reading "sky130_fd_sc_hd__o22ai_1".
+Reading "sky130_fd_sc_hd__o311a_1".
+Reading "sky130_fd_sc_hd__o22a_4".
+Reading "sky130_fd_sc_hd__a21oi_2".
+Reading "sky130_fd_sc_hd__or3_1".
+Reading "sky130_fd_sc_hd__o22a_2".
+Reading "sky130_fd_sc_hd__nor2_2".
+Reading "sky130_fd_sc_hd__o221ai_4".
+Reading "sky130_fd_sc_hd__buf_8".
+Reading "sky130_fd_sc_hd__o211ai_4".
+Reading "sky130_fd_sc_hd__o221ai_2".
+Reading "sky130_fd_sc_hd__a31o_2".
+Reading "sky130_fd_sc_hd__a41o_2".
+Reading "sky130_fd_sc_hd__o2111ai_4".
+Reading "sky130_fd_sc_hd__o31ai_1".
+Reading "sky130_fd_sc_hd__and3_2".
+Reading "sky130_fd_sc_hd__a22o_2".
+Reading "sky130_fd_sc_hd__a21oi_4".
+Reading "sky130_fd_sc_hd__o221a_2".
+Reading "sky130_fd_sc_hd__or4b_2".
+Reading "sky130_fd_sc_hd__o2111ai_1".
+Reading "sky130_fd_sc_hd__or4_2".
+Reading "sky130_fd_sc_hd__and2_2".
+Reading "sky130_fd_sc_hd__a21o_1".
+Reading "sky130_fd_sc_hd__a221o_1".
+Reading "sky130_fd_sc_hd__a31oi_4".
+Reading "sky130_fd_sc_hd__a2bb2o_2".
+Reading "sky130_fd_sc_hd__and3_4".
+Reading "sky130_fd_sc_hd__and4_2".
+Reading "sky130_fd_sc_hd__buf_1".
+Reading "sky130_fd_sc_hd__o21a_4".
+Reading "sky130_fd_sc_hd__clkinv_8".
+Reading "sky130_fd_sc_hd__nand2_8".
+Reading "sky130_fd_sc_hd__a211oi_1".
+Reading "sky130_fd_sc_hd__nor4_1".
+Reading "sky130_fd_sc_hd__inv_6".
+Reading "sky130_fd_sc_hd__o2bb2a_2".
+Reading "sky130_fd_sc_hd__or3_4".
+Reading "sky130_fd_sc_hd__or4b_4".
+Reading "sky130_fd_sc_hd__o2111a_2".
+Reading "sky130_fd_sc_hd__a32o_4".
+Reading "sky130_fd_sc_hd__o211ai_1".
+Reading "sky130_fd_sc_hd__o31a_1".
+Reading "sky130_fd_sc_hd__o32a_2".
+Reading "sky130_fd_sc_hd__o221a_4".
+Reading "sky130_fd_sc_hd__a31oi_2".
+Reading "sky130_fd_sc_hd__and4bb_1".
+Reading "sky130_fd_sc_hd__a41o_4".
+Reading "sky130_fd_sc_hd__a221o_2".
+Reading "sky130_fd_sc_hd__a311o_1".
+Reading "sky130_fd_sc_hd__o311a_2".
+Reading "sky130_fd_sc_hd__o211ai_2".
+Reading "sky130_fd_sc_hd__o22ai_4".
+Reading "sky130_fd_sc_hd__a2111oi_2".
+Reading "sky130_fd_sc_hd__nand2_4".
+Reading "sky130_fd_sc_hd__o2111ai_2".
+Reading "sky130_fd_sc_hd__a2111o_4".
+Reading "sky130_fd_sc_hd__a21boi_1".
+Reading "sky130_fd_sc_hd__nand4_1".
+Reading "sky130_fd_sc_hd__or4_4".
+Reading "sky130_fd_sc_hd__o211a_2".
+Reading "sky130_fd_sc_hd__o31a_2".
+Reading "sky130_fd_sc_hd__or3b_2".
+Reading "sky130_fd_sc_hd__a311oi_2".
+Reading "sky130_fd_sc_hd__a221o_4".
+Reading "sky130_fd_sc_hd__and4b_4".
+Reading "sky130_fd_sc_hd__mux4_1".
+Reading "sky130_fd_sc_hd__mux4_2".
+Reading "sky130_fd_sc_hd__o41a_1".
+Reading "sky130_fd_sc_hd__a2111oi_1".
+Reading "sky130_fd_sc_hd__a2bb2o_4".
+Reading "sky130_fd_sc_hd__a221oi_4".
+Reading "sky130_fd_sc_hd__o31a_4".
+Reading "sky130_fd_sc_hd__o21bai_1".
+Reading "sky130_fd_sc_hd__buf_12".
+Reading "sky130_fd_sc_hd__and2b_1".
+Reading "sky130_fd_sc_hd__mux2_8".
+Reading "sky130_fd_sc_hd__nor3_4".
+Reading "sky130_fd_sc_hd__nor3_2".
+Reading "sky130_fd_sc_hd__a21o_4".
+Reading "sky130_fd_sc_hd__mux2_4".
+Reading "sky130_fd_sc_hd__o21ba_4".
+Reading "sky130_fd_sc_hd__a2111oi_4".
+Reading "sky130_fd_sc_hd__a22oi_1".
+Reading "sky130_fd_sc_hd__inv_12".
+Reading "sky130_fd_sc_hd__inv_8".
+Reading "sky130_fd_sc_hd__nor4_4".
+Reading "sky130_fd_sc_hd__a22o_4".
+Reading "sky130_fd_sc_hd__a2111o_2".
+Reading "sky130_fd_sc_hd__o21bai_2".
+Reading "sky130_fd_sc_hd__or3b_4".
+Reading "sky130_fd_sc_hd__o32a_4".
+Reading "sky130_fd_sc_hd__and3b_1".
+Reading "sky130_fd_sc_hd__o311a_4".
+Reading "sky130_fd_sc_hd__o21ba_2".
+Reading "sky130_fd_sc_hd__a221oi_2".
+Reading "sky130_fd_sc_hd__and2b_4".
+Reading "sky130_fd_sc_hd__a211o_2".
+Reading "sky130_fd_sc_hd__nor4_2".
+Reading "sky130_fd_sc_hd__or2b_4".
+Reading "user_proj".
+ 5000 uses
+ 10000 uses
+ 15000 uses
+ 20000 uses
+ 25000 uses
+ 30000 uses
+ 35000 uses
+ 40000 uses
+ 45000 uses
+ 50000 uses
+ 55000 uses
+ 60000 uses
+ 65000 uses
+ 70000 uses
+ 75000 uses
+ 80000 uses
+ 85000 uses
+ 90000 uses
+ 95000 uses
+ 100000 uses
+ 105000 uses
+Reading "user_project_wrapper".
+Root cell box:
+ width x height ( llx, lly ), ( urx, ury ) area (units^2)
+
+microns: 42.88 x 3520.00 (-42.88, 0.00 ), ( 0.00, 3520.00) 150937.59
+lambda: 4288.00 x 352000.00 (-4288.00, 0.00 ), ( 0.00, 352000.00) 1509376000.00
+internal: 8576 x 704000 ( -8576, 0 ), ( 0, 704000) 6037504000
+Root cell box:
+ width x height ( llx, lly ), ( urx, ury ) area (units^2)
+
+microns: 42.50 x 3520.00 ( 2920.00, 0.00 ), ( 2962.50, 3520.00) 149600.00
+lambda: 4250.00 x 352000.00 ( 292000.00, 0.00 ), ( 296250.00, 352000.00) 1496000000.00
+internal: 8500 x 704000 ( 584000, 0 ), ( 592500, 704000) 5984000000
+Root cell box:
+ width x height ( llx, lly ), ( urx, ury ) area (units^2)
+
+microns: 3005.38 x 37.53 (-42.88, -37.53), ( 2962.50, 0.00 ) 112791.91
+lambda: 300538.00 x 3753.00 (-4288.00, -3753.00), ( 296250.00, 0.00 ) 1127919104.00
+internal: 601076 x 7506 ( -8576, -7506 ), ( 592500, 0 ) 4511676456
+Root cell box:
+ width x height ( llx, lly ), ( urx, ury ) area (units^2)
+
+microns: 3005.38 x 37.21 (-42.88, 3520.00), ( 2962.50, 3557.21) 111830.19
+lambda: 300538.00 x 3721.00 (-4288.00, 352000.00), ( 296250.00, 355721.00) 1118301952.00
+internal: 601076 x 7442 ( -8576, 704000), ( 592500, 711442) 4473207592
+ Generating output for cell xor_target
+
+Magic 8.3 revision 220 - Compiled on Thu Nov 4 14:40:59 UTC 2021.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+Processing system .magicrc file
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/opt/checks/xor_check/erase_box.tcl" from command line.
+CIF input style is now "sky130(vendor)"
+Warning: Calma reading is not undoable! I hope that's OK.
+Library written using GDS-II Release 3.0
+Library name: user_project_wrapper
+Reading "user_project_wrapper".
+Root cell box:
+ width x height ( llx, lly ), ( urx, ury ) area (units^2)
+
+microns: 42.88 x 3520.00 (-42.88, 0.00 ), ( 0.00, 3520.00) 150937.59
+lambda: 4288.00 x 352000.00 (-4288.00, 0.00 ), ( 0.00, 352000.00) 1509376000.00
+internal: 8576 x 704000 ( -8576, 0 ), ( 0, 704000) 6037504000
+Root cell box:
+ width x height ( llx, lly ), ( urx, ury ) area (units^2)
+
+microns: 42.50 x 3520.00 ( 2920.00, 0.00 ), ( 2962.50, 3520.00) 149600.00
+lambda: 4250.00 x 352000.00 ( 292000.00, 0.00 ), ( 296250.00, 352000.00) 1496000000.00
+internal: 8500 x 704000 ( 584000, 0 ), ( 592500, 704000) 5984000000
+Root cell box:
+ width x height ( llx, lly ), ( urx, ury ) area (units^2)
+
+microns: 3005.38 x 37.53 (-42.88, -37.53), ( 2962.50, 0.00 ) 112791.91
+lambda: 300538.00 x 3753.00 (-4288.00, -3753.00), ( 296250.00, 0.00 ) 1127919104.00
+internal: 601076 x 7506 ( -8576, -7506 ), ( 592500, 0 ) 4511676456
+Root cell box:
+ width x height ( llx, lly ), ( urx, ury ) area (units^2)
+
+microns: 3005.38 x 37.21 (-42.88, 3520.00), ( 2962.50, 3557.21) 111830.19
+lambda: 300538.00 x 3721.00 (-4288.00, 352000.00), ( 296250.00, 355721.00) 1118301952.00
+internal: 601076 x 7442 ( -8576, 704000), ( 592500, 711442) 4473207592
+ Generating output for cell xor_target
+Reading /mnt/uffs/user/u4699_anishsi/design/picorf0/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/outputs/user_project_wrapper_erased.gds ..
+Reading /mnt/uffs/user/u4699_anishsi/design/picorf0/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/outputs/user_project_wrapper_empty_erased.gds ..
+--- Running XOR for 69/20 ---
+"input" in: xor.rb.drc:39
+ Polygons (raw): 530 (flat) 530 (hierarchical)
+ Elapsed: 0.000s Memory: 519.00M
+"input" in: xor.rb.drc:39
+ Polygons (raw): 530 (flat) 530 (hierarchical)
+ Elapsed: 0.010s Memory: 519.00M
+"^" in: xor.rb.drc:39
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.010s Memory: 519.00M
+XOR differences: 0
+"output" in: xor.rb.drc:43
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.000s Memory: 519.00M
+--- Running XOR for 70/20 ---
+"input" in: xor.rb.drc:39
+ Polygons (raw): 107 (flat) 107 (hierarchical)
+ Elapsed: 0.010s Memory: 519.00M
+"input" in: xor.rb.drc:39
+ Polygons (raw): 107 (flat) 107 (hierarchical)
+ Elapsed: 0.000s Memory: 519.00M
+"^" in: xor.rb.drc:39
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.010s Memory: 519.00M
+XOR differences: 0
+"output" in: xor.rb.drc:43
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.000s Memory: 519.00M
+--- Running XOR for 71/20 ---
+"input" in: xor.rb.drc:39
+ Polygons (raw): 16 (flat) 16 (hierarchical)
+ Elapsed: 0.010s Memory: 519.00M
+"input" in: xor.rb.drc:39
+ Polygons (raw): 16 (flat) 16 (hierarchical)
+ Elapsed: 0.000s Memory: 519.00M
+"^" in: xor.rb.drc:39
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.010s Memory: 519.00M
+XOR differences: 0
+"output" in: xor.rb.drc:43
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.000s Memory: 519.00M
+--- Running XOR for 71/44 ---
+"input" in: xor.rb.drc:39
+ Polygons (raw): 116 (flat) 116 (hierarchical)
+ Elapsed: 0.010s Memory: 519.00M
+"input" in: xor.rb.drc:39
+ Polygons (raw): 116 (flat) 116 (hierarchical)
+ Elapsed: 0.000s Memory: 519.00M
+"^" in: xor.rb.drc:39
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.010s Memory: 519.00M
+XOR differences: 0
+"output" in: xor.rb.drc:43
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.000s Memory: 519.00M
+--- Running XOR for 72/20 ---
+"input" in: xor.rb.drc:39
+ Polygons (raw): 16 (flat) 16 (hierarchical)
+ Elapsed: 0.010s Memory: 519.00M
+"input" in: xor.rb.drc:39
+ Polygons (raw): 16 (flat) 16 (hierarchical)
+ Elapsed: 0.000s Memory: 519.00M
+"^" in: xor.rb.drc:39
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.010s Memory: 519.00M
+XOR differences: 0
+"output" in: xor.rb.drc:43
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.000s Memory: 519.00M
+--- Running XOR for 81/14 ---
+"input" in: xor.rb.drc:39
+ Polygons (raw): 1 (flat) 1 (hierarchical)
+ Elapsed: 0.010s Memory: 519.00M
+"input" in: xor.rb.drc:39
+ Polygons (raw): 1 (flat) 1 (hierarchical)
+ Elapsed: 0.000s Memory: 519.00M
+"^" in: xor.rb.drc:39
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.010s Memory: 519.00M
+XOR differences: 0
+"output" in: xor.rb.drc:43
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.000s Memory: 519.00M
+Writing layout file: /mnt/uffs/user/u4699_anishsi/design/picorf0/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/outputs/user_project_wrapper.xor.gds ..
+Total elapsed: 0.130s Memory: 519.00M
diff --git a/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/logs/xor_check.total b/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/logs/xor_check.total
new file mode 100644
index 0000000..c227083
--- /dev/null
+++ b/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/logs/xor_check.total
@@ -0,0 +1 @@
+0
\ No newline at end of file
diff --git a/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/outputs/__user_project_wrapper.v b/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/outputs/__user_project_wrapper.v
new file mode 100644
index 0000000..98ff3a8
--- /dev/null
+++ b/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/outputs/__user_project_wrapper.v
@@ -0,0 +1,90 @@
+// SPDX-FileCopyrightText: 2020 Efabless Corporation
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+// SPDX-License-Identifier: Apache-2.0
+
+`default_nettype none
+/*
+ *-------------------------------------------------------------
+ *
+ * user_project_wrapper
+ *
+ * This wrapper enumerates all of the pins available to the
+ * user for the user project.
+ *
+ * An example user project is provided in this wrapper. The
+ * example should be removed and replaced with the actual
+ * user project.
+ *
+ *-------------------------------------------------------------
+ */
+
+module user_project_wrapper #(
+ parameter BITS = 32
+)(
+`ifdef USE_POWER_PINS
+ inout vdda1, // User area 1 3.3V supply
+ inout vdda2, // User area 2 3.3V supply
+ inout vssa1, // User area 1 analog ground
+ inout vssa2, // User area 2 analog ground
+ inout vccd1, // User area 1 1.8V supply
+ inout vccd2, // User area 2 1.8v supply
+ inout vssd1, // User area 1 digital ground
+ inout vssd2, // User area 2 digital ground
+`endif
+
+ // Wishbone Slave ports (WB MI A)
+ input wb_clk_i,
+ input wb_rst_i,
+ input wbs_stb_i,
+ input wbs_cyc_i,
+ input wbs_we_i,
+ input [3:0] wbs_sel_i,
+ input [31:0] wbs_dat_i,
+ input [31:0] wbs_adr_i,
+ output wbs_ack_o,
+ output [31:0] wbs_dat_o,
+
+ // Logic Analyzer Signals
+ input [127:0] la_data_in,
+ output [127:0] la_data_out,
+ input [127:0] la_oenb,
+
+ // IOs
+ input [`MPRJ_IO_PADS-1:0] io_in,
+ output [`MPRJ_IO_PADS-1:0] io_out,
+ output [`MPRJ_IO_PADS-1:0] io_oeb,
+
+ // Analog (direct connection to GPIO pad---use with caution)
+ // Note that analog I/O is not available on the 7 lowest-numbered
+ // GPIO pads, and so the analog_io indexing is offset from the
+ // GPIO indexing by 7 (also upper 2 GPIOs do not have analog_io).
+ inout [`MPRJ_IO_PADS-10:0] analog_io,
+
+ // Independent clock (on independent integer divider)
+ input user_clock2,
+
+ // User maskable interrupt signals
+ output [2:0] user_irq
+);
+
+// Dummy assignments so that we can take it through the openlane flow
+`ifdef SIM
+// Needed for running GL simulation
+assign io_out = 0;
+assign io_oeb = 0;
+`else
+assign io_out = io_in;
+`endif
+
+endmodule // user_project_wrapper
diff --git a/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/outputs/defines.v b/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/outputs/defines.v
new file mode 100644
index 0000000..9c3120c
--- /dev/null
+++ b/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/outputs/defines.v
@@ -0,0 +1,62 @@
+// SPDX-FileCopyrightText: 2020 Efabless Corporation
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+// SPDX-License-Identifier: Apache-2.0
+
+`default_nettype none
+
+`ifndef __GLOBAL_DEFINE_H
+// Global parameters
+`define __GLOBAL_DEFINE_H
+
+`define MPRJ_IO_PADS_1 19 /* number of user GPIO pads on user1 side */
+`define MPRJ_IO_PADS_2 19 /* number of user GPIO pads on user2 side */
+`define MPRJ_IO_PADS (`MPRJ_IO_PADS_1 + `MPRJ_IO_PADS_2)
+
+`define MPRJ_PWR_PADS_1 2 /* vdda1, vccd1 enable/disable control */
+`define MPRJ_PWR_PADS_2 2 /* vdda2, vccd2 enable/disable control */
+`define MPRJ_PWR_PADS (`MPRJ_PWR_PADS_1 + `MPRJ_PWR_PADS_2)
+
+// Analog pads are only used by the "caravan" module and associated
+// modules such as user_analog_project_wrapper and chip_io_alt.
+
+`define ANALOG_PADS_1 5
+`define ANALOG_PADS_2 6
+
+`define ANALOG_PADS (`ANALOG_PADS_1 + `ANALOG_PADS_2)
+
+// Size of soc_mem_synth
+
+// Type and size of soc_mem
+// `define USE_OPENRAM
+`define USE_CUSTOM_DFFRAM
+// don't change the following without double checking addr widths
+`define MEM_WORDS 256
+
+// Number of columns in the custom memory; takes one of three values:
+// 1 column : 1 KB, 2 column: 2 KB, 4 column: 4KB
+`define DFFRAM_WSIZE 4
+`define DFFRAM_USE_LATCH 0
+
+// not really parameterized but just to easily keep track of the number
+// of ram_block across different modules
+`define RAM_BLOCKS 2
+
+// Clock divisor default value
+`define CLK_DIV 3'b010
+
+// GPIO conrol default mode and enable
+`define DM_INIT 3'b110
+`define OENB_INIT 1'b1
+
+`endif // __GLOBAL_DEFINE_H
diff --git a/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/outputs/reports/klayout_beol_check.xml b/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/outputs/reports/klayout_beol_check.xml
new file mode 100644
index 0000000..6c8824f
--- /dev/null
+++ b/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/outputs/reports/klayout_beol_check.xml
@@ -0,0 +1,519 @@
+<?xml version="1.0" encoding="utf-8"?>
+<report-database>
+ <description>SKY130 DRC runset</description>
+ <original-file/>
+ <generator>drc: script='/opt/checks/tech-files/sky130A_mr.drc'</generator>
+ <top-cell>user_project_wrapper</top-cell>
+ <tags>
+ </tags>
+ <categories>
+ <category>
+ <name>li.1</name>
+ <description>li.1 : min. li width : 0.17um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>li.3</name>
+ <description>li.3 : min. li spacing : 0.17um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>li.5</name>
+ <description>li.5 : min. li enclosure of licon of 2 adjacent edges : 0.08um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>li.6</name>
+ <description>li.6 : min. li area : 0.0561um²</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ct.1</name>
+ <description>ct.1: non-ring mcon should be rectangular</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ct.1_a</name>
+ <description>ct.1_a : minimum width of mcon : 0.17um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ct.1_b</name>
+ <description>ct.1_b : maximum length of mcon : 0.17um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ct.2</name>
+ <description>ct.2 : min. mcon spacing : 0.19um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ct.3</name>
+ <description>ct.3 : min. width of ring-shaped mcon : 0.17um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ct.3_a</name>
+ <description>ct.3_a : max. width of ring-shaped mcon : 0.175um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ct.3_b</name>
+ <description>ct.3_b: ring-shaped mcon must be enclosed by areaid_sl</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ct.4</name>
+ <description>ct.4 : mcon should covered by li</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m1.1</name>
+ <description>m1.1 : min. m1 width : 0.14um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m1.2</name>
+ <description>m1.2 : min. m1 spacing : 0.14um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m1.3ab</name>
+ <description>m1.3ab : min. 3um.m1 spacing m1 : 0.28um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>791_m1.4</name>
+ <description>791_m1.4 : min. m1 enclosure of mcon : 0.03um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m1.4</name>
+ <description>m1.4 : mcon periphery must be enclosed by m1</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m1.4a</name>
+ <description>m1.4a : min. m1 enclosure of mcon for specific cells : 0.005um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m1.4a_a</name>
+ <description>m1.4a_a : mcon periph must be enclosed by met1 for specific cells</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m1.6</name>
+ <description>m1.6 : min. m1 area : 0.083um²</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m1.7</name>
+ <description>m1.7 : min. m1 with holes area : 0.14um²</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m1.5</name>
+ <description>m1.5 : min. m1 enclosure of mcon of 2 adjacent edges : 0.06um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via.1a</name>
+ <description>via.1a : via outside of moduleCut should be rectangular</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via.1a_a</name>
+ <description>via.1a_a : min. width of via outside of moduleCut : 0.15um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via.1a_b</name>
+ <description>via.1a_b : maximum length of via : 0.15um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via.2</name>
+ <description>via.2 : min. via spacing : 0.17um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via.3</name>
+ <description>via.3 : min. width of ring-shaped via : 0.2um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via.3_a</name>
+ <description>via.3_a : max. width of ring-shaped via : 0.205um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via.3_b</name>
+ <description>via.3_b: ring-shaped via must be enclosed by areaid_sl</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via.4a</name>
+ <description>via.4a : min. m1 enclosure of 0.15um via : 0.055um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via.4a_a</name>
+ <description>via.4a_a : via must be enclosed by met1</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via.5a</name>
+ <description>via.5a : min. m1 enclosure of 0.15um via of 2 adjacent edges : 0.085um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m2.1</name>
+ <description>m2.1 : min. m2 width : 0.14um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m2.2</name>
+ <description>m2.2 : min. m2 spacing : 0.14um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m2.3ab</name>
+ <description>m2.3ab : min. 3um.m2 spacing m2 : 0.28um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m2.6</name>
+ <description>m2.6 : min. m2 area : 0.0676um²</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m2.7</name>
+ <description>m2.7 : min. m2 holes area : 0.14um²</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m2.4</name>
+ <description>m2.4 : min. m2 enclosure of via : 0.055um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m2.4_a</name>
+ <description>m2.4_a : via in periphery must be enclosed by met2</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m2.5</name>
+ <description>m2.5 : min. m2 enclosure of via of 2 adjacent edges : 0.085um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via2.1a</name>
+ <description>via2.1a : via2 outside of moduleCut should be rectangular</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via2.1a_a</name>
+ <description>via2.1a_a : min. width of via2 outside of moduleCut : 0.2um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via2.1a_b</name>
+ <description>via2.1a_b : maximum length of via2 : 0.2um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via2.2</name>
+ <description>via2.2 : min. via2 spacing : 0.2um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via2.3</name>
+ <description>via2.3 : min. width of ring-shaped via2 : 0.2um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via2.3_a</name>
+ <description>via2.3_a : max. width of ring-shaped via2 : 0.205um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via2.3_b</name>
+ <description>via2.3_b: ring-shaped via2 must be enclosed by areaid_sl</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via2.4</name>
+ <description>via2.4 : min. m2 enclosure of via2 : 0.04um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via2.4_a</name>
+ <description>via2.4_a : via must be enclosed by met2</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via2.5</name>
+ <description>via2.5 : min. m3 enclosure of via2 of 2 adjacent edges : 0.085um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m3.1</name>
+ <description>m3.1 : min. m3 width : 0.3um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m3.2</name>
+ <description>m3.2 : min. m3 spacing : 0.3um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m3.3cd</name>
+ <description>m3.3cd : min. 3um.m3 spacing m3 : 0.4um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m3.4</name>
+ <description>m3.4 : min. m3 enclosure of via2 : 0.065um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m3.4_a</name>
+ <description>m3.4_a : via2 must be enclosed by met3</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via3.1</name>
+ <description>via3.1 : via3 outside of moduleCut should be rectangular</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via3.1_a</name>
+ <description>via3.1_a : min. width of via3 outside of moduleCut : 0.2um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via3.1_b</name>
+ <description>via3.1_b : maximum length of via3 : 0.2um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via3.2</name>
+ <description>via3.2 : min. via3 spacing : 0.2um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via3.4</name>
+ <description>via3.4 : min. m3 enclosure of via3 : 0.06um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via3.4_a</name>
+ <description>via3.4_a : non-ring via3 must be enclosed by met3</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via3.5</name>
+ <description>via3.5 : min. m3 enclosure of via3 of 2 adjacent edges : 0.09um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m4.1</name>
+ <description>m4.1 : min. m4 width : 0.3um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m4.2</name>
+ <description>m4.2 : min. m4 spacing : 0.3um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m4.4a</name>
+ <description>m4.4a : min. m4 area : 0.240um²</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m4.5ab</name>
+ <description>m4.5ab : min. 3um.m4 spacing m4 : 0.4um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m4.3</name>
+ <description>m4.3 : min. m4 enclosure of via3 : 0.065um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m4.3_a</name>
+ <description>m4.3_a : via3 must be enclosed by met4</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via4.1</name>
+ <description>via4.1 : via4 outside of moduleCut should be rectangular</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via4.1_a</name>
+ <description>via4.1_a : min. width of via4 outside of moduleCut : 0.8um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via4.1_b</name>
+ <description>via4.1_b : maximum length of via4 : 0.8um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via4.2</name>
+ <description>via4.2 : min. via4 spacing : 0.8um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via4.3</name>
+ <description>via4.3 : min. width of ring-shaped via4 : 0.8um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via4.3_a</name>
+ <description>via4.3_a : max. width of ring-shaped via4 : 0.805um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via4.3_b</name>
+ <description>via4.3_b: ring-shaped via4 must be enclosed by areaid_sl</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via4.4</name>
+ <description>via4.4 : min. m4 enclosure of via4 : 0.19um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via4.4_a</name>
+ <description>via4.4_a : m4 must enclose all via4</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m5.1</name>
+ <description>m5.1 : min. m5 width : 1.6um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m5.2</name>
+ <description>m5.2 : min. m5 spacing : 1.6um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m5.3</name>
+ <description>m5.3 : min. m5 enclosure of via4 : 0.31um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m5.3_a</name>
+ <description>m5.3_a : via must be enclosed by m5</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m5.4</name>
+ <description>m5.4 : min. m5 area : 4.0um²</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>pad.2</name>
+ <description>pad.2 : min. pad spacing : 1.27um</description>
+ <categories>
+ </categories>
+ </category>
+ </categories>
+ <cells>
+ <cell>
+ <name>user_project_wrapper</name>
+ <variant/>
+ <references>
+ </references>
+ </cell>
+ </cells>
+ <items>
+ </items>
+</report-database>
diff --git a/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/outputs/reports/klayout_feol_check.xml b/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/outputs/reports/klayout_feol_check.xml
new file mode 100644
index 0000000..d3b973b
--- /dev/null
+++ b/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/outputs/reports/klayout_feol_check.xml
@@ -0,0 +1,333 @@
+<?xml version="1.0" encoding="utf-8"?>
+<report-database>
+ <description>SKY130 DRC runset</description>
+ <original-file/>
+ <generator>drc: script='/opt/checks/tech-files/sky130A_mr.drc'</generator>
+ <top-cell>user_project_wrapper</top-cell>
+ <tags>
+ </tags>
+ <categories>
+ <category>
+ <name>dnwell.2</name>
+ <description>dnwell.2 : min. dnwell width : 3.0um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>nwell.1</name>
+ <description>nwell.1 : min. nwell width : 0.84um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>nwell.2a</name>
+ <description>nwell.2a : min. nwell spacing (merged if less) : 1.27um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvtp.1</name>
+ <description>hvtp.1 : min. hvtp width : 0.38um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvtp.2</name>
+ <description>hvtp.2 : min. hvtp spacing : 0.38um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvtr.1</name>
+ <description>hvtr.1 : min. hvtr width : 0.38um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvtr.2</name>
+ <description>hvtr.2 : min. hvtr spacing : 0.38um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvtr.2_a</name>
+ <description>hvtr.2_a : hvtr must not overlap hvtp</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>lvtn.1a</name>
+ <description>lvtn.1a : min. lvtn width : 0.38um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>lvtn.2</name>
+ <description>lvtn.2 : min. lvtn spacing : 0.38um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ncm.1</name>
+ <description>ncm.1 : min. ncm width : 0.38um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ncm.2a</name>
+ <description>ncm.2a : min. ncm spacing : 0.38um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>difftap.1</name>
+ <description>difftap.1 : min. diff width across areaid:ce : 0.15um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>difftap.1_a</name>
+ <description>difftap.1_a : min. diff width in periphery : 0.15um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>difftap.1_b</name>
+ <description>difftap.1_b : min. tap width across areaid:ce : 0.15um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>difftap.1_c</name>
+ <description>difftap.1_c : min. tap width in periphery : 0.15um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>difftap.3</name>
+ <description>difftap.3 : min. difftap spacing : 0.27um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>tunm.1</name>
+ <description>tunm.1 : min. tunm width : 0.41um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>tunm.2</name>
+ <description>tunm.2 : min. tunm spacing : 0.5um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>poly.1a</name>
+ <description>poly.1a : min. poly width : 0.15um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>poly.2</name>
+ <description>poly.2 : min. poly spacing : 0.21um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>rpm.1a</name>
+ <description>rpm.1a : min. rpm width : 1.27um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>rpm.2</name>
+ <description>rpm.2 : min. rpm spacing : 0.84um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>urpm.1a</name>
+ <description>urpm.1a : min. rpm width : 1.27um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>urpm.2</name>
+ <description>urpm.2 : min. rpm spacing : 0.84um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>npc.1</name>
+ <description>npc.1 : min. npc width : 0.27um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>npc.2</name>
+ <description>npc.2 : min. npc spacing, should be mnually merge if less : 0.27um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>licon.1</name>
+ <description>licon.1 : licon should be rectangle</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>licon.1_a/b</name>
+ <description>licon.1_a/b : minimum/maximum width of licon : 0.17um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>licon.13</name>
+ <description>licon.13 : min. difftap licon spacing to npc : 0.09um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>licon.13_a</name>
+ <description>licon.13_a : licon of diffTap in periphery must not overlap npc</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>licon.17</name>
+ <description>licon.17 : Licons may not overlap both poly and (diff or tap)</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>capm.1</name>
+ <description>capm.1 : min. capm width : 1.0um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>capm.2a</name>
+ <description>capm.2a : min. capm spacing : 0.84um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>capm.2b</name>
+ <description>capm.2b : min. capm spacing : 1.2um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>capm.2b_a</name>
+ <description>capm.2b_a : min. spacing of m3_bot_plate : 1.2um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>capm.3</name>
+ <description>capm.3 : min. capm and m3 enclosure of m3 : 0.14um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>capm.3_a</name>
+ <description>capm.3_a : min. m3 enclosure of capm : 0.14um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>capm.4</name>
+ <description>capm.4 : min. capm enclosure of via3 : 0.14um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>capm.5</name>
+ <description>capm.5 : min. capm spacing to via3 : 0.14um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>cap2m.1</name>
+ <description>cap2m.1 : min. cap2m width : 1.0um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>cap2m.2a</name>
+ <description>cap2m.2a : min. cap2m spacing : 0.84um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>cap2m.2b</name>
+ <description>cap2m.2b : min. cap2m spacing : 1.2um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>cap2m.2b_a</name>
+ <description>cap2m.2b_a : min. spacing of m4_bot_plate : 1.2um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>cap2m.3</name>
+ <description>cap2m.3 : min. m4 enclosure of cap2m : 0.14um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>cap2m.3_a</name>
+ <description>cap2m.3_a : min. m4 enclosure of cap2m : 0.14um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>cap2m.4</name>
+ <description>cap2m.4 : min. cap2m enclosure of via4 : 0.14um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>cap2m.5</name>
+ <description>cap2m.5 : min. cap2m spacing to via4 : 0.14um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvi.1</name>
+ <description>hvi.1 : min. hvi width : 0.6um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvi.2a</name>
+ <description>hvi.2a : min. hvi spacing : 0.7um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvntm.1</name>
+ <description>hvntm.1 : min. hvntm width : 0.7um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvntm.2</name>
+ <description>hvntm.2 : min. hvntm spacing : 0.7um</description>
+ <categories>
+ </categories>
+ </category>
+ </categories>
+ <cells>
+ <cell>
+ <name>user_project_wrapper</name>
+ <variant/>
+ <references>
+ </references>
+ </cell>
+ </cells>
+ <items>
+ </items>
+</report-database>
diff --git a/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/outputs/reports/klayout_met_min_ca_density_check.xml b/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/outputs/reports/klayout_met_min_ca_density_check.xml
new file mode 100644
index 0000000..698a39a
--- /dev/null
+++ b/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/outputs/reports/klayout_met_min_ca_density_check.xml
@@ -0,0 +1,21 @@
+<?xml version="1.0" encoding="utf-8"?>
+<report-database>
+ <description>Density Checks</description>
+ <original-file/>
+ <generator>drc: script='/opt/checks/drc_checks/klayout/met_min_ca_density.lydrc'</generator>
+ <top-cell>user_project_wrapper</top-cell>
+ <tags>
+ </tags>
+ <categories>
+ </categories>
+ <cells>
+ <cell>
+ <name>user_project_wrapper</name>
+ <variant/>
+ <references>
+ </references>
+ </cell>
+ </cells>
+ <items>
+ </items>
+</report-database>
diff --git a/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/outputs/reports/klayout_offgrid_check.xml b/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/outputs/reports/klayout_offgrid_check.xml
new file mode 100644
index 0000000..fa00f7c
--- /dev/null
+++ b/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/outputs/reports/klayout_offgrid_check.xml
@@ -0,0 +1,483 @@
+<?xml version="1.0" encoding="utf-8"?>
+<report-database>
+ <description>SKY130 DRC runset</description>
+ <original-file/>
+ <generator>drc: script='/opt/checks/drc_checks/klayout/offgrid.lydrc'</generator>
+ <top-cell>user_project_wrapper</top-cell>
+ <tags>
+ </tags>
+ <categories>
+ <category>
+ <name>dnwell_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on dnwell</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>dnwell_angle</name>
+ <description>x.3a : non 45 degree angle dnwell</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>nwell_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on nwell</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>nwell_angle</name>
+ <description>x.3a : non 45 degree angle nwell</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>pwbm_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on pwbm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>pwbm_angle</name>
+ <description>x.3a : non 45 degree angle pwbm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>pwde_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on pwde</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>pwde_angle</name>
+ <description>x.3a : non 45 degree angle pwde</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvtp_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on hvtp</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvtp_angle</name>
+ <description>x.3a : non 45 degree angle hvtp</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvtr_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on hvtr</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvtr_angle</name>
+ <description>x.3a : non 45 degree angle hvtr</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>lvtn_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on lvtn</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>lvtn_angle</name>
+ <description>x.3a : non 45 degree angle lvtn</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ncm_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on ncm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ncm_angle</name>
+ <description>x.3a : non 45 degree angle ncm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>diff_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on diff</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>tap_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on tap</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>diff_angle</name>
+ <description>x.2 : non 90 degree angle diff</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>diff_angle</name>
+ <description>x.2c : non 45 degree angle diff</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>tap_angle</name>
+ <description>x.2 : non 90 degree angle tap</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>tap_angle</name>
+ <description>x.2c : non 45 degree angle tap</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>tunm_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on tunm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>tunm_angle</name>
+ <description>x.3a : non 45 degree angle tunm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>poly_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on poly</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>poly_angle</name>
+ <description>x.2 : non 90 degree angle poly</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>rpm_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on rpm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>rpm_angle</name>
+ <description>x.3a : non 45 degree angle rpm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>npc_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on npc</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>npc_angle</name>
+ <description>x.3a : non 45 degree angle npc</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>nsdm_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on nsdm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>nsdm_angle</name>
+ <description>x.3a : non 45 degree angle nsdm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>psdm_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on psdm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>psdm_angle</name>
+ <description>x.3a : non 45 degree angle psdm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>licon_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on licon</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>licon_angle</name>
+ <description>x.2 : non 90 degree angle licon</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>li_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on li</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>li_angle</name>
+ <description>x.3a : non 45 degree angle li</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ct_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on mcon</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ct_angle</name>
+ <description>x.2 : non 90 degree angle mcon</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>vpp_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on vpp</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>vpp_angle</name>
+ <description>x.3a : non 45 degree angle vpp</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m1_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on m1</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m1_angle</name>
+ <description>x.3a : non 45 degree angle m1</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on via</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via_angle</name>
+ <description>x.2 : non 90 degree angle via</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m2_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on m2</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m2_angle</name>
+ <description>x.3a : non 45 degree angle m2</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via2_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on via2</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via2_angle</name>
+ <description>x.2 : non 90 degree angle via2</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m3_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on m3</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m3_angle</name>
+ <description>x.3a : non 45 degree angle m3</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via3_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on via3</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via3_angle</name>
+ <description>x.2 : non 90 degree angle via3</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>nsm_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on nsm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>nsm_angle</name>
+ <description>x.3a : non 45 degree angle nsm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m4_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on m4</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m4_angle</name>
+ <description>x.3a : non 45 degree angle m4</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via4_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on via4</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via4_angle</name>
+ <description>x.2 : non 90 degree angle via4</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m5_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on m5</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m5_angle</name>
+ <description>x.3a : non 45 degree angle m5</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>pad_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on pad</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>pad_angle</name>
+ <description>x.3a : non 45 degree angle pad</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>mf_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on mf</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>mf_angle</name>
+ <description>x.2 : non 90 degree angle mf</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvi_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on hvi</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvi_angle</name>
+ <description>x.3a : non 45 degree angle hvi</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvntm_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on hvntm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvntm_angle</name>
+ <description>x.3a : non 45 degree angle hvntm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>vhvi_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on vhvi</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>vhvi_angle</name>
+ <description>x.3a : non 45 degree angle vhvi</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>uhvi_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on uhvi</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>uhvi_angle</name>
+ <description>x.3a : non 45 degree angle uhvi</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>pwell_rs_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on pwell_rs</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>pwell_rs_angle</name>
+ <description>x.3a : non 45 degree angle pwell_rs</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>areaid_re_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on areaid.re</description>
+ <categories>
+ </categories>
+ </category>
+ </categories>
+ <cells>
+ <cell>
+ <name>user_project_wrapper</name>
+ <variant/>
+ <references>
+ </references>
+ </cell>
+ </cells>
+ <items>
+ </items>
+</report-database>
diff --git a/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/outputs/reports/klayout_pin_label_purposes_overlapping_drawing_check.xml b/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/outputs/reports/klayout_pin_label_purposes_overlapping_drawing_check.xml
new file mode 100644
index 0000000..f993602
--- /dev/null
+++ b/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/outputs/reports/klayout_pin_label_purposes_overlapping_drawing_check.xml
@@ -0,0 +1,21 @@
+<?xml version="1.0" encoding="utf-8"?>
+<report-database>
+ <description>pin_label_purposes_overlapping_drawing.rb.drc, input=/root/picorf0/gds/user_project_wrapper.gds, topcell=user_project_wrapper</description>
+ <original-file/>
+ <generator>drc: script='/opt/checks/drc_checks/klayout/pin_label_purposes_overlapping_drawing.rb.drc'</generator>
+ <top-cell>user_project_wrapper</top-cell>
+ <tags>
+ </tags>
+ <categories>
+ </categories>
+ <cells>
+ <cell>
+ <name>user_project_wrapper</name>
+ <variant/>
+ <references>
+ </references>
+ </cell>
+ </cells>
+ <items>
+ </items>
+</report-database>
diff --git a/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/outputs/reports/klayout_zeroarea_check.xml b/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/outputs/reports/klayout_zeroarea_check.xml
new file mode 100644
index 0000000..7f95f69
--- /dev/null
+++ b/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/outputs/reports/klayout_zeroarea_check.xml
@@ -0,0 +1,21 @@
+<?xml version="1.0" encoding="utf-8"?>
+<report-database>
+ <description>zero area check</description>
+ <original-file/>
+ <generator>drc: script='/opt/checks/drc_checks/klayout/zeroarea.rb.drc'</generator>
+ <top-cell>user_project_wrapper</top-cell>
+ <tags>
+ </tags>
+ <categories>
+ </categories>
+ <cells>
+ <cell>
+ <name>user_project_wrapper</name>
+ <variant/>
+ <references>
+ </references>
+ </cell>
+ </cells>
+ <items>
+ </items>
+</report-database>
diff --git a/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/outputs/reports/magic_drc_check.drc.report b/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/outputs/reports/magic_drc_check.drc.report
new file mode 100644
index 0000000..46ca7f3
--- /dev/null
+++ b/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/outputs/reports/magic_drc_check.drc.report
@@ -0,0 +1,5 @@
+user_project_wrapper
+----------------------------------------
+[INFO]: COUNT: 0
+[INFO]: Should be divided by 3 or 4
+
diff --git a/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/outputs/reports/magic_drc_check.rdb b/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/outputs/reports/magic_drc_check.rdb
new file mode 100644
index 0000000..ac5b3c4
--- /dev/null
+++ b/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/outputs/reports/magic_drc_check.rdb
@@ -0,0 +1,2 @@
+$user_project_wrapper
+ 100
diff --git a/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/outputs/reports/magic_drc_check.tcl b/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/outputs/reports/magic_drc_check.tcl
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/outputs/reports/magic_drc_check.tcl
diff --git a/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/outputs/reports/magic_drc_check.tr b/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/outputs/reports/magic_drc_check.tr
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/outputs/reports/magic_drc_check.tr
diff --git a/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/outputs/reports/magic_drc_check.xml b/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/outputs/reports/magic_drc_check.xml
new file mode 100644
index 0000000..0eff265
--- /dev/null
+++ b/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/outputs/reports/magic_drc_check.xml
@@ -0,0 +1,10 @@
+<?xml version="1.0" ?>
+<report-database>
+ <categories/>
+ <cells>
+ <cell>
+ <name>user_project_wrapper</name>
+ </cell>
+ </cells>
+ <items/>
+</report-database>
diff --git a/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/outputs/user_project_wrapper.filtered.v b/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/outputs/user_project_wrapper.filtered.v
new file mode 100644
index 0000000..57e0bc6
--- /dev/null
+++ b/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/outputs/user_project_wrapper.filtered.v
@@ -0,0 +1,666 @@
+module user_project_wrapper (user_clock2,
+ vccd1,
+ vccd2,
+ vdda1,
+ vdda2,
+ vssa1,
+ vssa2,
+ vssd1,
+ vssd2,
+ wb_clk_i,
+ wb_rst_i,
+ wbs_ack_o,
+ wbs_cyc_i,
+ wbs_stb_i,
+ wbs_we_i,
+ analog_io,
+ io_in,
+ io_oeb,
+ io_out,
+ la_data_in,
+ la_data_out,
+ la_oenb,
+ user_irq,
+ wbs_adr_i,
+ wbs_dat_i,
+ wbs_dat_o,
+ wbs_sel_i);
+ input user_clock2;
+ input vccd1;
+ input vccd2;
+ input vdda1;
+ input vdda2;
+ input vssa1;
+ input vssa2;
+ input vssd1;
+ input vssd2;
+ input wb_clk_i;
+ input wb_rst_i;
+ output wbs_ack_o;
+ input wbs_cyc_i;
+ input wbs_stb_i;
+ input wbs_we_i;
+ inout [28:0] analog_io;
+ input [37:0] io_in;
+ output [37:0] io_oeb;
+ output [37:0] io_out;
+ input [127:0] la_data_in;
+ output [127:0] la_data_out;
+ input [127:0] la_oenb;
+ output [2:0] user_irq;
+ input [31:0] wbs_adr_i;
+ input [31:0] wbs_dat_i;
+ output [31:0] wbs_dat_o;
+ input [3:0] wbs_sel_i;
+
+
+ user_proj mprj (.vccd1(vccd1),
+ .vssd1(vssd1),
+ .wb_clk_i(wb_clk_i),
+ .wb_rst_i(wb_rst_i),
+ .wbs_ack_o(wbs_ack_o),
+ .wbs_cyc_i(wbs_cyc_i),
+ .wbs_stb_i(wbs_stb_i),
+ .wbs_we_i(wbs_we_i),
+ .io_in({io_in[37],
+ io_in[36],
+ io_in[35],
+ io_in[34],
+ io_in[33],
+ io_in[32],
+ io_in[31],
+ io_in[30],
+ io_in[29],
+ io_in[28],
+ io_in[27],
+ io_in[26],
+ io_in[25],
+ io_in[24],
+ io_in[23],
+ io_in[22],
+ io_in[21],
+ io_in[20],
+ io_in[19],
+ io_in[18],
+ io_in[17],
+ io_in[16],
+ io_in[15],
+ io_in[14],
+ io_in[13],
+ io_in[12],
+ io_in[11],
+ io_in[10],
+ io_in[9],
+ io_in[8],
+ io_in[7],
+ io_in[6],
+ io_in[5],
+ io_in[4],
+ io_in[3],
+ io_in[2],
+ io_in[1],
+ io_in[0]}),
+ .io_oeb({io_oeb[37],
+ io_oeb[36],
+ io_oeb[35],
+ io_oeb[34],
+ io_oeb[33],
+ io_oeb[32],
+ io_oeb[31],
+ io_oeb[30],
+ io_oeb[29],
+ io_oeb[28],
+ io_oeb[27],
+ io_oeb[26],
+ io_oeb[25],
+ io_oeb[24],
+ io_oeb[23],
+ io_oeb[22],
+ io_oeb[21],
+ io_oeb[20],
+ io_oeb[19],
+ io_oeb[18],
+ io_oeb[17],
+ io_oeb[16],
+ io_oeb[15],
+ io_oeb[14],
+ io_oeb[13],
+ io_oeb[12],
+ io_oeb[11],
+ io_oeb[10],
+ io_oeb[9],
+ io_oeb[8],
+ io_oeb[7],
+ io_oeb[6],
+ io_oeb[5],
+ io_oeb[4],
+ io_oeb[3],
+ io_oeb[2],
+ io_oeb[1],
+ io_oeb[0]}),
+ .io_out({io_out[37],
+ io_out[36],
+ io_out[35],
+ io_out[34],
+ io_out[33],
+ io_out[32],
+ io_out[31],
+ io_out[30],
+ io_out[29],
+ io_out[28],
+ io_out[27],
+ io_out[26],
+ io_out[25],
+ io_out[24],
+ io_out[23],
+ io_out[22],
+ io_out[21],
+ io_out[20],
+ io_out[19],
+ io_out[18],
+ io_out[17],
+ io_out[16],
+ io_out[15],
+ io_out[14],
+ io_out[13],
+ io_out[12],
+ io_out[11],
+ io_out[10],
+ io_out[9],
+ io_out[8],
+ io_out[7],
+ io_out[6],
+ io_out[5],
+ io_out[4],
+ io_out[3],
+ io_out[2],
+ io_out[1],
+ io_out[0]}),
+ .irq({user_irq[2],
+ user_irq[1],
+ user_irq[0]}),
+ .la_data_in({la_data_in[127],
+ la_data_in[126],
+ la_data_in[125],
+ la_data_in[124],
+ la_data_in[123],
+ la_data_in[122],
+ la_data_in[121],
+ la_data_in[120],
+ la_data_in[119],
+ la_data_in[118],
+ la_data_in[117],
+ la_data_in[116],
+ la_data_in[115],
+ la_data_in[114],
+ la_data_in[113],
+ la_data_in[112],
+ la_data_in[111],
+ la_data_in[110],
+ la_data_in[109],
+ la_data_in[108],
+ la_data_in[107],
+ la_data_in[106],
+ la_data_in[105],
+ la_data_in[104],
+ la_data_in[103],
+ la_data_in[102],
+ la_data_in[101],
+ la_data_in[100],
+ la_data_in[99],
+ la_data_in[98],
+ la_data_in[97],
+ la_data_in[96],
+ la_data_in[95],
+ la_data_in[94],
+ la_data_in[93],
+ la_data_in[92],
+ la_data_in[91],
+ la_data_in[90],
+ la_data_in[89],
+ la_data_in[88],
+ la_data_in[87],
+ la_data_in[86],
+ la_data_in[85],
+ la_data_in[84],
+ la_data_in[83],
+ la_data_in[82],
+ la_data_in[81],
+ la_data_in[80],
+ la_data_in[79],
+ la_data_in[78],
+ la_data_in[77],
+ la_data_in[76],
+ la_data_in[75],
+ la_data_in[74],
+ la_data_in[73],
+ la_data_in[72],
+ la_data_in[71],
+ la_data_in[70],
+ la_data_in[69],
+ la_data_in[68],
+ la_data_in[67],
+ la_data_in[66],
+ la_data_in[65],
+ la_data_in[64],
+ la_data_in[63],
+ la_data_in[62],
+ la_data_in[61],
+ la_data_in[60],
+ la_data_in[59],
+ la_data_in[58],
+ la_data_in[57],
+ la_data_in[56],
+ la_data_in[55],
+ la_data_in[54],
+ la_data_in[53],
+ la_data_in[52],
+ la_data_in[51],
+ la_data_in[50],
+ la_data_in[49],
+ la_data_in[48],
+ la_data_in[47],
+ la_data_in[46],
+ la_data_in[45],
+ la_data_in[44],
+ la_data_in[43],
+ la_data_in[42],
+ la_data_in[41],
+ la_data_in[40],
+ la_data_in[39],
+ la_data_in[38],
+ la_data_in[37],
+ la_data_in[36],
+ la_data_in[35],
+ la_data_in[34],
+ la_data_in[33],
+ la_data_in[32],
+ la_data_in[31],
+ la_data_in[30],
+ la_data_in[29],
+ la_data_in[28],
+ la_data_in[27],
+ la_data_in[26],
+ la_data_in[25],
+ la_data_in[24],
+ la_data_in[23],
+ la_data_in[22],
+ la_data_in[21],
+ la_data_in[20],
+ la_data_in[19],
+ la_data_in[18],
+ la_data_in[17],
+ la_data_in[16],
+ la_data_in[15],
+ la_data_in[14],
+ la_data_in[13],
+ la_data_in[12],
+ la_data_in[11],
+ la_data_in[10],
+ la_data_in[9],
+ la_data_in[8],
+ la_data_in[7],
+ la_data_in[6],
+ la_data_in[5],
+ la_data_in[4],
+ la_data_in[3],
+ la_data_in[2],
+ la_data_in[1],
+ la_data_in[0]}),
+ .la_data_out({la_data_out[127],
+ la_data_out[126],
+ la_data_out[125],
+ la_data_out[124],
+ la_data_out[123],
+ la_data_out[122],
+ la_data_out[121],
+ la_data_out[120],
+ la_data_out[119],
+ la_data_out[118],
+ la_data_out[117],
+ la_data_out[116],
+ la_data_out[115],
+ la_data_out[114],
+ la_data_out[113],
+ la_data_out[112],
+ la_data_out[111],
+ la_data_out[110],
+ la_data_out[109],
+ la_data_out[108],
+ la_data_out[107],
+ la_data_out[106],
+ la_data_out[105],
+ la_data_out[104],
+ la_data_out[103],
+ la_data_out[102],
+ la_data_out[101],
+ la_data_out[100],
+ la_data_out[99],
+ la_data_out[98],
+ la_data_out[97],
+ la_data_out[96],
+ la_data_out[95],
+ la_data_out[94],
+ la_data_out[93],
+ la_data_out[92],
+ la_data_out[91],
+ la_data_out[90],
+ la_data_out[89],
+ la_data_out[88],
+ la_data_out[87],
+ la_data_out[86],
+ la_data_out[85],
+ la_data_out[84],
+ la_data_out[83],
+ la_data_out[82],
+ la_data_out[81],
+ la_data_out[80],
+ la_data_out[79],
+ la_data_out[78],
+ la_data_out[77],
+ la_data_out[76],
+ la_data_out[75],
+ la_data_out[74],
+ la_data_out[73],
+ la_data_out[72],
+ la_data_out[71],
+ la_data_out[70],
+ la_data_out[69],
+ la_data_out[68],
+ la_data_out[67],
+ la_data_out[66],
+ la_data_out[65],
+ la_data_out[64],
+ la_data_out[63],
+ la_data_out[62],
+ la_data_out[61],
+ la_data_out[60],
+ la_data_out[59],
+ la_data_out[58],
+ la_data_out[57],
+ la_data_out[56],
+ la_data_out[55],
+ la_data_out[54],
+ la_data_out[53],
+ la_data_out[52],
+ la_data_out[51],
+ la_data_out[50],
+ la_data_out[49],
+ la_data_out[48],
+ la_data_out[47],
+ la_data_out[46],
+ la_data_out[45],
+ la_data_out[44],
+ la_data_out[43],
+ la_data_out[42],
+ la_data_out[41],
+ la_data_out[40],
+ la_data_out[39],
+ la_data_out[38],
+ la_data_out[37],
+ la_data_out[36],
+ la_data_out[35],
+ la_data_out[34],
+ la_data_out[33],
+ la_data_out[32],
+ la_data_out[31],
+ la_data_out[30],
+ la_data_out[29],
+ la_data_out[28],
+ la_data_out[27],
+ la_data_out[26],
+ la_data_out[25],
+ la_data_out[24],
+ la_data_out[23],
+ la_data_out[22],
+ la_data_out[21],
+ la_data_out[20],
+ la_data_out[19],
+ la_data_out[18],
+ la_data_out[17],
+ la_data_out[16],
+ la_data_out[15],
+ la_data_out[14],
+ la_data_out[13],
+ la_data_out[12],
+ la_data_out[11],
+ la_data_out[10],
+ la_data_out[9],
+ la_data_out[8],
+ la_data_out[7],
+ la_data_out[6],
+ la_data_out[5],
+ la_data_out[4],
+ la_data_out[3],
+ la_data_out[2],
+ la_data_out[1],
+ la_data_out[0]}),
+ .la_oenb({la_oenb[127],
+ la_oenb[126],
+ la_oenb[125],
+ la_oenb[124],
+ la_oenb[123],
+ la_oenb[122],
+ la_oenb[121],
+ la_oenb[120],
+ la_oenb[119],
+ la_oenb[118],
+ la_oenb[117],
+ la_oenb[116],
+ la_oenb[115],
+ la_oenb[114],
+ la_oenb[113],
+ la_oenb[112],
+ la_oenb[111],
+ la_oenb[110],
+ la_oenb[109],
+ la_oenb[108],
+ la_oenb[107],
+ la_oenb[106],
+ la_oenb[105],
+ la_oenb[104],
+ la_oenb[103],
+ la_oenb[102],
+ la_oenb[101],
+ la_oenb[100],
+ la_oenb[99],
+ la_oenb[98],
+ la_oenb[97],
+ la_oenb[96],
+ la_oenb[95],
+ la_oenb[94],
+ la_oenb[93],
+ la_oenb[92],
+ la_oenb[91],
+ la_oenb[90],
+ la_oenb[89],
+ la_oenb[88],
+ la_oenb[87],
+ la_oenb[86],
+ la_oenb[85],
+ la_oenb[84],
+ la_oenb[83],
+ la_oenb[82],
+ la_oenb[81],
+ la_oenb[80],
+ la_oenb[79],
+ la_oenb[78],
+ la_oenb[77],
+ la_oenb[76],
+ la_oenb[75],
+ la_oenb[74],
+ la_oenb[73],
+ la_oenb[72],
+ la_oenb[71],
+ la_oenb[70],
+ la_oenb[69],
+ la_oenb[68],
+ la_oenb[67],
+ la_oenb[66],
+ la_oenb[65],
+ la_oenb[64],
+ la_oenb[63],
+ la_oenb[62],
+ la_oenb[61],
+ la_oenb[60],
+ la_oenb[59],
+ la_oenb[58],
+ la_oenb[57],
+ la_oenb[56],
+ la_oenb[55],
+ la_oenb[54],
+ la_oenb[53],
+ la_oenb[52],
+ la_oenb[51],
+ la_oenb[50],
+ la_oenb[49],
+ la_oenb[48],
+ la_oenb[47],
+ la_oenb[46],
+ la_oenb[45],
+ la_oenb[44],
+ la_oenb[43],
+ la_oenb[42],
+ la_oenb[41],
+ la_oenb[40],
+ la_oenb[39],
+ la_oenb[38],
+ la_oenb[37],
+ la_oenb[36],
+ la_oenb[35],
+ la_oenb[34],
+ la_oenb[33],
+ la_oenb[32],
+ la_oenb[31],
+ la_oenb[30],
+ la_oenb[29],
+ la_oenb[28],
+ la_oenb[27],
+ la_oenb[26],
+ la_oenb[25],
+ la_oenb[24],
+ la_oenb[23],
+ la_oenb[22],
+ la_oenb[21],
+ la_oenb[20],
+ la_oenb[19],
+ la_oenb[18],
+ la_oenb[17],
+ la_oenb[16],
+ la_oenb[15],
+ la_oenb[14],
+ la_oenb[13],
+ la_oenb[12],
+ la_oenb[11],
+ la_oenb[10],
+ la_oenb[9],
+ la_oenb[8],
+ la_oenb[7],
+ la_oenb[6],
+ la_oenb[5],
+ la_oenb[4],
+ la_oenb[3],
+ la_oenb[2],
+ la_oenb[1],
+ la_oenb[0]}),
+ .wbs_adr_i({wbs_adr_i[31],
+ wbs_adr_i[30],
+ wbs_adr_i[29],
+ wbs_adr_i[28],
+ wbs_adr_i[27],
+ wbs_adr_i[26],
+ wbs_adr_i[25],
+ wbs_adr_i[24],
+ wbs_adr_i[23],
+ wbs_adr_i[22],
+ wbs_adr_i[21],
+ wbs_adr_i[20],
+ wbs_adr_i[19],
+ wbs_adr_i[18],
+ wbs_adr_i[17],
+ wbs_adr_i[16],
+ wbs_adr_i[15],
+ wbs_adr_i[14],
+ wbs_adr_i[13],
+ wbs_adr_i[12],
+ wbs_adr_i[11],
+ wbs_adr_i[10],
+ wbs_adr_i[9],
+ wbs_adr_i[8],
+ wbs_adr_i[7],
+ wbs_adr_i[6],
+ wbs_adr_i[5],
+ wbs_adr_i[4],
+ wbs_adr_i[3],
+ wbs_adr_i[2],
+ wbs_adr_i[1],
+ wbs_adr_i[0]}),
+ .wbs_dat_i({wbs_dat_i[31],
+ wbs_dat_i[30],
+ wbs_dat_i[29],
+ wbs_dat_i[28],
+ wbs_dat_i[27],
+ wbs_dat_i[26],
+ wbs_dat_i[25],
+ wbs_dat_i[24],
+ wbs_dat_i[23],
+ wbs_dat_i[22],
+ wbs_dat_i[21],
+ wbs_dat_i[20],
+ wbs_dat_i[19],
+ wbs_dat_i[18],
+ wbs_dat_i[17],
+ wbs_dat_i[16],
+ wbs_dat_i[15],
+ wbs_dat_i[14],
+ wbs_dat_i[13],
+ wbs_dat_i[12],
+ wbs_dat_i[11],
+ wbs_dat_i[10],
+ wbs_dat_i[9],
+ wbs_dat_i[8],
+ wbs_dat_i[7],
+ wbs_dat_i[6],
+ wbs_dat_i[5],
+ wbs_dat_i[4],
+ wbs_dat_i[3],
+ wbs_dat_i[2],
+ wbs_dat_i[1],
+ wbs_dat_i[0]}),
+ .wbs_dat_o({wbs_dat_o[31],
+ wbs_dat_o[30],
+ wbs_dat_o[29],
+ wbs_dat_o[28],
+ wbs_dat_o[27],
+ wbs_dat_o[26],
+ wbs_dat_o[25],
+ wbs_dat_o[24],
+ wbs_dat_o[23],
+ wbs_dat_o[22],
+ wbs_dat_o[21],
+ wbs_dat_o[20],
+ wbs_dat_o[19],
+ wbs_dat_o[18],
+ wbs_dat_o[17],
+ wbs_dat_o[16],
+ wbs_dat_o[15],
+ wbs_dat_o[14],
+ wbs_dat_o[13],
+ wbs_dat_o[12],
+ wbs_dat_o[11],
+ wbs_dat_o[10],
+ wbs_dat_o[9],
+ wbs_dat_o[8],
+ wbs_dat_o[7],
+ wbs_dat_o[6],
+ wbs_dat_o[5],
+ wbs_dat_o[4],
+ wbs_dat_o[3],
+ wbs_dat_o[2],
+ wbs_dat_o[1],
+ wbs_dat_o[0]}),
+ .wbs_sel_i({wbs_sel_i[3],
+ wbs_sel_i[2],
+ wbs_sel_i[1],
+ wbs_sel_i[0]}));
+endmodule
diff --git a/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/outputs/user_project_wrapper.magic.drc.mag b/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/outputs/user_project_wrapper.magic.drc.mag
new file mode 100644
index 0000000..86bc975
--- /dev/null
+++ b/jobs/mpw_precheck/107b88dc-27db-48f9-892c-3eadf7b6eb20/outputs/user_project_wrapper.magic.drc.mag
@@ -0,0 +1,35548 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1636955688
+<< checkpaint >>
+rect -12658 -11586 596582 715522
+<< locali >>
+rect 324329 523651 324363 524297
+rect 274097 519299 274131 520217
+rect 275661 519095 275695 520217
+rect 286793 519231 286827 520217
+rect 370237 519367 370271 520217
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+rect 387809 519163 387843 520217
+rect 273947 336481 274741 336515
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+rect 281181 335495 281215 335801
+rect 289921 335699 289955 336617
+rect 372629 335903 372663 336413
+rect 379253 336107 379287 336209
+rect 381921 336175 381955 336345
+rect 382289 336107 382323 336413
+rect 282193 335427 282227 335597
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+rect 413109 335359 413143 335733
+rect 413477 335427 413511 335597
+rect 407865 333387 407899 333897
+rect 294245 321555 294279 326417
+rect 582389 19839 582423 520353
+rect 258123 8109 258457 8143
+rect 258089 7871 258123 7973
+rect 432521 7327 432555 7429
+rect 271245 4471 271279 5117
+rect 84301 4097 84577 4131
+rect 84301 4063 84335 4097
+rect 320557 3961 320741 3995
+rect 320557 3927 320591 3961
+rect 324329 3927 324363 4165
+rect 320649 3893 321017 3927
+rect 320649 3791 320683 3893
+rect 320223 3757 320373 3791
+rect 320097 3587 320131 3689
+rect 320097 3553 320281 3587
+rect 41429 3383 41463 3553
+rect 327733 3519 327767 3825
+rect 327917 3587 327951 3961
+rect 354137 3519 354171 3621
+rect 327917 3315 327951 3417
+rect 102149 3111 102183 3281
+rect 356437 3043 356471 3485
+rect 535009 3383 535043 4097
+rect 111659 3009 111901 3043
+<< viali >>
+rect 324329 524297 324363 524331
+rect 324329 523617 324363 523651
+rect 582389 520353 582423 520387
+rect 274097 520217 274131 520251
+rect 274097 519265 274131 519299
+rect 275661 520217 275695 520251
+rect 286793 520217 286827 520251
+rect 370237 520217 370271 520251
+rect 370237 519333 370271 519367
+rect 373365 520217 373399 520251
+rect 286793 519197 286827 519231
+rect 275661 519061 275695 519095
+rect 384497 520217 384531 520251
+rect 387809 520217 387843 520251
+rect 387809 519129 387843 519163
+rect 384497 518993 384531 519027
+rect 373365 518925 373399 518959
+rect 289921 336617 289955 336651
+rect 273913 336481 273947 336515
+rect 274741 336481 274775 336515
+rect 283757 336481 283791 336515
+rect 281181 335801 281215 335835
+rect 283757 335801 283791 335835
+rect 372629 336413 372663 336447
+rect 382289 336413 382323 336447
+rect 381921 336345 381955 336379
+rect 379253 336209 379287 336243
+rect 381921 336141 381955 336175
+rect 379253 336073 379287 336107
+rect 382289 336073 382323 336107
+rect 393145 336141 393179 336175
+rect 372629 335869 372663 335903
+rect 289921 335665 289955 335699
+rect 281181 335461 281215 335495
+rect 282193 335597 282227 335631
+rect 282193 335393 282227 335427
+rect 393145 335393 393179 335427
+rect 413109 335733 413143 335767
+rect 413477 335597 413511 335631
+rect 413477 335393 413511 335427
+rect 413109 335325 413143 335359
+rect 407865 333897 407899 333931
+rect 407865 333353 407899 333387
+rect 294245 326417 294279 326451
+rect 294245 321521 294279 321555
+rect 582389 19805 582423 19839
+rect 258089 8109 258123 8143
+rect 258457 8109 258491 8143
+rect 258089 7973 258123 8007
+rect 258089 7837 258123 7871
+rect 432521 7429 432555 7463
+rect 432521 7293 432555 7327
+rect 271245 5117 271279 5151
+rect 271245 4437 271279 4471
+rect 324329 4165 324363 4199
+rect 84577 4097 84611 4131
+rect 84301 4029 84335 4063
+rect 320741 3961 320775 3995
+rect 535009 4097 535043 4131
+rect 320557 3893 320591 3927
+rect 321017 3893 321051 3927
+rect 324329 3893 324363 3927
+rect 327917 3961 327951 3995
+rect 320189 3757 320223 3791
+rect 320373 3757 320407 3791
+rect 320649 3757 320683 3791
+rect 327733 3825 327767 3859
+rect 320097 3689 320131 3723
+rect 41429 3553 41463 3587
+rect 320281 3553 320315 3587
+rect 327917 3553 327951 3587
+rect 354137 3621 354171 3655
+rect 327733 3485 327767 3519
+rect 354137 3485 354171 3519
+rect 356437 3485 356471 3519
+rect 41429 3349 41463 3383
+rect 327917 3417 327951 3451
+rect 102149 3281 102183 3315
+rect 327917 3281 327951 3315
+rect 102149 3077 102183 3111
+rect 535009 3349 535043 3383
+rect 111625 3009 111659 3043
+rect 111901 3009 111935 3043
+rect 356437 3009 356471 3043
+<< metal1 >>
+rect 202782 700952 202788 701004
+rect 202840 700992 202846 701004
+rect 331214 700992 331220 701004
+rect 202840 700964 331220 700992
+rect 202840 700952 202846 700964
+rect 331214 700952 331220 700964
+rect 331272 700952 331278 701004
+rect 314562 700884 314568 700936
+rect 314620 700924 314626 700936
+rect 462314 700924 462320 700936
+rect 314620 700896 462320 700924
+rect 314620 700884 314626 700896
+rect 462314 700884 462320 700896
+rect 462372 700884 462378 700936
+rect 315942 700816 315948 700868
+rect 316000 700856 316006 700868
+rect 478506 700856 478512 700868
+rect 316000 700828 478512 700856
+rect 316000 700816 316006 700828
+rect 478506 700816 478512 700828
+rect 478564 700816 478570 700868
+rect 154114 700748 154120 700800
+rect 154172 700788 154178 700800
+rect 338114 700788 338120 700800
+rect 154172 700760 338120 700788
+rect 154172 700748 154178 700760
+rect 338114 700748 338120 700760
+rect 338172 700748 338178 700800
+rect 137830 700680 137836 700732
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+rect 336734 700720 336740 700732
+rect 137888 700692 336740 700720
+rect 137888 700680 137894 700692
+rect 336734 700680 336740 700692
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