Add Chisel source for picorF0, no changes to main design
17 files changed
tree: 8706c6ac29978fcaced99942a1e1cb0ecf673577
  1. def/
  2. gds/
  3. lef/
  4. mag/
  5. maglef/
  6. openlane/
  7. picorF0/
  8. signoff/
  9. spi/
  10. verilog/
  11. .gitignore
  12. .gitmodules
  13. info.yaml
  14. LICENSE
  15. Makefile
  16. README.md
README.md

caravel-picoRF0

  • CAN bus controller for autonomous vehicles, connected to caravel and with it's I/O and debug interfaces exposed on I/O pins (developed by Natalia Machado)

  • picoRF0 - a multicycle CPU core running a simplified RISC ISA (targeted for teaching purposes). Connected to caravel for memory interfacing and I/O usage

    • See picoRF0 directory for CPU Chisel source code
  • Tiny VGA pong game controller to test I/O interface speed