Merge branch 'main' of https://github.com/yongatek/caravel_yonga-lz4-decoder into main

README.md

diff --git a/README.md b/README.md
index 26cee3a..4319dbe 100644
--- a/README.md
+++ b/README.md
@@ -26,9 +26,9 @@
    repo
 -  [x] The project repo contain info.yaml at the project root
 -  [x] Top level macro is named ``user_project_wrapper``
--  [ ] Full Chip Simulation passes for RTL and GL (gate-level)
--  [ ] The hardened Macros are LVS and DRC clean
--  [ ] The hardened ``user_project_wrapper`` adheres to the same pin
+-  [x] Full Chip Simulation passes for RTL and GL (gate-level)
+-  [x] The hardened Macros are LVS and DRC clean
+-  [x] The hardened ``user_project_wrapper`` adheres to the same pin
    order specified at [pin_order](https://github.com/efabless/caravel/blob/master/openlane/user_project_wrapper_empty/pin_order.cfg)
--  [ ] XOR check passes with zero total difference.
+-  [x] XOR check passes with zero total difference.
 -  [ ] Openlane summary reports are retained under ./signoff/