commit: c0dc05396ca537c9dc86875c494e6f0c802cf91d
[log] [tgz]
author: abdullahyildiz <abdullah.yildiz@yongatek.com>
Sat Jun 12 17:24:57 2021 +0300
committer: abdullahyildiz <abdullah.yildiz@yongatek.com>
Sat Jun 12 17:24:57 2021 +0300
tree: 89dab110486df99d56a4a84550cba1454b9eb079
parent: 162cf0fe64236b19956af0e2d3d22cdad1ef6c85 [diff]

Update OpenLANE summary reports

6 files changed

tree: 89dab110486df99d56a4a84550cba1454b9eb079

README.md

YONGA-LZ4 Decoder

Table of contents

Overview
Simulation
Checklist for Open-MPW Submission

Overview

YONGA-LZ4 Decoder is an implementation of the decoder of the popular LZ4 compression algorithm.

Simulation

TBA

Checklist for Open-MPW Submission

[x] The project repo adheres to the same directory structure in this repo
[x] The project repo contain info.yaml at the project root
[x] Top level macro is named user_project_wrapper
[ ] Full Chip Simulation passes for RTL and GL (gate-level)
[ ] The hardened Macros are LVS and DRC clean
[ ] The hardened user_project_wrapper adheres to the same pin order specified at pin_order
[ ] XOR check passes with zero total difference.
[ ] Openlane summary reports are retained under ./signoff/