1. 8c85d22 adding tgate by Carl Brando · 2 years, 9 months ago
  2. f32add4 C4 updates by Charana Sonnadara · 2 years, 9 months ago
  3. ef5cbee adding missing cap layout by Charana Sonnadara · 2 years, 10 months ago
  4. 6b3aca8 capacitor added to c4 by Charana Sonnadara · 2 years, 10 months ago
  5. bad43c8 custom c4 layout by Charana Sonnadara · 2 years, 10 months ago
  6. c2a2ca7 removing extra c4 structure by Charana Sonnadara · 2 years, 10 months ago
  7. 8b283b5 Adding C4 by Charana Sonnadara · 2 years, 10 months ago
  8. ad6ba84 c4 structure added by Charana Sonnadara · 2 years, 10 months ago
  9. 8e2c2ea correction layout by Charana Sonnadara · 2 years, 10 months ago
  10. 220de99 debug vssa1 vdda1 by Charana Sonnadara · 2 years, 10 months ago
  11. 6fb7170 added FG_gate and passes precheck added polyc to some missing places by Carl Brando · 3 years ago
  12. e67ca66 added and wired floating gate by Carl Brando · 3 years ago
  13. 27c6ad6 fixed pins by UbuntuLab · 3 years ago
  14. 662bdc8 fixed layout box by UbuntuLab · 3 years ago
  15. e79a197 fixing li by UbuntuLab · 3 years ago
  16. 3c1e94a added taps and fixed tap reram by Carl Brando · 3 years ago
  17. ca5772b added TAP for nwell and pwell by UbuntuLab · 3 years ago
  18. a7e428e moved netlist spice file to netgen folder to make the letlist pre-check happy by Carl Brando · 3 years ago
  19. 85325e7 Merge branch 'main' of gitlab.com:sshah389/mixed-signal_reram-mpw-5 into main by Carl Brando · 3 years ago
  20. e7fb2e3 ota+comparator rewire and xscheme update by Charana Sonnadara · 3 years ago
  21. 64e93e9 added pins to 1T1R.mag by Carl Brando · 3 years ago
  22. 1421d43 re position OTA+comparator by Charana Sonnadara · 3 years ago
  23. 1d927fa wip-ota+comparator by Charana Sonnadara · 3 years ago
  24. 07c61dd ota+comparator in progress by Charana Sonnadara · 3 years ago
  25. 1a1579a adding ota+comparator by Charana Sonnadara · 3 years ago
  26. e83dddd adding ota + comparator mag and xscheme files by Charana Sonnadara · 3 years ago
  27. 085f7d5 added 2x2 1t1r reram structure to project magic file by Carl Brando · 3 years ago
  28. f130151 added reram cell magic file, wired select and bit lines by Carl Brando · 3 years ago
  29. 1a31ba4 added reram files, changed technology for user_analog_project_wrapper.mag by Carl Brando · 3 years ago
  30. c3462e3 setup the blank project by Carl Brando · 3 years ago
  31. ea5ff7d Updated the layout to properly use the metal resistors in front of by Tim Edwards · 3 years, 3 months ago
  32. ab6ba9c Modified the user_analog_project_wrapper layouts (empty and example) by Tim Edwards · 3 years, 6 months ago
  33. 9422266 Modified the wrapper to extend the analog pins out 4um like the rest of by Tim Edwards · 3 years, 10 months ago
  34. 35111e9 Corrected ngspice testbenches for change in the name of the parameter by Tim Edwards · 3 years, 10 months ago
  35. a26abdd Redid the layout for the example analog project based on the updated by Tim Edwards · 3 years, 10 months ago
  36. 6bb2165 Added layout for the user_analog_project_wrapper example. by Tim Edwards · 3 years, 11 months ago
  37. dfc24ad Added xschem schematic of the POR and testbench simulations and results. by Tim Edwards · 3 years, 11 months ago
  38. fb13001 Simple layout, unwired (needs modifications to the project wrapper) by Tim Edwards · 3 years, 11 months ago
  39. a44a60b Preliminary work on the analog user project example. Added verilog RTL and by Tim Edwards · 3 years, 11 months ago