blob: 622b227a2a981dac7746f7bb8cff8cbec9c5a767 [file] [log] [blame]
Project Chip ID is: 331650
Setting Project Chip ID to: 00050f82
Step 1: Modify Layout of the user_id_programming subcell
Done!
Step 2: Add user project ID parameter to source verilog.
Done!
Step 3: Add user project ID parameter to gate-level verilog.
Done!
Step 4: Add user project ID text to top level layout.
Done!