blob: 909737ef78006ad1de45112e14b9f5b3d0d725c1 [file] [log] [blame]
timestamp 1641609411
version 8.3
tech sky130A
style ngspice()
scale 1000 1 500000
resistclasses 4400000 2200000 1700000 3050000 120000 197000 114000 191000 120000 197000 114000 191000 48200 319800 2000000 48200 48200 12200 125 125 47 47 29 5
use OSC_v3p2 OSC_v3p2_1 1 0 1718 0 1 -374
use OSC_v3p2 OSC_v3p2_0 1 0 1718 0 -1 14404
use DFF_v4p1 DFF_v4p1_0 0 -1 23156 1 0 6824
use PASSGATE_v1p2 PASSGATE_v1p2_0 1 0 19368 0 1 6586
port "REF_IN" 4 20956 5398 20956 5398 m5
port "SENS_IN" 3 9244 7732 9244 7732 m2
port "VDD" 1 7808 7968 7808 7968 m1
port "VSS" 2 7874 9190 7874 9190 m1
port "DOUT" 5 22458 7288 22458 7288 m2
node "REF_IN" 0 527.76 20956 5398 m5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 294400 2480 0 0
node "m2_22220_5472#" 2 724.175 22220 5472 m2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 191004 3796 0 0 0 0 0 0 0 0
node "m2_20998_7046#" 2 1575.98 20998 7046 m2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 53664 1240 53664 1240 283116 4528 118392 1460 0 0
node "m2_20790_7562#" 0 70.4391 20790 7562 m2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 10004 408 0 0 0 0 0 0 0 0
node "SENS_IN" 0 156.152 9244 7732 m2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 27840 704 0 0 0 0 0 0 0 0
node "m1_22122_6004#" 1 633.617 22122 6004 m1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 217872 2400 0 0 0 0 0 0 0 0 0 0
node "m1_22788_7692#" 1 712.532 22788 7692 m1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 5624 300 205120 3148 0 0 0 0 0 0 0 0
node "m1_22122_7806#" 0 450.756 22122 7806 m1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143440 1744 0 0 0 0 0 0 0 0 0 0
node "VDD" 0 59.5284 7808 7968 m1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 4536 276 0 0 0 0 0 0 0 0 0 0
node "m1_22668_9130#" 4 1225.56 22668 9130 m1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 201316 5340 0 0 0 0 0 0 0 0 0 0
node "VSS" 0 65.8638 7874 9190 m1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 5452 304 0 0 0 0 0 0 0 0 0 0
node "li_21224_6444#" 19 1721.42 21224 6444 li 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 3600 240 182048 4712 120240 3484 0 0 0 0 0 0 0 0
node "DOUT" 75 935.593 22458 7288 m2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 8160 512 14112 672 121804 3440 0 0 0 0 0 0 0 0
node "li_20866_7630#" 232 768.98 20866 7630 li 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 21964 1360 151296 1792 0 0 0 0 0 0 0 0 0 0
node "w_20734_7666#" 5231 1213.15 20734 7666 nw 0 0 0 0 404384 2956 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
substrate "VSUBS" 0 0 -1073741817 -1073741817 space 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
cap "m1_22122_6004#" "m2_22220_5472#" 237.338
cap "li_20866_7630#" "m2_20790_7562#" 52.2152
cap "m2_20998_7046#" "li_20866_7630#" 125.448
cap "li_21224_6444#" "DOUT" 365.385
cap "li_21224_6444#" "m1_22122_6004#" 571.486
cap "m1_22788_7692#" "DOUT" 62.6923
cap "m2_20998_7046#" "w_20734_7666#" 4.7424
cap "li_20866_7630#" "w_20734_7666#" 76.7624
cap "m1_22788_7692#" "m1_22122_7806#" 277.408
cap "li_21224_6444#" "m2_22220_5472#" 112.604
cap "OSC_v3p2_1/BUFFMIN_v1p1_0/VSS" "PASSGATE_v1p2_0/CTR" 5.86364
cap "OSC_v3p2_1/BUFFMIN_v1p1_0/VSS" "REF_IN" -7.10543e-15
cap "OSC_v3p2_1/BUFFMIN_v1p1_0/VDD" "PASSGATE_v1p2_0/VIN" 9.4586
cap "OSC_v3p2_1/BUFFMIN_v1p1_0/VDD" "REF_IN" 18.8426
cap "OSC_v3p2_1/BUFFMIN_v1p1_0/VDD" "OSC_v3p2_1/BUFFMIN_v1p1_0/VSS" 27.6039
cap "PASSGATE_v1p2_0/VOUT" "REF_IN" 21.4286
cap "OSC_v3p2_1/BUFFMIN_v1p1_0/VSS" "PASSGATE_v1p2_0/VOUT" 8.13654
cap "OSC_v3p2_1/BUFFMIN_v1p1_0/VDD" "PASSGATE_v1p2_0/VOUT" 9.4586
cap "OSC_v3p2_1/BUFFMIN_v1p1_0/VIN" "REF_IN" 21.1021
cap "REF_IN" "PASSGATE_v1p2_0/VIN" 30.3571
cap "OSC_v3p2_1/BUFFMIN_v1p1_0/VSS" "PASSGATE_v1p2_0/VIN" 4.94092
cap "OSC_v3p2_1/BUFFMIN_v1p1_0/VSS" "OSC_v3p2_1/N2" 46.005
cap "OSC_v3p2_1/BUFFMIN_v1p1_0/VDD" "DFF_v4p1_0/sky130_fd_pr__pfet_01v8_MA8JHN_4/a_n33_95#" -228.92
cap "OSC_v3p2_1/BUFFMIN_v1p1_0/VSS" "PASSGATE_v1p2_0/CTR" 14.3182
cap "OSC_v3p2_1/BUFFMIN_v1p1_0/VSS" "OSC_v3p2_1/BUFFMIN_v1p1_0/VIN" 2.84217e-14
cap "OSC_v3p2_1/BUFFMIN_v1p1_0/VSS" "PASSGATE_v1p2_0/VOUT" 0.905797
cap "REF_IN" "OSC_v3p2_1/BUFFMIN_v1p1_0/VIN" -852.328
cap "PASSGATE_v1p2_0/CTR" "PASSGATE_v1p2_0/INVMIN_v1p1_0/VOUT" 5.49419
cap "REF_IN" "OSC_v3p2_1/BUFFMIN_v1p1_0/VSS" 45.122
cap "OSC_v3p2_1/BUFFMIN_v1p1_0/VDD" "OSC_v3p2_1/N2" 14.7619
cap "OSC_v3p2_1/BUFFMIN_v1p1_0/VSS" "PASSGATE_v1p2_0/VIN" 0.634518
cap "PASSGATE_v1p2_0/CTR" "OSC_v3p2_1/N2" 0.471698
cap "OSC_v3p2_1/BUFFMIN_v1p1_0/VDD" "PASSGATE_v1p2_0/CTR" 14.2863
cap "DFF_v4p1_0/sky130_fd_pr__nfet_01v8_6H9P4D_3/a_15_n100#" "DFF_v4p1_0/CLK" 2.84217e-14
cap "DFF_v4p1_0/sky130_fd_pr__pfet_01v8_MA8JHN_4/a_n33_95#" "DFF_v4p1_0/CLK" 13.524
cap "DFF_v4p1_0/sky130_fd_pr__pfet_01v8_MA8JHN_5/a_15_n136#" "DFF_v4p1_0/sky130_fd_pr__nfet_01v8_6H9P4D_3/a_15_n100#" 57.4743
cap "DFF_v4p1_0/VDD" "DFF_v4p1_0/CLK" 74.4574
cap "DFF_v4p1_0/VDD" "DFF_v4p1_0/sky130_fd_pr__pfet_01v8_MA8JHN_4/a_n33_95#" 128.707
cap "DOUT" "DFF_v4p1_0/CLK" 0.471698
cap "DFF_v4p1_0/sky130_fd_pr__pfet_01v8_MA8JHN_4/a_15_n136#" "DFF_v4p1_0/CLK" 125.457
cap "DFF_v4p1_0/sky130_fd_pr__pfet_01v8_MA8JHN_5/a_15_n136#" "DFF_v4p1_0/CLK" 112.709
cap "OSC_v3p2_0/BUFFMIN_v1p1_0/VSS" "OSC_v3p2_0/BUFFMIN_v1p1_0/VDD" 2.4869e-14
cap "PASSGATE_v1p2_0/VOUT" "PASSGATE_v1p2_0/a_1548_564#" 55.7784
cap "OSC_v3p2_0/BUFFMIN_v1p1_0/invmin_magic_v1p1_0/VOUT" "OSC_v3p2_0/BUFFMIN_v1p1_0/VDD" -42.64
cap "PASSGATE_v1p2_0/VOUT" "OSC_v3p2_0/SENS_IN" 449.089
cap "OSC_v3p2_0/SENS_IN" "OSC_v3p2_0/BUFFMIN_v1p1_0/VDD" 449.449
cap "PASSGATE_v1p2_0/CTR" "OSC_v3p2_0/BUFFMIN_v1p1_0/VSS" 5.86364
cap "PASSGATE_v1p2_0/VOUT" "OSC_v3p2_0/BUFFMIN_v1p1_0/VDD" 114.772
cap "DFF_v4p1_0/IN" "OSC_v3p2_0/BUFFMIN_v1p1_0/VDD" 292.065
cap "PASSGATE_v1p2_0/INVMIN_v1p1_0/VOUT" "OSC_v3p2_0/BUFFMIN_v1p1_0/VDD" 48.4412
cap "PASSGATE_v1p2_0/INVMIN_v1p1_0/VOUT" "DOUT" 11.1176
cap "OSC_v3p2_0/BUFFMIN_v1p1_0/VDD" "DOUT" 289.453
cap "DOUT" "DFF_v4p1_0/CLK" 1.61765
cap "OSC_v3p2_0/BUFFMIN_v1p1_0/VDD" "OSC_v3p2_0/BUFFMIN_v1p1_0/VIN" 4.5
cap "OSC_v3p2_0/BUFFMIN_v1p1_0/VDD" "OSC_v3p2_0/BUFFMIN_v1p1_0/VSS" -1.7053e-13
cap "DFF_v4p1_0/IN" "OSC_v3p2_0/N2" 11.4725
cap "OSC_v3p2_0/BUFFMIN_v1p1_0/invmin_magic_v1p1_0/VOUT" "OSC_v3p2_0/BUFFMIN_v1p1_0/VDD" 15.3462
cap "PASSGATE_v1p2_0/VOUT" "OSC_v3p2_0/BUFFMIN_v1p1_0/VDD" 9.79355
cap "DOUT" "OSC_v3p2_0/BUFFMIN_v1p1_0/VSS" 29.5312
cap "OSC_v3p2_0/BUFFMIN_v1p1_0/VDD" "PASSGATE_v1p2_0/VIN" 56.5233
cap "OSC_v3p2_0/N2" "OSC_v3p2_0/BUFFMIN_v1p1_0/VDD" 7.38095
cap "DFF_v4p1_0/IN" "DFF_v4p1_0/sky130_fd_pr__pfet_01v8_MA8JHN_1/a_n73_n136#" 11.2396
cap "DFF_v4p1_0/IN" "DFF_v4p1_0/GND" 1
cap "DFF_v4p1_0/IN" "DFF_v4p1_0/sky130_fd_pr__pfet_01v8_MA8JHN_1/a_15_n136#" 12
cap "DFF_v4p1_0/GND" "DFF_v4p1_0/sky130_fd_pr__pfet_01v8_MA8JHN_1/a_n73_n136#" 22.3834
cap "DFF_v4p1_0/CLK" "DOUT" 34.1333
cap "DFF_v4p1_0/GND" "DFF_v4p1_0/CLK" 42.9813
cap "DFF_v4p1_0/IN" "DFF_v4p1_0/CLK" 26.415
cap "DOUT" "DFF_v4p1_0/ND" 46.1958
cap "DFF_v4p1_0/VDD" "DOUT" -191.029
cap "DFF_v4p1_0/IN" "DFF_v4p1_0/VDD" -382.752
cap "DFF_v4p1_0/IN" "DOUT" 0.260526
cap "DFF_v4p1_0/sky130_fd_pr__pfet_01v8_MA8JHN_1/a_n73_n136#" "DOUT" 11.1692
cap "OSC_v3p2_0/CON_CV" "OSC_v3p2_0/INVandCAP_v1p1_0/INV_v1p1_0/VIN" 145.722
cap "OSC_v3p2_0/BUFFMIN_v1p1_0/VDD" "OSC_v3p2_0/INVandCAP_v1p1_0/VOUT" 29.4994
cap "OSC_v3p2_0/BUFFMIN_v1p1_0/VDD" "OSC_v3p2_0/CON_CV" 99.6932
cap "OSC_v3p2_0/CON_CV" "OSC_v3p2_0/INVandCAP_v1p1_0/VOUT" 369.54
cap "OSC_v3p2_0/N2" "OSC_v3p2_0/BUFFMIN_v1p1_0/VDD" 9.28095
cap "OSC_v3p2_0/N2" "OSC_v3p2_0/BUFFMIN_v1p1_0/VSS" 231.82
merge "OSC_v3p2_0/INVandCAP_v1p1_0/VSS" "OSC_v3p2_0/BUFFMIN_v1p1_0/VSS" -1234.53 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 4920 0 -751036 -4188 0 0 0 0 0 0 0 0 0 0
merge "OSC_v3p2_0/BUFFMIN_v1p1_0/VSS" "OSC_v3p2_0/VSUBS"
merge "OSC_v3p2_0/VSUBS" "m1_22668_9130#"
merge "m1_22668_9130#" "DFF_v4p1_0/GND"
merge "DFF_v4p1_0/GND" "OSC_v3p2_1/BUFFMIN_v1p1_0/VSS"
merge "OSC_v3p2_1/BUFFMIN_v1p1_0/VSS" "PASSGATE_v1p2_0/VSS"
merge "PASSGATE_v1p2_0/VSS" "li_21224_6444#"
merge "li_21224_6444#" "OSC_v3p2_1/VSUBS"
merge "OSC_v3p2_1/VSUBS" "VSUBS"
merge "OSC_v3p2_0/VSS" "VSS" -52.7884 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 14664 -304 0 0 0 0 0 0 0 0 0 0
merge "DFF_v4p1_0/VDD" "OSC_v3p2_1/BUFFMIN_v1p1_0/VDD" -1641.68 0 0 0 0 -282616 -4008 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -1292 -472840 -2084 0 0 0 0 0 0 0 0 0 0
merge "OSC_v3p2_1/BUFFMIN_v1p1_0/VDD" "m1_22122_6004#"
merge "m1_22122_6004#" "PASSGATE_v1p2_0/VDD"
merge "PASSGATE_v1p2_0/VDD" "m1_22122_7806#"
merge "m1_22122_7806#" "OSC_v3p2_0/BUFFMIN_v1p1_0/VDD"
merge "OSC_v3p2_0/BUFFMIN_v1p1_0/VDD" "li_20866_7630#"
merge "li_20866_7630#" "w_20734_7666#"
merge "OSC_v3p2_0/VDD" "VDD" -57.3444 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -1176 -276 0 0 0 0 0 0 0 0 0 0
merge "DFF_v4p1_0/D" "PASSGATE_v1p2_0/CTR" 115.604 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -240 0 0 17020 0 0 0 0 0 0 0 0 0
merge "PASSGATE_v1p2_0/CTR" "DOUT"
merge "OSC_v3p2_0/CON_CV" "PASSGATE_v1p2_0/VOUT" -1148.57 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 125904 -1096 0 0 95064 0 14752 -1096 0 0
merge "PASSGATE_v1p2_0/VOUT" "m2_20998_7046#"
merge "DFF_v4p1_0/IN" "OSC_v3p2_0/N2" 150.308 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -41512 -268 75712 -508 0 0 0 0 0 0 0 0
merge "OSC_v3p2_0/N2" "m1_22788_7692#"
merge "OSC_v3p2_0/INVandCAP_v1p1_0/VOUT" "PASSGATE_v1p2_0/VIN" -319.929 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 31552 -1084 0 0 0 0 0 0 0 0
merge "PASSGATE_v1p2_0/VIN" "OSC_v3p2_0/SENS_IN"
merge "OSC_v3p2_0/SENS_IN" "m2_20790_7562#"
merge "m2_20790_7562#" "SENS_IN"
merge "OSC_v3p2_1/CON_CV" "OSC_v3p2_1/INVandCAP_v1p1_0/VOUT" 182.803 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -160000 -1792 0 0
merge "OSC_v3p2_1/INVandCAP_v1p1_0/VOUT" "REF_IN"
merge "DFF_v4p1_0/CLK" "OSC_v3p2_1/N2" -299.55 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -167612 -556 0 0 0 0 0 0 0 0
merge "OSC_v3p2_1/N2" "m2_22220_5472#"