|author||Jorge Marin <firstname.lastname@example.org>||Tue Mar 22 01:13:03 2022 -0300|
|committer||Jorge Marin <email@example.com>||Tue Mar 22 01:13:03 2022 -0300|
MPW5, little buffer
PLL-BASED CAPACITIVE SENSOR INTERFACE
This project involves the design of a capacitive sensor-to-digital converter using time-based circuit techniques. It uses basic digitally-oriented building blocks (two oscillators, a D-flipflop and a feedback loop including a capacitive element and a switch) to convert input capacitive values into digital single bit traces in the time domain. The basic block diagram can be seen below:
The architecture has been tested for a DC sweep of input capacitive values. Example output trace values for different capacitance inputs are shown below:
The characteristic plot for an average window of 10us is seen below:
Refer to README for this sample project documentation.