|author||maherbenhouria <firstname.lastname@example.org>||Thu Dec 30 00:28:28 2021 -0500|
|committer||maherbenhouria <email@example.com>||Thu Dec 30 00:28:28 2021 -0500|
updated verilog description
This project is the implementation of a simple rail-to-rail comparator with its bias circuitry using Skywater 130nm technology. The purpose of this project is to test the open source tools provided with the PDK and to go through all the steps of the analog design flow. Two different circuits are instantiated in the analog version of the caravel:
The schematic of the comparator was deisgned as follows :
The schematic of the bias circuit was deisgned as follows :
We simulated the comparator with a voltage ramp at the negative input and a sinusoidal signal at the positive input. The output is a digital signal that triggers at the intersection of the 2 analog input signals.