CMOS...: A simple rail-to-rail comparator with its bias circuitry to test the SKY130 analog design flow.

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  1. f54b3bd final gds oasis by Jeff DiCorpo · 2 years, 11 months ago main
  2. 58371fc updated includes by maherbenhouria · 3 years ago
  3. c86a56e updated info file user verilog by maherbenhouria · 3 years ago
  4. 88cdb8c updated with a flattened gds by maherbenhouria · 3 years ago
  5. c459148 updated verilog description by maherbenhouria · 3 years ago

CMOS Rail-To-Rail Comparator

This project is the implementation of a simple rail-to-rail comparator with its bias circuitry using Skywater 130nm technology. The purpose of this project is to test the open source tools provided with the PDK and to go through all the steps of the analog design flow. Two different circuits are instantiated in the analog version of the caravel:

  • A CMOS push-pull comparator with 2 differential pairs (NMOS and PMOS).
  • A bootstrap current reference.

CMOS Comparator

The schematic of the comparator was deisgned as follows : Comparator

Bias circuit

The schematic of the bias circuit was deisgned as follows : Comparator Bias

Simulation

We simulated the comparator with a voltage ramp at the negative input and a sinusoidal signal at the positive input. The output is a digital signal that triggers at the intersection of the 2 analog input signals. Simulation