merged changes
diff --git a/README.md b/README.md index 3f3ed6f..8729e09 100644 --- a/README.md +++ b/README.md
@@ -3,14 +3,6 @@ This is a mixed-mode project featuring a 8-bit SAR-ADC, with offset calibration. The logic section is synthesized using the openlane digital flow. -## SAR - -The adc is composed of a top-plate sampled CDAC, with a capacitor array of -mimimum sized MIM caps. - -The comparator is a single-stage regenerative comparator, with a MOM array -for trimming ADC offset. - ## Layout @@ -21,6 +13,15 @@  +## Architecture + +The ADC is composed of a differential top-plate sampled dac, which is made from an array of MIM capacitors. +The comparator is a regenerative comparator, which is followed by a latch to retain the output state during +reset. The latch output is fed into the logic section, which performs the standard binary search algorithm. + + + + ## Simulation The simulation is carried out using ngspice using the mixed-mode xspice capabilities.