commit 78ca348fe86351d4b0b1ee32d8c66ae6c898e8f5
author chrische <christoph-weiser@gmx.de> Wed Nov 24 22:56:07 2021 +0100
committer chrische <christoph-weiser@gmx.de> Wed Nov 24 22:56:07 2021 +0100
tree 453ba4cfc6354a22ed22bca1a279b66089004af4
parent 4179c002b5a6cae9193fdb71b36bea43dca57d11
parent 3f199920f5b48e0ee89ee901e6ae376bbaa26188

merged changes

README.md

diff --git a/README.md b/README.md
index 3f3ed6f..8729e09 100644
--- a/README.md
+++ b/README.md
@@ -3,14 +3,6 @@
 This is a mixed-mode project featuring a 8-bit SAR-ADC, with offset calibration.
 The logic section is synthesized using the openlane digital flow.
 
-## SAR
-
-The adc is composed of a top-plate sampled CDAC, with a capacitor array of 
-mimimum sized MIM caps.
-
-The comparator is a single-stage regenerative comparator, with a MOM array 
-for trimming ADC offset. 
-
 
 ## Layout
 
@@ -21,6 +13,15 @@
 ![layout](https://github.com/chrische-xx/caravel_user_project_analog/blob/main/docs/layout.png)
 
 
+## Architecture
+
+The ADC is composed of a differential top-plate sampled dac, which is made from an array of MIM capacitors.
+The comparator is a regenerative comparator, which is followed by a latch to retain the output state during
+reset. The latch output is fed into the logic section, which performs the standard binary search algorithm. 
+
+![layout](https://github.com/chrische-xx/caravel_user_project_analog/blob/main/docs/pictures/architecture.png)
+
+
 ## Simulation
 
 The simulation is carried out using ngspice using the mixed-mode xspice capabilities.