commit | f875a8e3fffc6f32f2f44217e5748f60f5037b21 | [log] [tgz] |
---|---|---|
author | irem <iremnurcolak34@gmail.com> | Fri Jun 18 13:05:10 2021 +0300 |
committer | irem <iremnurcolak34@gmail.com> | Fri Jun 18 13:05:10 2021 +0300 |
tree | dfab358ea2d67f89dddfe8c9dc68d8ab99f4a80b | |
parent | 563d7432096eafc1fcc69b8d361ce8f462874c88 [diff] |
edit io_oeb
diff --git a/verilog/rtl/user_proj_example.v b/verilog/rtl/user_proj_example.v index 0adab80..025636f 100644 --- a/verilog/rtl/user_proj_example.v +++ b/verilog/rtl/user_proj_example.v
@@ -83,7 +83,8 @@ assign wdata = wbs_dat_i; // IO - assign io_oeb = {(`MPRJ_IO_PADS-1){rst}}; + assign io_oeb[0] = 1'b1; + assign io_oeb[1] = 1'b0; assign RX_w = io_in[1]; assign io_out[0] = TX_w;