blob: 0685ae2bfb4c4c79688f17a849d80a30e88c831c [file] [log] [blame]
[submodule "verilog/rtl/usb_cdc"]
path = verilog/rtl/usb_cdc
url = https://github.com/ulixxe/usb_cdc
[submodule "verilog/rtl/verilog-uart"]
path = verilog/rtl/verilog-uart
url = https://github.com/alexforencich/verilog-uart