Google Git
Sign in
foss-eda-tools / third_party / shuttle / sky130 / mpw-008 / slot-006 / 080e49aba0dd2603ca7957045655ec9e34f38517 / . / verilog / rtl
tree: b9b26f034759f04c280964ffe8989eb22779334d [path history] [tgz]
  1. fpga/
  2. usb_cdc
  3. verilog-uart
  4. 0001-usb_cdc-fix-make-targets.patch
  5. defines.v
  6. uprj_netlists.v
  7. usb2uart.v
  8. user_defines.v
  9. user_proj_example.v
  10. user_project_wrapper.v