verilog/includes/includes.rtl.caravel_user_project

# Caravel user project includes
-v $(USER_PROJECT_VERILOG)/rtl/user_project_wrapper.v	     
-v $(USER_PROJECT_VERILOG)/rtl/top.pickled.v
-v $(USER_PROJECT_VERILOG)/rtl/tile_clb.pickled.reduced.v