blob: cebb3c6c2f2b2f0e9652619c107dce8999a79de2 [file] [log] [blame]
Project Chip ID is: 439016
Setting Project Chip ID to: 0006b2e8
Step 1: Modify Layout of the user_id_programming subcell
Done!
Step 2: Add user project ID parameter to source verilog.
Done!
Step 3: Add user project ID parameter to gate-level verilog.
Done!
Step 4: Add user project ID text to top level layout.
Done!