commit a3686be0936b0157a94fd2398a012eecf837decd
author hamzashabbir517 <shabbirhamza517@gmail.com> Sat May 21 09:36:32 2022 +0500
committer hamzashabbir517 <shabbirhamza517@gmail.com> Sat May 21 09:36:32 2022 +0500
tree 8fc9dbc0c82015ef8285ca8c37104ebcc39f7afc
parent f0fafbf1a20bbc4a2e6a23c03265a90941c8f2d4

Update the reamdme and tb

README.md

diff --git a/README.md b/README.md
index 8b03ce9..2c3e352 100644
--- a/README.md
+++ b/README.md
@@ -32,9 +32,6 @@
         
         |       +-- FPU                          #   Floating Point Unit folder
         
-        |       +--                              #   FPU source files
-        
-        |       +--                              #   1KB sram
         
 The Design Verification Testbench is available here
 
@@ -42,7 +39,7 @@
     
         +-- dv                               #   Design Verification
         
-        +-- FPU                              #   Design Test Directory
+        +-- FPU_Half                         #   Design Test Directory
         
         +-- hex                              #   Hex files folder
         

verilog/dv/FPU_Half/FPU_Half_tb.v

diff --git a/verilog/dv/FPU_Half/FPU_Half_tb.v b/verilog/dv/FPU_Half/FPU_Half_tb.v
index 6dd3d8b..8ee44b5 100644
--- a/verilog/dv/FPU_Half/FPU_Half_tb.v
+++ b/verilog/dv/FPU_Half/FPU_Half_tb.v
@@ -62,7 +62,8 @@
 
 	initial begin
 	    wait(mprj_ready == 1'b1)
-            // Observe Output pins [23:8] for multliplication_table
+            // Observe Output pins [23:8] for Fmove
+            /*
             wait(mprj_io_0 == 16'h4000);
             wait(mprj_io_0 == 16'h4020);
             wait(mprj_io_0 == 16'h4060);
@@ -71,6 +72,23 @@
             wait(mprj_io_0 == 16'h40d0);
             wait(mprj_io_0 == 16'hC158);
             wait(mprj_io_0 == 16'hC178);
+            */
+            // Observe Output pins [23:8] for Fsign and I2F
+            wait(mprj_io_0 == 16'h449A);
+            wait(mprj_io_0 == 16'h3042);
+            wait(mprj_io_0 == 16'h491E);
+            wait(mprj_io_0 == 16'hDA92);
+            wait(mprj_io_0 == 16'h5CB0);
+            wait(mprj_io_0 == 16'h5CD9);
+            wait(mprj_io_0 == 16'h5F09);
+            wait(mprj_io_0 == 16'hBD78);
+            wait(mprj_io_0 == 16'h449A);
+            wait(mprj_io_0 == 16'h744A);
+            wait(mprj_io_0 == 16'h7AE6);
+            wait(mprj_io_0 == 16'h7582);
+            wait(mprj_io_0 == 16'h7AE4);
+            wait(mprj_io_0 == 16'h7208);
+            wait(mprj_io_0 == 16'h7AE7);
            
             $display("MPRJ-IO state = %h", mprj_io[23:8]);