Tim Edwards | 5cc020d | 2021-05-06 11:54:28 -0400 | [diff] [blame] | 1 | v {xschem version=2.9.9 file_version=1.2 } |
| 2 | G {} |
| 3 | K {} |
| 4 | V {} |
| 5 | S {} |
| 6 | E {} |
| 7 | N 3830 -460 3830 -390 { lab=vdda1} |
| 8 | N 3730 -460 3830 -460 { lab=vdda1} |
| 9 | N 3860 -230 3860 -180 { lab=vssa1} |
| 10 | N 3770 -180 3860 -180 { lab=vssa1} |
| 11 | N 3890 -460 3890 -390 { lab=vccd1} |
| 12 | N 3890 -460 3960 -460 { lab=vccd1} |
| 13 | N 3890 -130 3890 -60 { lab=vccd1} |
| 14 | N 3890 -130 3950 -130 { lab=vccd1} |
| 15 | N 3830 -130 3830 -60 { lab=io_analog[4]} |
| 16 | N 3790 -130 3830 -130 { lab=io_analog[4]} |
| 17 | N 3860 100 3860 150 { lab=vssa1} |
| 18 | N 3800 150 3860 150 { lab=vssa1} |
| 19 | N 4010 -10 4110 -10 { lab=gpio_analog[7]} |
| 20 | N 4010 20 4110 20 { lab=io_out[15]} |
| 21 | N 4010 50 4110 50 { lab=io_out[16]} |
| 22 | N 4010 -340 4130 -340 { lab=gpio_analog[3]} |
| 23 | N 4010 -310 4130 -310 { lab=io_out[11]} |
| 24 | N 4010 -280 4130 -280 { lab=io_out[12]} |
Tim Edwards | 1d231e8 | 2021-12-19 17:03:41 -0500 | [diff] [blame] | 25 | N 3670 300 3670 340 { lab=io_clamp_low[2]} |
| 26 | N 3670 400 3670 420 { lab=vssa1} |
| 27 | N 3670 440 3670 460 { lab=io_clamp_high[2]} |
| 28 | N 3670 520 3670 530 { lab=vssa1} |
| 29 | N 3670 570 3670 590 { lab=io_clamp_low[1]} |
| 30 | N 3670 650 3670 670 { lab=vssa1} |
| 31 | N 4160 300 4160 330 { lab=io_clamp_high[1]} |
| 32 | N 4160 390 4160 410 { lab=vssa1} |
| 33 | N 4160 440 4160 460 { lab=io_clamp_low[0]} |
| 34 | N 4160 520 4160 530 { lab=vssa1} |
| 35 | N 4160 550 4160 560 { lab=io_clamp_high[0]} |
| 36 | N 4160 620 4160 640 { lab=io_analog[4]} |
| 37 | N 3630 300 3670 300 { lab=io_clamp_low[2]} |
| 38 | N 3630 420 3670 420 { lab=vssa1} |
| 39 | N 3630 440 3670 440 { lab=io_clamp_high[2]} |
| 40 | N 3630 530 3670 530 { lab=vssa1} |
| 41 | N 3630 570 3670 570 { lab=io_clamp_low[1]} |
| 42 | N 3630 670 3670 670 { lab=vssa1} |
| 43 | N 4130 300 4160 300 { lab=io_clamp_high[1]} |
| 44 | N 4130 410 4160 410 { lab=vssa1} |
| 45 | N 4130 440 4160 440 { lab=io_clamp_low[0]} |
| 46 | N 4130 530 4160 530 { lab=vssa1} |
| 47 | N 4130 550 4160 550 { lab=io_clamp_high[0]} |
| 48 | N 4130 640 4160 640 { lab=io_analog[4]} |
| 49 | N 3670 710 3670 750 { lab=io_oeb[12]} |
| 50 | N 3670 810 3670 830 { lab=vssd1} |
| 51 | N 3670 850 3670 870 { lab=io_oeb[16]} |
| 52 | N 3670 930 3670 940 { lab=vssd1} |
| 53 | N 4160 710 4160 740 { lab=io_oeb[11]} |
| 54 | N 4160 800 4160 820 { lab=vssd1} |
| 55 | N 4160 850 4160 870 { lab=#net1} |
| 56 | N 4160 930 4160 940 { lab=vssd1} |
| 57 | N 3630 710 3670 710 { lab=io_oeb[12]} |
| 58 | N 3630 830 3670 830 { lab=vssd1} |
| 59 | N 3630 850 3670 850 { lab=io_oeb[16]} |
| 60 | N 3630 940 3670 940 { lab=vssd1} |
| 61 | N 4130 710 4160 710 { lab=io_oeb[11]} |
| 62 | N 4130 820 4160 820 { lab=vssd1} |
| 63 | N 4130 850 4160 850 { lab=#net1} |
| 64 | N 4130 940 4160 940 { lab=vssd1} |
Tim Edwards | 5cc020d | 2021-05-06 11:54:28 -0400 | [diff] [blame] | 65 | C {example_por.sym} 3860 -310 0 0 {name=x1} |
| 66 | C {example_por.sym} 3860 20 0 0 {name=x2} |
| 67 | C {devices/iopin.sym} 3240 -470 0 0 {name=p1 lab=vdda1} |
| 68 | C {devices/iopin.sym} 3240 -440 0 0 {name=p2 lab=vdda2} |
| 69 | C {devices/iopin.sym} 3240 -410 0 0 {name=p3 lab=vssa1} |
| 70 | C {devices/iopin.sym} 3240 -380 0 0 {name=p4 lab=vssa2} |
| 71 | C {devices/iopin.sym} 3240 -350 0 0 {name=p5 lab=vccd1} |
| 72 | C {devices/iopin.sym} 3240 -320 0 0 {name=p6 lab=vccd2} |
| 73 | C {devices/iopin.sym} 3240 -290 0 0 {name=p7 lab=vssd1} |
| 74 | C {devices/iopin.sym} 3240 -260 0 0 {name=p8 lab=vssd2} |
| 75 | C {devices/ipin.sym} 3290 -190 0 0 {name=p9 lab=wb_clk_i} |
| 76 | C {devices/ipin.sym} 3290 -160 0 0 {name=p10 lab=wb_rst_i} |
| 77 | C {devices/ipin.sym} 3290 -130 0 0 {name=p11 lab=wbs_stb_i} |
| 78 | C {devices/ipin.sym} 3290 -100 0 0 {name=p12 lab=wbs_cyc_i} |
| 79 | C {devices/ipin.sym} 3290 -70 0 0 {name=p13 lab=wbs_we_i} |
| 80 | C {devices/ipin.sym} 3290 -40 0 0 {name=p14 lab=wbs_sel_i[3:0]} |
| 81 | C {devices/ipin.sym} 3290 -10 0 0 {name=p15 lab=wbs_dat_i[31:0]} |
| 82 | C {devices/ipin.sym} 3290 20 0 0 {name=p16 lab=wbs_adr_i[31:0]} |
| 83 | C {devices/opin.sym} 3280 80 0 0 {name=p17 lab=wbs_ack_o} |
| 84 | C {devices/opin.sym} 3280 110 0 0 {name=p18 lab=wbs_dat_o[31:0]} |
| 85 | C {devices/ipin.sym} 3290 150 0 0 {name=p19 lab=la_data_in[127:0]} |
| 86 | C {devices/opin.sym} 3280 180 0 0 {name=p20 lab=la_data_out[127:0]} |
| 87 | C {devices/ipin.sym} 3290 260 0 0 {name=p21 lab=io_in[26:0]} |
| 88 | C {devices/ipin.sym} 3290 290 0 0 {name=p22 lab=io_in_3v3[26:0]} |
| 89 | C {devices/ipin.sym} 3280 570 0 0 {name=p23 lab=user_clock2} |
| 90 | C {devices/opin.sym} 3280 320 0 0 {name=p24 lab=io_out[26:0]} |
| 91 | C {devices/opin.sym} 3280 350 0 0 {name=p25 lab=io_oeb[26:0]} |
| 92 | C {devices/iopin.sym} 3250 410 0 0 {name=p26 lab=gpio_analog[17:0]} |
| 93 | C {devices/iopin.sym} 3250 440 0 0 {name=p27 lab=gpio_noesd[17:0]} |
| 94 | C {devices/iopin.sym} 3250 470 0 0 {name=p29 lab=io_analog[10:0]} |
| 95 | C {devices/iopin.sym} 3250 500 0 0 {name=p30 lab=io_clamp_high[2:0]} |
| 96 | C {devices/iopin.sym} 3250 530 0 0 {name=p31 lab=io_clamp_low[2:0]} |
| 97 | C {devices/opin.sym} 3270 600 0 0 {name=p32 lab=user_irq[2:0]} |
| 98 | C {devices/ipin.sym} 3290 210 0 0 {name=p28 lab=la_oenb[127:0]} |
| 99 | C {devices/lab_pin.sym} 3730 -460 0 0 {name=l1 sig_type=std_logic lab=vdda1} |
| 100 | C {devices/lab_pin.sym} 3770 -180 0 0 {name=l2 sig_type=std_logic lab=vssa1} |
| 101 | C {devices/lab_pin.sym} 3960 -460 0 1 {name=l3 sig_type=std_logic lab=vccd1} |
| 102 | C {devices/lab_pin.sym} 3950 -130 0 1 {name=l4 sig_type=std_logic lab=vccd1} |
| 103 | C {devices/lab_pin.sym} 3790 -130 0 0 {name=l5 sig_type=std_logic lab=io_analog[4]} |
| 104 | C {devices/lab_pin.sym} 3800 150 0 0 {name=l6 sig_type=std_logic lab=vssa1} |
| 105 | C {devices/lab_pin.sym} 4130 -340 0 1 {name=l7 sig_type=std_logic lab=gpio_analog[3]} |
| 106 | C {devices/lab_pin.sym} 4130 -310 0 1 {name=l8 sig_type=std_logic lab=io_out[11]} |
| 107 | C {devices/lab_pin.sym} 4130 -280 0 1 {name=l9 sig_type=std_logic lab=io_out[12]} |
| 108 | C {devices/lab_pin.sym} 4110 -10 0 1 {name=l10 sig_type=std_logic lab=gpio_analog[7]} |
| 109 | C {devices/lab_pin.sym} 4110 20 0 1 {name=l11 sig_type=std_logic lab=io_out[15]} |
| 110 | C {devices/lab_pin.sym} 4110 50 0 1 {name=l12 sig_type=std_logic lab=io_out[16]} |
Tim Edwards | 1d231e8 | 2021-12-19 17:03:41 -0500 | [diff] [blame] | 111 | C {sky130_fd_pr/res_generic_m1.sym} 3670 370 0 0 {name=R1 |
| 112 | W=11 |
| 113 | L=0.25 |
| 114 | model=res_generic_m3 |
| 115 | mult=1} |
| 116 | C {sky130_fd_pr/res_generic_m1.sym} 3670 490 0 0 {name=R2 |
| 117 | W=11 |
| 118 | L=0.25 |
| 119 | model=res_generic_m3 |
| 120 | mult=1} |
| 121 | C {sky130_fd_pr/res_generic_m1.sym} 3670 620 0 0 {name=R4 |
| 122 | W=11 |
| 123 | L=0.25 |
| 124 | model=res_generic_m3 |
| 125 | mult=1} |
| 126 | C {sky130_fd_pr/res_generic_m1.sym} 4160 360 0 0 {name=R5 |
| 127 | W=11 |
| 128 | L=0.25 |
| 129 | model=res_generic_m3 |
| 130 | mult=1} |
| 131 | C {sky130_fd_pr/res_generic_m1.sym} 4160 490 0 0 {name=R6 |
| 132 | W=11 |
| 133 | L=0.25 |
| 134 | model=res_generic_m3 |
| 135 | mult=1} |
| 136 | C {sky130_fd_pr/res_generic_m1.sym} 4160 590 0 0 {name=R7 |
| 137 | W=11 |
| 138 | L=0.25 |
| 139 | model=res_generic_m3 |
| 140 | mult=1} |
| 141 | C {devices/lab_pin.sym} 3630 300 0 0 {name=l13 sig_type=std_logic lab=io_clamp_low[2]} |
| 142 | C {devices/lab_pin.sym} 3630 440 0 0 {name=l14 sig_type=std_logic lab=io_clamp_high[2]} |
| 143 | C {devices/lab_pin.sym} 3630 570 0 0 {name=l15 sig_type=std_logic lab=io_clamp_low[1]} |
| 144 | C {devices/lab_pin.sym} 4130 300 0 0 {name=l16 sig_type=std_logic lab=io_clamp_high[1]} |
| 145 | C {devices/lab_pin.sym} 4130 440 0 0 {name=l17 sig_type=std_logic lab=io_clamp_low[0]} |
| 146 | C {devices/lab_pin.sym} 3630 420 0 0 {name=l18 sig_type=std_logic lab=vssa1} |
| 147 | C {devices/lab_pin.sym} 3630 530 0 0 {name=l19 sig_type=std_logic lab=vssa1} |
| 148 | C {devices/lab_pin.sym} 4130 410 0 0 {name=l20 sig_type=std_logic lab=vssa1} |
| 149 | C {devices/lab_pin.sym} 4130 530 0 0 {name=l21 sig_type=std_logic lab=vssa1} |
| 150 | C {devices/lab_pin.sym} 3630 670 0 0 {name=l22 sig_type=std_logic lab=vssa1} |
| 151 | C {devices/lab_pin.sym} 4130 550 0 0 {name=l23 sig_type=std_logic lab=io_clamp_high[0]} |
| 152 | C {devices/lab_pin.sym} 4130 640 0 0 {name=l24 sig_type=std_logic lab=io_analog[4]} |
| 153 | C {sky130_fd_pr/res_generic_m1.sym} 3670 780 0 0 {name=R8 |
| 154 | W=0.56 |
| 155 | L=0.49 |
| 156 | model=res_generic_m3 |
| 157 | mult=1} |
| 158 | C {sky130_fd_pr/res_generic_m1.sym} 3670 900 0 0 {name=R9 |
| 159 | W=0.56 |
| 160 | L=0.31 |
| 161 | model=res_generic_m3 |
| 162 | mult=1} |
| 163 | C {sky130_fd_pr/res_generic_m1.sym} 4160 770 0 0 {name=R11 |
| 164 | W=0.56 |
| 165 | L=0.58 |
| 166 | model=res_generic_m3 |
| 167 | mult=1} |
| 168 | C {sky130_fd_pr/res_generic_m1.sym} 4160 900 0 0 {name=R12 |
| 169 | W=0.56 |
| 170 | L=0.6 |
| 171 | model=res_generic_m3 |
| 172 | mult=1} |
| 173 | C {devices/lab_pin.sym} 4130 850 0 0 {name=l25 sig_type=std_logic lab=io_oeb[15]} |
| 174 | C {devices/lab_pin.sym} 3630 850 0 0 {name=l26 sig_type=std_logic lab=io_oeb[16]} |
| 175 | C {devices/lab_pin.sym} 4130 710 0 0 {name=l27 sig_type=std_logic lab=io_oeb[11]} |
| 176 | C {devices/lab_pin.sym} 3630 710 0 0 {name=l28 sig_type=std_logic lab=io_oeb[12]} |
| 177 | C {devices/lab_pin.sym} 3630 830 0 0 {name=l29 sig_type=std_logic lab=vssd1} |
| 178 | C {devices/lab_pin.sym} 3630 940 0 0 {name=l30 sig_type=std_logic lab=vssd1} |
| 179 | C {devices/lab_pin.sym} 4130 820 0 0 {name=l31 sig_type=std_logic lab=vssd1} |
| 180 | C {devices/lab_pin.sym} 4130 940 0 0 {name=l32 sig_type=std_logic lab=vssd1} |