| commit | 069ea9afc93abed093494c3e8f4f77c37ed1ad5f | [log] [tgz] |
|---|---|---|
| author | Charana Sonnadara <charanas@umd.edu> | Tue Jun 07 18:00:15 2022 -0400 |
| committer | Charana Sonnadara <charanas@umd.edu> | Tue Jun 07 18:00:15 2022 -0400 |
| tree | c68807d390e5d44ef084513c7bcc18346567bbdd | |
| parent | 0acef2b71c7b3e39b875924c128c40ec406866e4 [diff] |
C4 DRC solving
The focus of this tape-out is integrating analog synapses. Specifically, we are integrating ReRAM based synapse and FG-based synapse. ReRAM based array is a 1T-1R strucuture with the goal of increasing the size of the array. FG synapses is built using the high voltage transistors present on the SKY130 process.