verilog/includes/includes.rtl.caravel_user_project

# Caravel user project includes
-v $(USER_PROJECT_VERILOG)/rtl/user_project_wrapper.v	     
-v $(USER_PROJECT_VERILOG)/rtl/openram_demo.v
-v $(USER_PROJECT_VERILOG)/rtl/sram_32_16_sky130.v