updated README
diff --git a/README.md b/README.md index 0f510e3..9236e65 100644 --- a/README.md +++ b/README.md
@@ -4,8 +4,32 @@ - 10b SAR-ADC on powered from external supply. - 10b SAR-ADC powered from internal regulators. -- Trimable bandgap reference. +- Bandgap reference. - Testbuffer with multiplexer input. - Clock generator - 2 linear regulators, 1.2V and 1.5V. - Bias current/voltage generator. + + +Included are: + +- Hierachical GDS of the whole layout with all individual blocks. +- Schematics for all parts of the layout. +- Testbenches for all the individual blocks. +- Simulation corners setups for process corner simulations. + + +# Schematics + +Simply source cadrc in the xschem folder and execute +xschem afterwards to get an full overview. + + + +# Layout + + + + + +
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