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mpw-006
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slot-012
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dfcf619faba33bf10589620b9d07a4642b697a21
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verilog
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includes
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includes.rtl.caravel_user_project
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# Caravel user project includes
-
v $
(
USER_PROJECT_VERILOG
)/
rtl
/
user_project_wrapper
.
v
-
v $
(
USER_PROJECT_VERILOG
)/
rtl
/
user_project
.
v
