blob: 1c9064e0b8372a77723fc17db627a92d81dc04dd [file] [log] [blame]
Project Chip ID is: 394030
Setting Project Chip ID to: 0006032e
Step 1: Modify Layout of the user_id_programming subcell
Done!
Step 2: Add user project ID parameter to source verilog.
Done!
Step 3: Add user project ID parameter to gate-level verilog.
Done!
Step 4: Add user project ID text to top level layout.
Done!