add mcw_root

Makefile

diff --git a/Makefile b/Makefile
index e787f93..d2ba127 100644
--- a/Makefile
+++ b/Makefile
@@ -17,7 +17,7 @@
 
 CARAVEL_ROOT?=$(PWD)/caravel
 PRECHECK_ROOT?=${HOME}/mpw_precheck
-MCW_ROOT?=$(PWD)/mgmt_core_wrapper
+MCW_ROOT?=$(UPRJ_ROOT)/mgmt_core_wrapper
 SIM?=RTL
 
 export SKYWATER_COMMIT=c094b6e83a4f9298e47f696ec5a7fd53535ec5eb
@@ -79,11 +79,12 @@
 docker_run_verify=\
 	docker run -v ${TARGET_PATH}:${TARGET_PATH} -v ${PDK_ROOT}:${PDK_ROOT} \
 		-v ${CARAVEL_ROOT}:${CARAVEL_ROOT} \
+		-v $(MCW_ROOT):$(MCW_ROOT) \
 		-e TARGET_PATH=${TARGET_PATH} -e PDK_ROOT=${PDK_ROOT} \
 		-e CARAVEL_ROOT=${CARAVEL_ROOT} \
 		-e TOOLS=/opt/riscv32i \
 		-e DESIGNS=$(TARGET_PATH) \
-		-e CORE_VERILOG_PATH=$(TARGET_PATH)/mgmt_core_wrapper/verilog \
+		-e CORE_VERILOG_PATH=$(MCW_ROOT)/verilog \
 		-e GCC_PREFIX=riscv32-unknown-elf \
 		-e MCW_ROOT=$(MCW_ROOT) \
 		-u $$(id -u $$USER):$$(id -g $$USER) efabless/dv_setup:latest \
@@ -174,7 +175,7 @@
 .PHONY: clean
 clean:
 	cd ./verilog/dv/ && \
-		$(MAKE) -j$(THREADS) clean
+		$(MAKE) clean
 
 check-caravel:
 	@if [ ! -d "$(CARAVEL_ROOT)" ]; then \