tree: 34d44f0e331207017def0b07a97fd0872af70665 [path history] [tgz]
  1. def/
  2. docs/
  3. gds/
  4. lef/
  5. mag/
  6. maglef/
  7. openlane/
  8. precheck_results/
  9. sdc/
  10. sdf/
  11. signoff/
  12. spef/
  13. spi/
  14. verilog/
  16. Makefile

Caravel User Project

License UPRJ_CI Caravel Build

:exclamation: Important Note

Please fill in your project documentation in this file

Refer to README for a quick start of how to use caravel_user_project

Refer to README for this sample project documentation. Quick Launch for Designers


Running the simulation

Assuming you already:

  • went throught the quick start for setting up your environemnt,
  • integrated your design into the user's wrapper and
  • hardenned your design as well as the user's wrapper (for GL simulation)
make simenv
SIM=RTL make verify-<dv-test>
# OR
SIM=GL make verify-<dv-test>

<dv-test>: io_ports, mprj_stimulus, la_test1, la_test2 or wb_port.

For advanced users

Simulation Environment Setup