| # Generated by Yosys 0.15+11 (git sha1 cbece4af0, clang 10.0.0-4ubuntu1 -fPIC -Os) |
| autoidx 429 |
| attribute \keep 1 |
| attribute \hdlname "\\hyperram" |
| attribute \top 1 |
| attribute \src "hyperram.v:1.1-308.10" |
| module \hyperram |
| attribute \src "hyperram.v:295.3-305.6" |
| wire $0$formal$hyperram.v:296$1_CHECK[0:0]$51 |
| attribute \src "hyperram.v:295.3-305.6" |
| wire $0$formal$hyperram.v:297$2_CHECK[0:0]$53 |
| attribute \src "hyperram.v:295.3-305.6" |
| wire $0$formal$hyperram.v:298$3_CHECK[0:0]$55 |
| attribute \src "hyperram.v:295.3-305.6" |
| wire $0$formal$hyperram.v:299$4_CHECK[0:0]$57 |
| attribute \src "hyperram.v:295.3-305.6" |
| wire $0$formal$hyperram.v:300$5_CHECK[0:0]$59 |
| attribute \src "hyperram.v:295.3-305.6" |
| wire $0$formal$hyperram.v:301$6_CHECK[0:0]$61 |
| attribute \src "hyperram.v:295.3-305.6" |
| wire $0$formal$hyperram.v:302$7_CHECK[0:0]$63 |
| attribute \src "hyperram.v:295.3-305.6" |
| wire $0$formal$hyperram.v:303$8_CHECK[0:0]$65 |
| attribute \src "hyperram.v:295.3-305.6" |
| wire $0$formal$hyperram.v:304$9_CHECK[0:0]$67 |
| attribute \src "hyperram.v:32.2-39.5" |
| wire $0\ck[0:0] |
| attribute \src "hyperram.v:268.3-275.6" |
| wire width 6 $0\read_count[5:0] |
| attribute \src "hyperram.v:268.3-275.6" |
| wire width 6 $0\write_count[5:0] |
| attribute \src "hyperram.v:0.0-0.0" |
| wire width 7 $2\next_control_state[6:0] |
| attribute \src "hyperram.v:0.0-0.0" |
| wire width 8 $2\next_done_counter[7:0] |
| attribute \src "hyperram.v:0.0-0.0" |
| wire width 8 $2\next_wait_counter[7:0] |
| attribute \src "hyperram.v:0.0-0.0" |
| wire width 7 $3\next_control_state[6:0] |
| wire width 3 $4\next_control_state[6:0] |
| attribute \src "hyperram.v:0.0-0.0" |
| wire width 7 $5\next_control_state[6:0] |
| attribute \src "hyperram.v:0.0-0.0" |
| wire width 7 $6\next_control_state[6:0] |
| wire width 7 $add$hyperram.v:109$23_Y |
| wire width 8 $add$hyperram.v:152$30_Y |
| wire width 8 $add$hyperram.v:225$40_Y |
| wire width 6 $add$hyperram.v:270$47_Y |
| wire width 6 $add$hyperram.v:273$49_Y |
| wire $auto$opt_reduce.cc:134:opt_pmux$418 |
| wire $auto$opt_reduce.cc:134:opt_pmux$420 |
| wire $auto$opt_reduce.cc:134:opt_pmux$422 |
| attribute \src "hyperram.v:154.8-154.36" |
| wire $eq$hyperram.v:154$31_Y |
| attribute \src "hyperram.v:227.8-227.36" |
| wire $eq$hyperram.v:227$41_Y |
| attribute \src "hyperram.v:269.7-269.28" |
| wire $eq$hyperram.v:269$46_Y |
| attribute \src "hyperram.v:272.7-272.28" |
| wire $eq$hyperram.v:272$48_Y |
| attribute \src "hyperram.v:304.29-304.44" |
| wire $eq$hyperram.v:304$77_Y |
| attribute \src "hyperram.v:304.48-304.64" |
| wire $eq$hyperram.v:304$78_Y |
| attribute \src "hyperram.v:0.0-0.0" |
| wire $formal$hyperram.v:296$1_CHECK |
| attribute \init 1'0 |
| attribute \src "hyperram.v:0.0-0.0" |
| wire $formal$hyperram.v:296$1_EN |
| attribute \src "hyperram.v:0.0-0.0" |
| wire $formal$hyperram.v:297$2_CHECK |
| attribute \src "hyperram.v:0.0-0.0" |
| wire $formal$hyperram.v:298$3_CHECK |
| attribute \src "hyperram.v:0.0-0.0" |
| wire $formal$hyperram.v:299$4_CHECK |
| attribute \src "hyperram.v:0.0-0.0" |
| wire $formal$hyperram.v:300$5_CHECK |
| attribute \src "hyperram.v:0.0-0.0" |
| wire $formal$hyperram.v:301$6_CHECK |
| attribute \src "hyperram.v:0.0-0.0" |
| wire $formal$hyperram.v:302$7_CHECK |
| attribute \src "hyperram.v:0.0-0.0" |
| wire $formal$hyperram.v:303$8_CHECK |
| attribute \src "hyperram.v:0.0-0.0" |
| wire $formal$hyperram.v:304$9_CHECK |
| attribute \src "hyperram.v:201.8-201.26" |
| wire $logic_or$hyperram.v:201$35_Y |
| wire $procmux$213_CMP |
| wire $procmux$214_CMP |
| wire $procmux$217_CMP |
| wire $procmux$218_CMP |
| wire $procmux$222_CMP |
| wire $procmux$223_CMP |
| wire $procmux$224_CMP |
| wire $procmux$225_CMP |
| wire $procmux$226_CMP |
| attribute \src "hyperram.v:6.15-6.22" |
| wire width 32 input 3 \address |
| attribute \src "hyperram.v:16.9-16.11" |
| wire output 11 \ck |
| attribute \src "hyperram.v:17.9-17.15" |
| wire output 12 \ck_bar |
| attribute \src "hyperram.v:2.8-2.11" |
| wire input 1 \clk |
| attribute \src "hyperram.v:236.13-236.28" |
| wire width 48 \command_address |
| attribute \init 7'0000000 |
| attribute \src "hyperram.v:66.12-66.25" |
| wire width 7 \control_state |
| attribute \src "hyperram.v:18.9-18.15" |
| wire output 13 \cs_bar |
| attribute \src "hyperram.v:8.16-8.23" |
| wire width 32 output 5 \data_in |
| attribute \src "hyperram.v:70.13-70.29" |
| wire width 32 \data_in_register |
| attribute \src "hyperram.v:7.15-7.23" |
| wire width 32 input 4 \data_out |
| attribute \src "hyperram.v:242.13-242.30" |
| wire width 32 \data_out_register |
| attribute \init 8'00000000 |
| attribute \src "hyperram.v:62.12-62.24" |
| wire width 8 \done_counter |
| attribute \src "hyperram.v:24.14-24.26" |
| wire width 6 input 17 \done_latency |
| attribute \src "hyperram.v:15.14-15.16" |
| wire width 8 inout 10 \dq |
| attribute \src "hyperram.v:47.6-47.11" |
| wire \dq_oe |
| attribute \src "hyperram.v:46.12-46.18" |
| wire width 8 \dq_out |
| attribute \src "hyperram.v:237.13-237.33" |
| wire width 48 \next_command_address |
| attribute \src "hyperram.v:67.12-67.30" |
| wire width 7 \next_control_state |
| attribute \src "hyperram.v:243.13-243.35" |
| wire width 32 \next_data_out_register |
| attribute \src "hyperram.v:63.12-63.29" |
| wire width 8 \next_done_counter |
| attribute \src "hyperram.v:60.12-60.29" |
| wire width 8 \next_wait_counter |
| attribute \src "hyperram.v:240.12-240.36" |
| wire width 4 \next_write_mask_register |
| attribute \init 6'000000 |
| attribute \src "hyperram.v:265.13-265.23" |
| wire width 6 \read_count |
| attribute \src "hyperram.v:3.8-3.11" |
| wire input 2 \rst |
| attribute \src "hyperram.v:19.8-19.12" |
| wire inout 14 \rwds |
| attribute \src "hyperram.v:49.6-49.13" |
| wire \rwds_oe |
| attribute \src "hyperram.v:48.6-48.14" |
| wire \rwds_out |
| attribute \src "hyperram.v:22.8-22.18" |
| wire input 15 \timed_read |
| attribute \src "hyperram.v:11.8-11.25" |
| wire input 8 \transaction_begin |
| attribute \src "hyperram.v:12.9-12.24" |
| wire output 9 \transaction_end |
| attribute \init 8'00000000 |
| attribute \src "hyperram.v:59.12-59.24" |
| wire width 8 \wait_counter |
| attribute \src "hyperram.v:23.14-23.26" |
| wire width 6 input 16 \wait_latency |
| attribute \init 6'000000 |
| attribute \src "hyperram.v:266.13-266.24" |
| wire width 6 \write_count |
| attribute \src "hyperram.v:9.8-9.20" |
| wire input 6 \write_enable |
| attribute \src "hyperram.v:10.14-10.24" |
| wire width 4 input 7 \write_mask |
| attribute \src "hyperram.v:239.12-239.31" |
| wire width 4 \write_mask_register |
| attribute \src "hyperram.v:109.27-109.44" |
| cell $add $add$hyperram.v:109$23 |
| parameter \A_SIGNED 0 |
| parameter \A_WIDTH 7 |
| parameter \B_SIGNED 0 |
| parameter \B_WIDTH 1 |
| parameter \Y_WIDTH 7 |
| connect \A \control_state |
| connect \B 1'1 |
| connect \Y $add$hyperram.v:109$23_Y |
| end |
| attribute \src "hyperram.v:152.25-152.41" |
| cell $add $add$hyperram.v:152$30 |
| parameter \A_SIGNED 0 |
| parameter \A_WIDTH 8 |
| parameter \B_SIGNED 0 |
| parameter \B_WIDTH 1 |
| parameter \Y_WIDTH 8 |
| connect \A \wait_counter |
| connect \B 1'1 |
| connect \Y $add$hyperram.v:152$30_Y |
| end |
| attribute \src "hyperram.v:225.25-225.41" |
| cell $add $add$hyperram.v:225$40 |
| parameter \A_SIGNED 0 |
| parameter \A_WIDTH 8 |
| parameter \B_SIGNED 0 |
| parameter \B_WIDTH 1 |
| parameter \Y_WIDTH 8 |
| connect \A \done_counter |
| connect \B 1'1 |
| connect \Y $add$hyperram.v:225$40_Y |
| end |
| attribute \src "hyperram.v:270.19-270.33" |
| cell $add $add$hyperram.v:270$47 |
| parameter \A_SIGNED 0 |
| parameter \A_WIDTH 6 |
| parameter \B_SIGNED 0 |
| parameter \B_WIDTH 1 |
| parameter \Y_WIDTH 6 |
| connect \A \read_count |
| connect \B 1'1 |
| connect \Y $add$hyperram.v:270$47_Y |
| end |
| attribute \src "hyperram.v:273.20-273.35" |
| cell $add $add$hyperram.v:273$49 |
| parameter \A_SIGNED 0 |
| parameter \A_WIDTH 6 |
| parameter \B_SIGNED 0 |
| parameter \B_WIDTH 1 |
| parameter \Y_WIDTH 6 |
| connect \A \write_count |
| connect \B 1'1 |
| connect \Y $add$hyperram.v:273$49_Y |
| end |
| cell $reduce_or $auto$opt_reduce.cc:128:opt_pmux$417 |
| parameter \A_SIGNED 0 |
| parameter \A_WIDTH 12 |
| parameter \Y_WIDTH 1 |
| connect \A { $procmux$226_CMP $procmux$225_CMP $procmux$224_CMP $procmux$223_CMP $procmux$222_CMP $procmux$218_CMP $procmux$217_CMP $procmux$214_CMP $procmux$213_CMP $0$formal$hyperram.v:299$4_CHECK[0:0]$57 $0$formal$hyperram.v:297$2_CHECK[0:0]$53 $eq$hyperram.v:269$46_Y } |
| connect \Y $auto$opt_reduce.cc:134:opt_pmux$418 |
| end |
| cell $reduce_or $auto$opt_reduce.cc:128:opt_pmux$419 |
| parameter \A_SIGNED 0 |
| parameter \A_WIDTH 4 |
| parameter \Y_WIDTH 1 |
| connect \A { $procmux$218_CMP $procmux$217_CMP $0$formal$hyperram.v:299$4_CHECK[0:0]$57 $eq$hyperram.v:272$48_Y } |
| connect \Y $auto$opt_reduce.cc:134:opt_pmux$420 |
| end |
| cell $reduce_or $auto$opt_reduce.cc:128:opt_pmux$421 |
| parameter \A_SIGNED 0 |
| parameter \A_WIDTH 10 |
| parameter \Y_WIDTH 1 |
| connect \A { $procmux$226_CMP $procmux$225_CMP $procmux$224_CMP $procmux$223_CMP $procmux$222_CMP $procmux$218_CMP $procmux$217_CMP $0$formal$hyperram.v:299$4_CHECK[0:0]$57 $0$formal$hyperram.v:297$2_CHECK[0:0]$53 $eq$hyperram.v:272$48_Y } |
| connect \Y $auto$opt_reduce.cc:134:opt_pmux$422 |
| end |
| attribute \src "hyperram.v:154.8-154.36" |
| cell $eq $eq$hyperram.v:154$31 |
| parameter \A_SIGNED 0 |
| parameter \A_WIDTH 8 |
| parameter \B_SIGNED 0 |
| parameter \B_WIDTH 3 |
| parameter \Y_WIDTH 1 |
| connect \A \wait_counter |
| connect \B 3'100 |
| connect \Y $eq$hyperram.v:154$31_Y |
| end |
| attribute \src "hyperram.v:227.8-227.36" |
| cell $eq $eq$hyperram.v:227$41 |
| parameter \A_SIGNED 0 |
| parameter \A_WIDTH 8 |
| parameter \B_SIGNED 0 |
| parameter \B_WIDTH 3 |
| parameter \Y_WIDTH 1 |
| connect \A \done_counter |
| connect \B 3'100 |
| connect \Y $eq$hyperram.v:227$41_Y |
| end |
| attribute \src "hyperram.v:269.7-269.28" |
| cell $eq $eq$hyperram.v:269$46 |
| parameter \A_SIGNED 0 |
| parameter \A_WIDTH 7 |
| parameter \B_SIGNED 0 |
| parameter \B_WIDTH 4 |
| parameter \Y_WIDTH 1 |
| connect \A \control_state |
| connect \B 4'1111 |
| connect \Y $eq$hyperram.v:269$46_Y |
| end |
| attribute \src "hyperram.v:272.7-272.28" |
| cell $eq $eq$hyperram.v:272$48 |
| parameter \A_SIGNED 0 |
| parameter \A_WIDTH 7 |
| parameter \B_SIGNED 0 |
| parameter \B_WIDTH 4 |
| parameter \Y_WIDTH 1 |
| connect \A \control_state |
| connect \B 4'1011 |
| connect \Y $eq$hyperram.v:272$48_Y |
| end |
| attribute \src "hyperram.v:296.23-296.41" |
| cell $logic_not $eq$hyperram.v:296$69 |
| parameter \A_SIGNED 0 |
| parameter \A_WIDTH 7 |
| parameter \Y_WIDTH 1 |
| connect \A \control_state |
| connect \Y $0$formal$hyperram.v:296$1_CHECK[0:0]$51 |
| end |
| attribute \src "hyperram.v:297.21-297.39" |
| cell $eq $eq$hyperram.v:297$70 |
| parameter \A_SIGNED 0 |
| parameter \A_WIDTH 7 |
| parameter \B_SIGNED 0 |
| parameter \B_WIDTH 3 |
| parameter \Y_WIDTH 1 |
| connect \A \control_state |
| connect \B 3'110 |
| connect \Y $0$formal$hyperram.v:297$2_CHECK[0:0]$53 |
| end |
| attribute \src "hyperram.v:298.23-298.41" |
| cell $eq $eq$hyperram.v:298$71 |
| parameter \A_SIGNED 0 |
| parameter \A_WIDTH 7 |
| parameter \B_SIGNED 0 |
| parameter \B_WIDTH 3 |
| parameter \Y_WIDTH 1 |
| connect \A \control_state |
| connect \B 3'111 |
| connect \Y $0$formal$hyperram.v:298$3_CHECK[0:0]$55 |
| end |
| attribute \src "hyperram.v:299.24-299.42" |
| cell $eq $eq$hyperram.v:299$72 |
| parameter \A_SIGNED 0 |
| parameter \A_WIDTH 7 |
| parameter \B_SIGNED 0 |
| parameter \B_WIDTH 4 |
| parameter \Y_WIDTH 1 |
| connect \A \control_state |
| connect \B 4'1000 |
| connect \Y $0$formal$hyperram.v:299$4_CHECK[0:0]$57 |
| end |
| attribute \src "hyperram.v:300.23-300.43" |
| cell $eq $eq$hyperram.v:300$73 |
| parameter \A_SIGNED 0 |
| parameter \A_WIDTH 7 |
| parameter \B_SIGNED 0 |
| parameter \B_WIDTH 4 |
| parameter \Y_WIDTH 1 |
| connect \A \control_state |
| connect \B 4'1100 |
| connect \Y $0$formal$hyperram.v:300$5_CHECK[0:0]$59 |
| end |
| attribute \src "hyperram.v:301.23-301.44" |
| cell $eq $eq$hyperram.v:301$74 |
| parameter \A_SIGNED 0 |
| parameter \A_WIDTH 7 |
| parameter \B_SIGNED 0 |
| parameter \B_WIDTH 5 |
| parameter \Y_WIDTH 1 |
| connect \A \control_state |
| connect \B 5'10000 |
| connect \Y $0$formal$hyperram.v:301$6_CHECK[0:0]$61 |
| end |
| attribute \src "hyperram.v:302.26-302.44" |
| cell $eq $eq$hyperram.v:302$75 |
| parameter \A_SIGNED 0 |
| parameter \A_WIDTH 6 |
| parameter \B_SIGNED 0 |
| parameter \B_WIDTH 2 |
| parameter \Y_WIDTH 1 |
| connect \A \write_count |
| connect \B 2'10 |
| connect \Y $0$formal$hyperram.v:302$7_CHECK[0:0]$63 |
| end |
| attribute \src "hyperram.v:303.25-303.42" |
| cell $eq $eq$hyperram.v:303$76 |
| parameter \A_SIGNED 0 |
| parameter \A_WIDTH 6 |
| parameter \B_SIGNED 0 |
| parameter \B_WIDTH 2 |
| parameter \Y_WIDTH 1 |
| connect \A \read_count |
| connect \B 2'10 |
| connect \Y $0$formal$hyperram.v:303$8_CHECK[0:0]$65 |
| end |
| attribute \src "hyperram.v:304.29-304.44" |
| cell $eq $eq$hyperram.v:304$77 |
| parameter \A_SIGNED 0 |
| parameter \A_WIDTH 6 |
| parameter \B_SIGNED 0 |
| parameter \B_WIDTH 1 |
| parameter \Y_WIDTH 1 |
| connect \A \read_count |
| connect \B 1'1 |
| connect \Y $eq$hyperram.v:304$77_Y |
| end |
| attribute \src "hyperram.v:304.48-304.64" |
| cell $eq $eq$hyperram.v:304$78 |
| parameter \A_SIGNED 0 |
| parameter \A_WIDTH 6 |
| parameter \B_SIGNED 0 |
| parameter \B_WIDTH 1 |
| parameter \Y_WIDTH 1 |
| connect \A \write_count |
| connect \B 1'1 |
| connect \Y $eq$hyperram.v:304$78_Y |
| end |
| attribute \src "hyperram.v:304.29-304.64" |
| cell $logic_and $logic_and$hyperram.v:304$79 |
| parameter \A_SIGNED 0 |
| parameter \A_WIDTH 1 |
| parameter \B_SIGNED 0 |
| parameter \B_WIDTH 1 |
| parameter \Y_WIDTH 1 |
| connect \A $eq$hyperram.v:304$77_Y |
| connect \B $eq$hyperram.v:304$78_Y |
| connect \Y $0$formal$hyperram.v:304$9_CHECK[0:0]$67 |
| end |
| attribute \src "hyperram.v:253.4-253.17" |
| cell $logic_not $logic_not$hyperram.v:253$44 |
| parameter \A_SIGNED 0 |
| parameter \A_WIDTH 1 |
| parameter \Y_WIDTH 1 |
| connect \A \write_enable |
| connect \Y \next_command_address [47] |
| end |
| attribute \src "hyperram.v:37.10-37.13" |
| cell $logic_not $logic_not$hyperram.v:37$12 |
| parameter \A_SIGNED 0 |
| parameter \A_WIDTH 1 |
| parameter \Y_WIDTH 1 |
| connect \A \ck |
| connect \Y \ck_bar |
| end |
| attribute \src "hyperram.v:201.8-201.26" |
| cell $logic_or $logic_or$hyperram.v:201$35 |
| parameter \A_SIGNED 0 |
| parameter \A_WIDTH 1 |
| parameter \B_SIGNED 0 |
| parameter \B_WIDTH 1 |
| parameter \Y_WIDTH 1 |
| connect \A \rwds |
| connect \B \timed_read |
| connect \Y $logic_or$hyperram.v:201$35_Y |
| end |
| attribute \src "hyperram.v:295.3-305.6" |
| cell $dff $procdff$389 |
| parameter \CLK_POLARITY 1'1 |
| parameter \WIDTH 1 |
| connect \CLK \clk |
| connect \D $0$formal$hyperram.v:296$1_CHECK[0:0]$51 |
| connect \Q $formal$hyperram.v:296$1_CHECK |
| end |
| attribute \src "hyperram.v:295.3-305.6" |
| cell $dff $procdff$390 |
| parameter \CLK_POLARITY 1'1 |
| parameter \WIDTH 1 |
| connect \CLK \clk |
| connect \D 1'1 |
| connect \Q $formal$hyperram.v:296$1_EN |
| end |
| attribute \src "hyperram.v:295.3-305.6" |
| cell $dff $procdff$391 |
| parameter \CLK_POLARITY 1'1 |
| parameter \WIDTH 1 |
| connect \CLK \clk |
| connect \D $0$formal$hyperram.v:297$2_CHECK[0:0]$53 |
| connect \Q $formal$hyperram.v:297$2_CHECK |
| end |
| attribute \src "hyperram.v:295.3-305.6" |
| cell $dff $procdff$393 |
| parameter \CLK_POLARITY 1'1 |
| parameter \WIDTH 1 |
| connect \CLK \clk |
| connect \D $0$formal$hyperram.v:298$3_CHECK[0:0]$55 |
| connect \Q $formal$hyperram.v:298$3_CHECK |
| end |
| attribute \src "hyperram.v:295.3-305.6" |
| cell $dff $procdff$395 |
| parameter \CLK_POLARITY 1'1 |
| parameter \WIDTH 1 |
| connect \CLK \clk |
| connect \D $0$formal$hyperram.v:299$4_CHECK[0:0]$57 |
| connect \Q $formal$hyperram.v:299$4_CHECK |
| end |
| attribute \src "hyperram.v:295.3-305.6" |
| cell $dff $procdff$397 |
| parameter \CLK_POLARITY 1'1 |
| parameter \WIDTH 1 |
| connect \CLK \clk |
| connect \D $0$formal$hyperram.v:300$5_CHECK[0:0]$59 |
| connect \Q $formal$hyperram.v:300$5_CHECK |
| end |
| attribute \src "hyperram.v:295.3-305.6" |
| cell $dff $procdff$399 |
| parameter \CLK_POLARITY 1'1 |
| parameter \WIDTH 1 |
| connect \CLK \clk |
| connect \D $0$formal$hyperram.v:301$6_CHECK[0:0]$61 |
| connect \Q $formal$hyperram.v:301$6_CHECK |
| end |
| attribute \src "hyperram.v:295.3-305.6" |
| cell $dff $procdff$401 |
| parameter \CLK_POLARITY 1'1 |
| parameter \WIDTH 1 |
| connect \CLK \clk |
| connect \D $0$formal$hyperram.v:302$7_CHECK[0:0]$63 |
| connect \Q $formal$hyperram.v:302$7_CHECK |
| end |
| attribute \src "hyperram.v:295.3-305.6" |
| cell $dff $procdff$403 |
| parameter \CLK_POLARITY 1'1 |
| parameter \WIDTH 1 |
| connect \CLK \clk |
| connect \D $0$formal$hyperram.v:303$8_CHECK[0:0]$65 |
| connect \Q $formal$hyperram.v:303$8_CHECK |
| end |
| attribute \src "hyperram.v:295.3-305.6" |
| cell $dff $procdff$405 |
| parameter \CLK_POLARITY 1'1 |
| parameter \WIDTH 1 |
| connect \CLK \clk |
| connect \D $0$formal$hyperram.v:304$9_CHECK[0:0]$67 |
| connect \Q $formal$hyperram.v:304$9_CHECK |
| end |
| attribute \always_ff 1 |
| attribute \src "hyperram.v:268.3-275.6" |
| cell $dff $procdff$407 |
| parameter \CLK_POLARITY 1'1 |
| parameter \WIDTH 6 |
| connect \CLK \clk |
| connect \D $0\read_count[5:0] |
| connect \Q \read_count |
| end |
| attribute \always_ff 1 |
| attribute \src "hyperram.v:268.3-275.6" |
| cell $dff $procdff$408 |
| parameter \CLK_POLARITY 1'1 |
| parameter \WIDTH 6 |
| connect \CLK \clk |
| connect \D $0\write_count[5:0] |
| connect \Q \write_count |
| end |
| attribute \always_ff 1 |
| attribute \src "hyperram.v:245.2-249.5" |
| cell $dff $procdff$409 |
| parameter \CLK_POLARITY 1'1 |
| parameter \WIDTH 48 |
| connect \CLK \transaction_begin |
| connect \D { \next_command_address [47] 47'01000000000011010001010110011110000000000000000 } |
| connect \Q \command_address |
| end |
| attribute \always_ff 1 |
| attribute \src "hyperram.v:245.2-249.5" |
| cell $dff $procdff$410 |
| parameter \CLK_POLARITY 1'1 |
| parameter \WIDTH 4 |
| connect \CLK \transaction_begin |
| connect \D \write_mask |
| connect \Q \write_mask_register |
| end |
| attribute \always_ff 1 |
| attribute \src "hyperram.v:245.2-249.5" |
| cell $dff $procdff$411 |
| parameter \CLK_POLARITY 1'1 |
| parameter \WIDTH 31 |
| connect \CLK \transaction_begin |
| connect \D 31'1001100110011001101110111011101 |
| connect \Q \data_out_register [30:0] |
| end |
| attribute \always_ff 1 |
| attribute \src "hyperram.v:72.2-85.5" |
| cell $dff $procdff$412 |
| parameter \CLK_POLARITY 1'1 |
| parameter \WIDTH 8 |
| connect \CLK \clk |
| connect \D \next_wait_counter |
| connect \Q \wait_counter |
| end |
| attribute \always_ff 1 |
| attribute \src "hyperram.v:72.2-85.5" |
| cell $dff $procdff$413 |
| parameter \CLK_POLARITY 1'1 |
| parameter \WIDTH 8 |
| connect \CLK \clk |
| connect \D \next_done_counter |
| connect \Q \done_counter |
| end |
| attribute \always_ff 1 |
| attribute \src "hyperram.v:72.2-85.5" |
| cell $dff $procdff$414 |
| parameter \CLK_POLARITY 1'1 |
| parameter \WIDTH 7 |
| connect \CLK \clk |
| connect \D \next_control_state |
| connect \Q \control_state |
| end |
| attribute \always_ff 1 |
| attribute \src "hyperram.v:32.2-39.5" |
| cell $dff $procdff$416 |
| parameter \CLK_POLARITY 1'1 |
| parameter \WIDTH 1 |
| connect \CLK \clk |
| connect \D $0\ck[0:0] |
| connect \Q \ck |
| end |
| attribute \src "hyperram.v:269.7-269.28|hyperram.v:269.4-271.7" |
| cell $mux $procmux$101 |
| parameter \WIDTH 6 |
| connect \A \read_count |
| connect \B $add$hyperram.v:270$47_Y |
| connect \S $eq$hyperram.v:269$46_Y |
| connect \Y $0\read_count[5:0] |
| end |
| attribute \full_case 1 |
| attribute \src "hyperram.v:227.8-227.36|hyperram.v:227.5-230.8" |
| cell $mux $procmux$109 |
| parameter \WIDTH 7 |
| connect \A \control_state |
| connect \B 7'0000000 |
| connect \S $eq$hyperram.v:227$41_Y |
| connect \Y $6\next_control_state[6:0] |
| end |
| attribute \full_case 1 |
| attribute \src "hyperram.v:227.8-227.36|hyperram.v:227.5-230.8" |
| cell $mux $procmux$120 |
| parameter \WIDTH 8 |
| connect \A $add$hyperram.v:225$40_Y |
| connect \B 8'00000000 |
| connect \S $eq$hyperram.v:227$41_Y |
| connect \Y $2\next_done_counter[7:0] |
| end |
| attribute \full_case 1 |
| attribute \src "hyperram.v:201.8-201.26|hyperram.v:201.5-204.8" |
| cell $mux $procmux$153 |
| parameter \WIDTH 7 |
| connect \A \control_state |
| connect \B $add$hyperram.v:109$23_Y |
| connect \S $logic_or$hyperram.v:201$35_Y |
| connect \Y $5\next_control_state[6:0] |
| end |
| attribute \full_case 1 |
| attribute \src "hyperram.v:154.8-154.36|hyperram.v:154.5-162.8" |
| cell $mux $procmux$168 |
| parameter \WIDTH 7 |
| connect \A \control_state |
| connect \B { 4'0001 $4\next_control_state[6:0] } |
| connect \S $eq$hyperram.v:154$31_Y |
| connect \Y $3\next_control_state[6:0] |
| end |
| attribute \full_case 1 |
| attribute \src "hyperram.v:154.8-154.36|hyperram.v:154.5-162.8" |
| cell $mux $procmux$183 |
| parameter \WIDTH 8 |
| connect \A $add$hyperram.v:152$30_Y |
| connect \B 8'00000000 |
| connect \S $eq$hyperram.v:154$31_Y |
| connect \Y $2\next_wait_counter[7:0] |
| end |
| attribute \full_case 1 |
| attribute \src "hyperram.v:108.8-108.25|hyperram.v:108.5-110.8" |
| cell $mux $procmux$205 |
| parameter \WIDTH 7 |
| connect \A \control_state |
| connect \B $add$hyperram.v:109$23_Y |
| connect \S \transaction_begin |
| connect \Y $2\next_control_state[6:0] |
| end |
| attribute \full_case 1 |
| attribute \src "hyperram.v:0.0-0.0|hyperram.v:101.3-232.10" |
| cell $pmux $procmux$210 |
| parameter \S_WIDTH 6 |
| parameter \WIDTH 7 |
| connect \A \control_state |
| connect \B { $2\next_control_state[6:0] $3\next_control_state[6:0] 7'0010000 $5\next_control_state[6:0] $add$hyperram.v:109$23_Y $6\next_control_state[6:0] } |
| connect \S { $0$formal$hyperram.v:296$1_CHECK[0:0]$51 $0$formal$hyperram.v:298$3_CHECK[0:0]$55 $eq$hyperram.v:272$48_Y $0$formal$hyperram.v:300$5_CHECK[0:0]$59 $auto$opt_reduce.cc:134:opt_pmux$418 $0$formal$hyperram.v:301$6_CHECK[0:0]$61 } |
| connect \Y \next_control_state |
| end |
| attribute \full_case 1 |
| attribute \src "hyperram.v:0.0-0.0|hyperram.v:101.3-232.10" |
| cell $eq $procmux$213_CMP0 |
| parameter \A_SIGNED 0 |
| parameter \A_WIDTH 7 |
| parameter \B_SIGNED 0 |
| parameter \B_WIDTH 4 |
| parameter \Y_WIDTH 1 |
| connect \A \control_state |
| connect \B 4'1110 |
| connect \Y $procmux$213_CMP |
| end |
| attribute \full_case 1 |
| attribute \src "hyperram.v:0.0-0.0|hyperram.v:101.3-232.10" |
| cell $eq $procmux$214_CMP0 |
| parameter \A_SIGNED 0 |
| parameter \A_WIDTH 7 |
| parameter \B_SIGNED 0 |
| parameter \B_WIDTH 4 |
| parameter \Y_WIDTH 1 |
| connect \A \control_state |
| connect \B 4'1101 |
| connect \Y $procmux$214_CMP |
| end |
| attribute \full_case 1 |
| attribute \src "hyperram.v:0.0-0.0|hyperram.v:101.3-232.10" |
| cell $eq $procmux$217_CMP0 |
| parameter \A_SIGNED 0 |
| parameter \A_WIDTH 7 |
| parameter \B_SIGNED 0 |
| parameter \B_WIDTH 4 |
| parameter \Y_WIDTH 1 |
| connect \A \control_state |
| connect \B 4'1010 |
| connect \Y $procmux$217_CMP |
| end |
| attribute \full_case 1 |
| attribute \src "hyperram.v:0.0-0.0|hyperram.v:101.3-232.10" |
| cell $eq $procmux$218_CMP0 |
| parameter \A_SIGNED 0 |
| parameter \A_WIDTH 7 |
| parameter \B_SIGNED 0 |
| parameter \B_WIDTH 4 |
| parameter \Y_WIDTH 1 |
| connect \A \control_state |
| connect \B 4'1001 |
| connect \Y $procmux$218_CMP |
| end |
| attribute \full_case 1 |
| attribute \src "hyperram.v:0.0-0.0|hyperram.v:101.3-232.10" |
| cell $eq $procmux$222_CMP0 |
| parameter \A_SIGNED 0 |
| parameter \A_WIDTH 7 |
| parameter \B_SIGNED 0 |
| parameter \B_WIDTH 3 |
| parameter \Y_WIDTH 1 |
| connect \A \control_state |
| connect \B 3'101 |
| connect \Y $procmux$222_CMP |
| end |
| attribute \full_case 1 |
| attribute \src "hyperram.v:0.0-0.0|hyperram.v:101.3-232.10" |
| cell $eq $procmux$223_CMP0 |
| parameter \A_SIGNED 0 |
| parameter \A_WIDTH 7 |
| parameter \B_SIGNED 0 |
| parameter \B_WIDTH 3 |
| parameter \Y_WIDTH 1 |
| connect \A \control_state |
| connect \B 3'100 |
| connect \Y $procmux$223_CMP |
| end |
| attribute \full_case 1 |
| attribute \src "hyperram.v:0.0-0.0|hyperram.v:101.3-232.10" |
| cell $eq $procmux$224_CMP0 |
| parameter \A_SIGNED 0 |
| parameter \A_WIDTH 7 |
| parameter \B_SIGNED 0 |
| parameter \B_WIDTH 2 |
| parameter \Y_WIDTH 1 |
| connect \A \control_state |
| connect \B 2'11 |
| connect \Y $procmux$224_CMP |
| end |
| attribute \full_case 1 |
| attribute \src "hyperram.v:0.0-0.0|hyperram.v:101.3-232.10" |
| cell $eq $procmux$225_CMP0 |
| parameter \A_SIGNED 0 |
| parameter \A_WIDTH 7 |
| parameter \B_SIGNED 0 |
| parameter \B_WIDTH 2 |
| parameter \Y_WIDTH 1 |
| connect \A \control_state |
| connect \B 2'10 |
| connect \Y $procmux$225_CMP |
| end |
| attribute \full_case 1 |
| attribute \src "hyperram.v:0.0-0.0|hyperram.v:101.3-232.10" |
| cell $eq $procmux$226_CMP0 |
| parameter \A_SIGNED 0 |
| parameter \A_WIDTH 7 |
| parameter \B_SIGNED 0 |
| parameter \B_WIDTH 1 |
| parameter \Y_WIDTH 1 |
| connect \A \control_state |
| connect \B 1'1 |
| connect \Y $procmux$226_CMP |
| end |
| attribute \full_case 1 |
| attribute \src "hyperram.v:0.0-0.0|hyperram.v:101.3-232.10" |
| cell $mux $procmux$245 |
| parameter \WIDTH 1 |
| connect \A 1'0 |
| connect \B 1'1 |
| connect \S $0$formal$hyperram.v:296$1_CHECK[0:0]$51 |
| connect \Y \transaction_end |
| end |
| attribute \full_case 1 |
| attribute \src "hyperram.v:156.9-156.30|hyperram.v:156.6-161.9" |
| cell $mux $procmux$297 |
| parameter \WIDTH 3 |
| connect \A 3'000 |
| connect \B 3'100 |
| connect \S \command_address [47] |
| connect \Y $4\next_control_state[6:0] |
| end |
| attribute \full_case 1 |
| attribute \src "hyperram.v:0.0-0.0|hyperram.v:101.3-232.10" |
| cell $mux $procmux$304 |
| parameter \WIDTH 8 |
| connect \A \done_counter |
| connect \B $2\next_done_counter[7:0] |
| connect \S $0$formal$hyperram.v:301$6_CHECK[0:0]$61 |
| connect \Y \next_done_counter |
| end |
| attribute \full_case 1 |
| attribute \src "hyperram.v:0.0-0.0|hyperram.v:101.3-232.10" |
| cell $mux $procmux$316 |
| parameter \WIDTH 8 |
| connect \A \wait_counter |
| connect \B $2\next_wait_counter[7:0] |
| connect \S $0$formal$hyperram.v:298$3_CHECK[0:0]$55 |
| connect \Y \next_wait_counter |
| end |
| attribute \full_case 1 |
| attribute \src "hyperram.v:0.0-0.0|hyperram.v:101.3-232.10" |
| cell $mux $procmux$324 |
| parameter \WIDTH 1 |
| connect \A 1'0 |
| connect \B 1'1 |
| connect \S $auto$opt_reduce.cc:134:opt_pmux$420 |
| connect \Y \rwds_oe |
| end |
| attribute \full_case 1 |
| attribute \src "hyperram.v:0.0-0.0|hyperram.v:101.3-232.10" |
| cell $pmux $procmux$335 |
| parameter \S_WIDTH 4 |
| parameter \WIDTH 1 |
| connect \A 1'x |
| connect \B { \write_mask_register [0] \write_mask_register [1] \write_mask_register [2] \write_mask_register [3] } |
| connect \S { $0$formal$hyperram.v:299$4_CHECK[0:0]$57 $procmux$218_CMP $procmux$217_CMP $eq$hyperram.v:272$48_Y } |
| connect \Y \rwds_out |
| end |
| attribute \full_case 1 |
| attribute \src "hyperram.v:0.0-0.0|hyperram.v:101.3-232.10" |
| cell $mux $procmux$346 |
| parameter \WIDTH 1 |
| connect \A 1'0 |
| connect \B 1'1 |
| connect \S $auto$opt_reduce.cc:134:opt_pmux$422 |
| connect \Y \dq_oe |
| end |
| attribute \full_case 1 |
| attribute \src "hyperram.v:0.0-0.0|hyperram.v:101.3-232.10" |
| cell $pmux $procmux$363 |
| parameter \S_WIDTH 10 |
| parameter \WIDTH 8 |
| connect \A 8'x |
| connect \B { \command_address \data_out_register [7:0] \data_out_register [15:8] \data_out_register [23:16] \data_out_register [30] \data_out_register [30:24] } |
| connect \S { $procmux$226_CMP $procmux$225_CMP $procmux$224_CMP $procmux$223_CMP $procmux$222_CMP $0$formal$hyperram.v:297$2_CHECK[0:0]$53 $0$formal$hyperram.v:299$4_CHECK[0:0]$57 $procmux$218_CMP $procmux$217_CMP $eq$hyperram.v:272$48_Y } |
| connect \Y \dq_out |
| end |
| attribute \full_case 1 |
| attribute \src "hyperram.v:33.6-33.14|hyperram.v:33.3-38.6" |
| cell $mux $procmux$387 |
| parameter \WIDTH 1 |
| connect \A \ck_bar |
| connect \B 1'0 |
| connect \S $0$formal$hyperram.v:296$1_CHECK[0:0]$51 |
| connect \Y $0\ck[0:0] |
| end |
| attribute \src "hyperram.v:272.7-272.28|hyperram.v:272.4-274.7" |
| cell $mux $procmux$99 |
| parameter \WIDTH 6 |
| connect \A \write_count |
| connect \B $add$hyperram.v:273$49_Y |
| connect \S $eq$hyperram.v:272$48_Y |
| connect \Y $0\write_count[5:0] |
| end |
| attribute \src "hyperram.v:51.14-51.35" |
| cell $mux $ternary$hyperram.v:51$16 |
| parameter \WIDTH 8 |
| connect \A 8'x |
| connect \B \dq_out |
| connect \S \dq_oe |
| connect \Y \dq |
| end |
| attribute \src "hyperram.v:52.16-52.41" |
| cell $mux $ternary$hyperram.v:52$19 |
| parameter \WIDTH 1 |
| connect \A 1'x |
| connect \B \rwds_out |
| connect \S \rwds_oe |
| connect \Y \rwds |
| end |
| attribute \src "hyperram.v:297.4-297.40" |
| cell $cover \cover_ca |
| connect \A $formal$hyperram.v:297$2_CHECK |
| connect \EN $formal$hyperram.v:296$1_EN |
| end |
| attribute \src "hyperram.v:301.4-301.45" |
| cell $cover \cover_done |
| connect \A $formal$hyperram.v:301$6_CHECK |
| connect \EN $formal$hyperram.v:296$1_EN |
| end |
| attribute \src "hyperram.v:296.4-296.42" |
| cell $cover \cover_idle |
| connect \A $formal$hyperram.v:296$1_CHECK |
| connect \EN $formal$hyperram.v:296$1_EN |
| end |
| attribute \src "hyperram.v:300.4-300.44" |
| cell $cover \cover_read |
| connect \A $formal$hyperram.v:300$5_CHECK |
| connect \EN $formal$hyperram.v:296$1_EN |
| end |
| attribute \src "hyperram.v:303.4-303.43" |
| cell $cover \cover_read_2 |
| connect \A $formal$hyperram.v:303$8_CHECK |
| connect \EN $formal$hyperram.v:296$1_EN |
| end |
| attribute \src "hyperram.v:298.4-298.42" |
| cell $cover \cover_wait |
| connect \A $formal$hyperram.v:298$3_CHECK |
| connect \EN $formal$hyperram.v:296$1_EN |
| end |
| attribute \src "hyperram.v:299.4-299.43" |
| cell $cover \cover_write |
| connect \A $formal$hyperram.v:299$4_CHECK |
| connect \EN $formal$hyperram.v:296$1_EN |
| end |
| attribute \src "hyperram.v:302.4-302.45" |
| cell $cover \cover_write_2 |
| connect \A $formal$hyperram.v:302$7_CHECK |
| connect \EN $formal$hyperram.v:296$1_EN |
| end |
| attribute \src "hyperram.v:304.4-304.65" |
| cell $cover \cover_write_read |
| connect \A $formal$hyperram.v:304$9_CHECK |
| connect \EN $formal$hyperram.v:296$1_EN |
| end |
| connect \address 305419896 |
| connect \cs_bar \transaction_end |
| connect \data_in 32'10101010101010101011101110111011 |
| connect \data_in_register 32'10101010101010101011101110111011 |
| connect \data_out 32'11001100110011001101110111011101 |
| connect \data_out_register [31] \data_out_register [30] |
| connect \next_command_address [46:0] 47'01000000000011010001010110011110000000000000000 |
| connect \next_data_out_register 32'11001100110011001101110111011101 |
| connect \next_write_mask_register \write_mask |
| connect \rst 1'0 |
| end |
