verilog/dv/test_c0/coe/sw/dmem.coe

memory_initialization_radix = 16;
memory_initialization_vector =
DEADBEEF,
DEADBEEF,
DEADBEEF,
DEADBEEF,
DEADBEEF,
DEADBEEF,
DEADBEEF,
DEADBEEF,
DEADBEEF,
DEADBEEF,
00000000,
00000000,
00000000,
00000000,
00000000,
00000000,
00000000,
00000000,
00000000,
00000000,
00000000,
00000000,
00000000,
00000000,
00000000,
00000000,
00000000,
00000000,
00000000,
00000000,
00000000,
00000000,
00000000,
00000000;