verilog/dv/test_c0/coe/lw/dmem.coe

memory_initialization_radix = 16;
memory_initialization_vector =
00FF00FF,
FF00FF00,
0FF00FF0,
F00FF00F,
00000000,
00000000,
00000000,
00000000,
00000000,
00000000,
00000000,
00000000,
00000000,
00000000,
00000000,
00000000,
00000000,
00000000,
00000000,
00000000,
00000000,
00000000,
00000000,
00000000,
00000000,
00000000,
00000000,
00000000,
00000000,
00000000,
00000000,
00000000,
00000000,
00000000;