commit	8750afc8b94697a72f3290bdb66010bc09d830a4	[log] [tgz]
author	Jeff DiCorpo <jeffdi@efabless.com>	Sun May 01 00:36:59 2022 -0700
committer	Jeff DiCorpo <jeffdi@efabless.com>	Sun May 01 00:36:59 2022 -0700
tree	7704bc1429f3066ada8e8f4d04d5b9c67c31f9a7
parent	1ba9509431cfd8b523b8d7c85245d48a940531e0 [diff]

final gds oasis

mpw_precheck/logs/gds.info[Added - diff]
mpw_precheck/logs/git.info[Added - diff]
mpw_precheck/logs/klayout_beol_check.log[Added - diff]
mpw_precheck/logs/klayout_beol_check.total[Added - diff]
mpw_precheck/logs/klayout_feol_check.log[Added - diff]
mpw_precheck/logs/klayout_feol_check.total[Added - diff]
mpw_precheck/logs/klayout_met_min_ca_density_check.log[Added - diff]
mpw_precheck/logs/klayout_met_min_ca_density_check.total[Added - diff]
mpw_precheck/logs/klayout_offgrid_check.log[Added - diff]
mpw_precheck/logs/klayout_offgrid_check.total[Added - diff]
mpw_precheck/logs/klayout_pin_label_purposes_overlapping_drawing_check.log[Added - diff]
mpw_precheck/logs/klayout_pin_label_purposes_overlapping_drawing_check.total[Added - diff]
mpw_precheck/logs/klayout_zeroarea_check.log[Added - diff]
mpw_precheck/logs/klayout_zeroarea_check.total[Added - diff]
mpw_precheck/logs/magic_drc_check.log[Added - diff]
mpw_precheck/logs/magic_drc_check.total[Added - diff]
mpw_precheck/logs/pdks.info[Added - diff]
mpw_precheck/logs/precheck.log[Added - diff]
mpw_precheck/logs/spdx_compliance_report.log[Added - diff]
mpw_precheck/logs/tools.info[Added - diff]
mpw_precheck/logs/xor_check.log[Added - diff]
mpw_precheck/logs/xor_check.total[Added - diff]
mpw_precheck/outputs/reports/klayout_beol_check.xml[Added - diff]
mpw_precheck/outputs/reports/klayout_feol_check.xml[Added - diff]
mpw_precheck/outputs/reports/klayout_met_min_ca_density_check.xml[Added - diff]
mpw_precheck/outputs/reports/klayout_offgrid_check.xml[Added - diff]
mpw_precheck/outputs/reports/klayout_pin_label_purposes_overlapping_drawing_check.xml[Added - diff]
mpw_precheck/outputs/reports/klayout_zeroarea_check.xml[Added - diff]
mpw_precheck/outputs/reports/magic_drc_check.drc.report[Added - diff]
mpw_precheck/outputs/reports/magic_drc_check.rdb[Added - diff]
mpw_precheck/outputs/reports/magic_drc_check.tcl[Added - diff]
mpw_precheck/outputs/reports/magic_drc_check.tr[Added - diff]
mpw_precheck/outputs/reports/magic_drc_check.xml[Added - diff]
mpw_precheck/outputs/user_project_wrapper.filtered.v[Added - diff]
mpw_precheck/outputs/user_project_wrapper.magic.drc.mag[Added - diff]
mpw_precheck/outputs/user_project_wrapper.xor.gds[Added - diff]
mpw_precheck/outputs/user_project_wrapper_empty_erased.gds[Added - diff]
mpw_precheck/outputs/user_project_wrapper_erased.gds[Added - diff]
mpw_precheck/outputs/user_project_wrapper_no_zero_areas.gds.gz[Added - diff]
signoff/.gitignore[Added - diff]
signoff/assigned_slot[Added - diff]
signoff/caravel_layout.png[Added - diff]
signoff/make_final_oas[Added - diff]
tapeout/logs/compose.log[Added - diff]
tapeout/logs/fill_final.log[Added - diff]
tapeout/logs/fill_initial.log[Added - diff]
tapeout/logs/fill_intermediate.log[Added - diff]
tapeout/logs/gds.info[Added - diff]
tapeout/logs/gen_gpio_defaults.log[Added - diff]
tapeout/logs/git.info[Added - diff]
tapeout/logs/git_clone.log[Added - diff]
tapeout/logs/klayout_beol.log[Added - diff]
tapeout/logs/klayout_feol.log[Added - diff]
tapeout/logs/klayout_fom_density.log[Added - diff]
tapeout/logs/klayout_gds2oas.log[Added - diff]
tapeout/logs/klayout_met_density.log[Added - diff]
tapeout/logs/klayout_missing_cells.log[Added - diff]
tapeout/logs/oasis.info[Added - diff]
tapeout/logs/pdks.info[Added - diff]
tapeout/logs/set_user_id.log[Added - diff]
tapeout/logs/ship_truck.log[Added - diff]
tapeout/logs/tools.info[Added - diff]
tapeout/logs/uncompress.log[Added - diff]
tapeout/outputs/gds/caravel_0005d159.gds.gz.00.split[Added - diff]
tapeout/outputs/gds/caravel_0005d159.gds.gz.01.split[Added - diff]
tapeout/outputs/gds/caravel_0005d159.gds.gz.02.split[Added - diff]
tapeout/outputs/gds/caravel_0005d159.gds.gz.03.split[Added - diff]
tapeout/outputs/gds/caravel_0005d159.gds.gz.04.split[Added - diff]
tapeout/outputs/gds/caravel_0005d159.gds.gz.05.split[Added - diff]
tapeout/outputs/klayout_beol_report.xml[Added - diff]
tapeout/outputs/klayout_feol_report.xml[Added - diff]
tapeout/outputs/klayout_fom_density_report.xml[Added - diff]
tapeout/outputs/klayout_met_density_report.xml[Added - diff]
tapeout/outputs/mag/.magicrc[Added - diff]
tapeout/outputs/mag/caravel.mag[Added - diff]
tapeout/outputs/mag/gpio_defaults_block_0403.mag[Added - diff]
tapeout/outputs/mag/gpio_defaults_block_1803.mag[Added - diff]
tapeout/outputs/mag/user_id_prog_zero.mag[Added - diff]
tapeout/outputs/mag/user_id_programming.mag[Added - diff]
tapeout/outputs/mag/user_id_textblock.mag[Added - diff]
tapeout/outputs/oas/caravel_0005d159.oas[Added - diff]
tapeout/outputs/verilog/gl/caravel.v[Added - diff]
tapeout/outputs/verilog/gl/gpio_defaults_block_0403.v[Added - diff]
tapeout/outputs/verilog/gl/gpio_defaults_block_1803.v[Added - diff]
tapeout/outputs/verilog/gl/user_id_programming.v[Added - diff]
tapeout/outputs/verilog/rtl/caravel.v[Added - diff]

86 files changed

tree: 7704bc1429f3066ada8e8f4d04d5b9c67c31f9a7

README.md

Amaranth+Coriolis Test SoC

This is a submission of a test SoC for MPW4 built from https://github.com/ChipFlow/mpw4

It contains:

Minerva RV32IM CPU
512 bytes SRAM
(Q)SPI flash for code and data memory using spimemio from picosoc
HyperRAM for RAM extension using a derivative of litehyperbus
8-bit GPIO
UART, timer, and interrupt controller

Built using:

Amaranth
Yosys+ABC
Coriolis for PnR; with PDKMaster and flexcell used in place of the standard sky130 cells.