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foss-eda-tools / third_party / shuttle / sky130 / mpw-005 / slot-024 / b063f479d16d3d5e67fbfad0d70fbea1e54bdf13
commitb063f479d16d3d5e67fbfad0d70fbea1e54bdf13[log] [tgz]
authorgatecat <gatecat@ds0.me>Fri Nov 05 18:16:35 2021 +0000
committergatecat <gatecat@ds0.me>Tue Dec 21 13:09:48 2021 +0000
tree6546bad6b79e10a471aa6d2e68f288ed7760d695
parent769fafe529654763697acd2bd83d54befbe2ed50 [diff]
Add README

Signed-off-by: gatecat <gatecat@ds0.me>
1 file changed
tree: 6546bad6b79e10a471aa6d2e68f288ed7760d695
  1. .github/
  2. docs/
  3. mag/
  4. maglef/
  5. signoff/
  6. caravel
  7. .gitignore
  8. .gitmodules
  9. LICENSE
  10. Makefile
  11. README.md
README.md

nMigen+Coriolis Test SoC

This is a submission of a test SoC for MPW4 built from https://github.com/ChipFlow/mpw4

It contains:

  • Minerva RV32IM CPU
  • 512 bytes SRAM
  • (Q)SPI flash for code and data memory using spimemio from picosoc
  • HyperRAM for RAM extension using a derivative of litehyperbus
  • 8-bit GPIO
  • UART, timer, and interrupt controller

Built using: