all-modules
diff --git a/gds/user_analog_project_wrapper.gds b/gds/user_analog_project_wrapper.gds index 6b601b7..73e05fd 100644 --- a/gds/user_analog_project_wrapper.gds +++ b/gds/user_analog_project_wrapper.gds Binary files differ
diff --git a/mag/ro_div_new.mag b/mag/ro_div_new.mag index 3ae48ef..e5c5365 100644 --- a/mag/ro_div_new.mag +++ b/mag/ro_div_new.mag
@@ -1,17 +1,19 @@ magic tech sky130A -timestamp 1641018634 +timestamp 1642812565 +<< locali >> +rect 4336 -19 4882 166 << metal2 >> rect 4055 585 4180 1635 rect 4595 665 5015 685 rect 4595 585 4640 665 rect 4055 530 4640 585 -use divider divider_0 -timestamp 1641018634 -transform 1 0 5185 0 1 235 -box -490 -235 4690 2150 use ro_complete ro_complete_0 -timestamp 1641018634 +timestamp 1642812565 transform 1 0 57 0 1 5330 box -57 -5330 4455 1440 +use divider divider_0 +timestamp 1642812565 +transform 1 0 5185 0 1 235 +box -490 -235 4690 2150 << end >>
diff --git a/mag/user_analog_project_wrapper.mag b/mag/user_analog_project_wrapper.mag index eaf7197..2cd68ab 100644 --- a/mag/user_analog_project_wrapper.mag +++ b/mag/user_analog_project_wrapper.mag
@@ -1,6 +1,6 @@ magic tech sky130A -timestamp 1642811703 +timestamp 1642812614 << metal2 >> rect 262 -400 318 240 rect 853 -400 909 240 @@ -704,30 +704,26 @@ timestamp 1640911461 transform 1 0 54462 0 1 195288 box -415 -1715 4690 2035 -use pd_div pd_div_0 -timestamp 1642811703 -transform 1 0 140853 0 1 195298 -box 0 0 31660 4135 use pll_full pll_full_0 timestamp 1642811007 transform 1 0 183060 0 1 147974 box -5415 -2690 26430 12835 -use ro_div ro_div_0 -timestamp 1642811703 -transform 1 0 221336 0 1 224042 -box 0 0 36355 6770 +use ro_div_new ro_div_new_0 +timestamp 1642812614 +transform 1 0 167071 0 1 205717 +box 0 -19 9875 6770 use pd pd_0 timestamp 1642811703 transform 1 0 103126 0 1 258815 box -215 -855 1685 810 -use divider divider_0 -timestamp 1642811703 -transform 1 0 166638 0 1 265093 -box -490 -235 4690 2150 use filter filter_0 timestamp 1640983258 transform 1 0 77692 0 1 317254 box -1800 -11005 6240 390 +use divider divider_0 +timestamp 1642812614 +transform 1 0 166638 0 1 265093 +box -490 -235 4690 2150 use divbuf divbuf_6 timestamp 1641017053 transform 1 0 245858 0 1 309157 @@ -740,6 +736,10 @@ timestamp 1641017053 transform 1 0 245938 0 1 311543 box -460 -1085 31200 495 +use ro_complete ro_complete_1 +timestamp 1642812614 +transform 1 0 247313 0 1 328719 +box -57 -5330 4455 1440 use divbuf divbuf_2 timestamp 1641017053 transform 1 0 246097 0 1 316394 @@ -760,10 +760,6 @@ timestamp 1641017053 transform 1 0 244347 0 1 337471 box -460 -1085 31200 495 -use ro_complete ro_complete_1 -timestamp 1642811703 -transform 1 0 247313 0 1 328719 -box -57 -5330 4455 1440 << labels >> flabel metal3 s 291760 134615 292400 134671 0 FreeSans 560 0 0 0 gpio_analog[0] port 0 nsew signal bidirectional
diff --git a/netgen/user_analog_project_wrapper.spice b/netgen/user_analog_project_wrapper.spice index e213f36..44f1e20 100644 --- a/netgen/user_analog_project_wrapper.spice +++ b/netgen/user_analog_project_wrapper.spice
@@ -106,1443 +106,1149 @@ + wbs_dat_o[30] wbs_dat_o[31] wbs_dat_o[3] wbs_dat_o[4] wbs_dat_o[5] wbs_dat_o[6] + wbs_dat_o[7] wbs_dat_o[8] wbs_dat_o[9] wbs_sel_i[0] wbs_sel_i[1] wbs_sel_i[2] wbs_sel_i[3] + wbs_stb_i wbs_we_i -C0 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/DIV 0.12fF -C1 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_1/Q 0.15fF -C2 divider_0/prescaler_0/tspc_2/Z2 divider_0/and_0/OUT 0.06fF -C3 ro_div_0/divider_0/prescaler_0/tspc_2/Z4 ro_div_0/divider_0/clk 0.12fF -C4 pd_div_0/divider_0/prescaler_0/tspc_2/Z4 pd_div_0/divider_0/prescaler_0/tspc_1/Q 0.21fF -C5 pd_div_0/divider_0/prescaler_0/tspc_2/Z1 pd_div_0/divider_0/prescaler_0/tspc_2/D 0.03fF -C6 pd_div_0/divider_0/prescaler_0/m1_2700_2190# pd_div_0/divider_0/clk 0.01fF -C7 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Z1 0.17fF -C8 divbuf_5/a_492_n240# divbuf_5/OUT 0.00fF -C9 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_0/Z3 0.38fF -C10 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/Z3 0.16fF -C11 ro_div_0/ro_complete_0/cbank_2/switch_1/vin ro_div_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF -C12 pll_full_0/divbuf_0/a_492_n240# pll_full_0/divbuf_0/OUT5 0.01fF -C13 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/a4 0.09fF -C14 divider_0/tspc_0/a_630_n680# divider_0/tspc_0/Z2 0.01fF -C15 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/tspc_2/D 0.32fF -C16 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/clk 0.01fF -C17 pd_div_0/pd_0/tspc_r_1/Qbar1 pd_div_0/pd_0/R 0.30fF -C18 ro_div_0/divider_0/prescaler_0/tspc_0/Z1 ro_div_0/divider_0/prescaler_0/tspc_0/D 0.15fF -C19 pd_0/tspc_r_0/Z3 pd_0/DOWN 0.03fF -C20 pd_div_0/divider_0/tspc_0/Q pd_div_0/divider_0/tspc_1/Z3 0.45fF -C21 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# 0.01fF -C22 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Q 0.20fF -C23 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/nor_1/A 1.21fF -C24 divbuf_6/OUT4 divbuf_6/OUT 1.11fF -C25 divider_0/prescaler_0/tspc_1/Z1 divider_0/prescaler_0/tspc_1/Z2 1.07fF -C26 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Z4 0.12fF -C27 divider_0/tspc_2/Z1 divider_0/tspc_2/Z4 0.00fF -C28 pd_div_0/pd_0/tspc_r_0/z5 pd_div_0/pd_0/tspc_r_1/z5 0.02fF -C29 ro_div_0/divider_0/nor_1/B ro_div_0/divider_0/nor_0/B 0.47fF -C30 ro_div_0/divider_0/tspc_0/a_630_n680# ro_div_0/divider_0/tspc_0/Z4 0.12fF -C31 ro_div_0/divider_0/prescaler_0/tspc_2/Z3 ro_div_0/divider_0/prescaler_0/tspc_2/Z4 0.65fF -C32 pd_div_0/divbuf_0/OUT3 pd_div_0/divbuf_0/OUT5 0.01fF -C33 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_1/switch_3/vin 0.09fF -C34 divbuf_3/OUT2 divbuf_3/OUT5 0.02fF -C35 pd_div_0/divider_0/prescaler_0/tspc_0/Z2 pd_div_0/divider_0/and_0/OUT 0.05fF -C36 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/a4 0.12fF -C37 ro_complete_0/a2 ro_complete_0/cbank_0/switch_3/vin 0.09fF -C38 ro_complete_0/cbank_1/switch_5/vin ro_complete_0/cbank_1/v 1.30fF -C39 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_1/Qbar 0.03fF -C40 divider_0/tspc_1/a_630_n680# divider_0/nor_0/B 0.00fF -C41 divider_0/tspc_0/a_630_n680# divider_0/nor_1/A 0.35fF -C42 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/Z4 0.08fF -C43 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z3 0.05fF -C44 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Q 0.04fF -C45 ro_div_0/divider_0/tspc_0/a_630_n680# ro_div_0/divider_0/nor_1/B 0.01fF -C46 ro_div_0/divider_0/prescaler_0/tspc_0/Z2 ro_div_0/divider_0/prescaler_0/tspc_0/Z4 0.36fF -C47 ro_div_0/divider_0/tspc_1/Z2 ro_div_0/divider_0/tspc_0/Q 0.14fF -C48 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Z3 0.65fF -C49 ro_div_0/ro_complete_0/a2 ro_div_0/ro_complete_0/cbank_2/switch_2/vin 0.14fF -C50 pd_div_0/divider_0/nor_1/A pd_div_0/divider_0/tspc_1/Z4 0.02fF -C51 pd_div_0/divider_0/nor_1/B pd_div_0/divider_0/tspc_2/Z2 0.20fF -C52 pd_div_0/divider_0/prescaler_0/tspc_0/a_630_n680# pd_div_0/divider_0/clk 0.01fF -C53 ro_div_0/ro_complete_0/a5 ro_div_0/divider_0/clk 0.10fF -C54 ro_div_0/ro_complete_0/cbank_0/switch_0/vin ro_div_0/ro_complete_0/a5 0.09fF -C55 ro_complete_0/cbank_1/switch_1/vin ro_complete_0/cbank_1/switch_2/vin 0.20fF -C56 pll_full_0/pd_0/REF pll_full_0/pd_0/DOWN 1.48fF -C57 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/Out 0.21fF -C58 divider_0/tspc_0/Q divider_0/tspc_1/a_630_n680# 0.01fF -C59 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_0/a_630_n680# 0.19fF -C60 divider_0/tspc_1/Q divider_0/tspc_2/Z3 0.45fF -C61 divider_0/prescaler_0/tspc_2/Z4 divider_0/prescaler_0/tspc_2/D 0.11fF -C62 divider_0/prescaler_0/tspc_1/Z1 divider_0/prescaler_0/Out 0.08fF -C63 pd_div_0/pd_0/tspc_r_1/Qbar1 pd_div_0/pd_0/tspc_r_1/Qbar 0.01fF -C64 ro_div_0/divider_0/prescaler_0/m1_2700_2190# ro_div_0/divider_0/prescaler_0/tspc_1/Z3 0.33fF -C65 pd_div_0/pd_0/tspc_r_0/Qbar1 pd_div_0/pd_0/R 0.01fF -C66 ro_div_0/divider_0/and_0/OUT ro_div_0/divider_0/and_0/Z1 0.04fF -C67 ro_div_0/divider_0/nor_0/B ro_div_0/divider_0/tspc_2/Z2 0.40fF -C68 ro_div_0/divider_0/tspc_2/a_630_n680# ro_div_0/divbuf_0/IN 0.04fF -C69 ro_div_0/divider_0/prescaler_0/tspc_0/Q ro_div_0/divider_0/clk 0.05fF -C70 pd_div_0/divider_0/prescaler_0/tspc_0/Z1 pd_div_0/divider_0/prescaler_0/tspc_0/Z2 1.07fF -C71 pd_div_0/divider_0/prescaler_0/tspc_0/a_630_n680# pd_div_0/divider_0/prescaler_0/tspc_0/Z4 0.12fF -C72 ro_div_0/ro_complete_0/a5 ro_div_0/ro_complete_0/cbank_2/v 0.08fF -C73 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/v 0.05fF -C74 pd_div_0/divider_0/tspc_0/a_630_n680# pd_div_0/divider_0/prescaler_0/Out 0.01fF -C75 pd_div_0/divider_0/prescaler_0/tspc_1/Q pd_div_0/divider_0/prescaler_0/tspc_0/Q 0.19fF -C76 pd_div_0/divider_0/prescaler_0/tspc_2/a_740_n680# pd_div_0/divider_0/clk 0.14fF -C77 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_1/Z2 0.30fF -C78 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF -C79 ro_complete_0/cbank_0/switch_5/vin ro_complete_0/a0 0.09fF -C80 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z2 1.07fF -C81 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_2/Z3 0.38fF -C82 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z4 0.12fF -C83 divbuf_6/a_492_n240# divbuf_6/IN 0.13fF -C84 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_1/Qbar1 0.30fF -C85 divider_0/tspc_0/Z4 divider_0/tspc_0/a_630_n680# 0.12fF -C86 pd_div_0/div pd_div_0/pd_0/R 0.51fF -C87 ro_div_0/divider_0/prescaler_0/m1_2700_2190# ro_div_0/divider_0/prescaler_0/nand_0/z1 0.07fF -C88 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/switch_0/vin 0.19fF -C89 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/v 1.30fF -C90 pd_div_0/divider_0/tspc_1/Z1 pd_div_0/divider_0/tspc_1/Z2 1.07fF -C91 pd_div_0/divider_0/nor_1/B pd_div_0/divider_0/tspc_1/Z3 0.38fF -C92 pd_div_0/divider_0/prescaler_0/m1_2700_2190# pd_div_0/divider_0/prescaler_0/tspc_1/Z4 0.08fF -C93 pd_div_0/divider_0/prescaler_0/tspc_1/a_630_n680# pd_div_0/divider_0/prescaler_0/tspc_1/Z3 0.05fF -C94 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/v 0.05fF -C95 divbuf_4/a_492_n240# divbuf_4/OUT2 0.42fF -C96 pd_div_0/divider_0/tspc_2/Z1 pd_div_0/divider_0/tspc_2/Z3 0.06fF -C97 pd_div_0/divider_0/nor_0/B pd_div_0/bufin 0.29fF -C98 pd_div_0/divider_0/prescaler_0/tspc_2/D pd_div_0/divider_0/clk 0.29fF -C99 pll_full_0/pd_0/tspc_r_0/Z2 pll_full_0/pd_0/tspc_r_0/Z1 0.71fF -C100 divider_0/mc2 divider_0/and_0/out1 0.06fF -C101 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Q 0.04fF -C102 divbuf_2/OUT5 divbuf_2/OUT 43.38fF -C103 ro_div_0/divider_0/tspc_1/Z1 ro_div_0/divider_0/tspc_0/Q 0.01fF -C104 ro_div_0/divider_0/prescaler_0/tspc_2/Z4 ro_div_0/divider_0/prescaler_0/tspc_1/Q 0.21fF -C105 ro_div_0/divider_0/prescaler_0/tspc_2/Z1 ro_div_0/divider_0/prescaler_0/tspc_2/D 0.03fF -C106 ro_div_0/divider_0/prescaler_0/m1_2700_2190# ro_div_0/divider_0/clk 0.01fF -C107 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/Z4 0.20fF -C108 pd_0/REF pd_0/tspc_r_1/z5 0.04fF -C109 pd_0/tspc_r_1/Z1 pd_0/tspc_r_1/Z2 0.71fF -C110 divbuf_3/OUT5 divbuf_3/OUT 43.38fF -C111 pd_div_0/divider_0/tspc_1/Z2 pd_div_0/divider_0/tspc_1/Z4 0.36fF -C112 pd_div_0/divider_0/prescaler_0/tspc_1/Z2 pd_div_0/divider_0/and_0/OUT 0.06fF -C113 pd_div_0/divider_0/prescaler_0/tspc_2/a_740_n680# pd_div_0/divider_0/prescaler_0/tspc_2/Z3 0.33fF -C114 pd_div_0/divider_0/prescaler_0/m1_2700_2190# pd_div_0/divider_0/prescaler_0/tspc_1/Q 0.38fF -C115 pll_full_0/divider_0/tspc_0/Q pll_full_0/divider_0/tspc_1/a_630_n680# 0.01fF -C116 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.19fF -C117 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/a3 0.13fF -C118 divbuf_4/OUT2 divbuf_4/OUT 0.06fF -C119 pd_div_0/divider_0/and_0/out1 pd_div_0/divider_0/and_0/Z1 0.36fF -C120 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/nor_0/B 0.22fF -C121 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/tspc_0/D 0.03fF -C122 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.09fF -C123 pll_full_0/pd_0/tspc_r_0/Z2 pll_full_0/pd_0/DIV 0.19fF -C124 divider_0/prescaler_0/tspc_0/Z2 divider_0/clk 0.11fF -C125 ro_div_0/divider_0/tspc_1/Z4 ro_div_0/divider_0/tspc_0/Q 0.15fF -C126 divbuf_3/OUT3 divbuf_3/OUT2 1.37fF -C127 pd_div_0/divider_0/tspc_1/Q pd_div_0/divider_0/tspc_2/Z1 0.01fF -C128 pd_div_0/divider_0/prescaler_0/tspc_2/Z3 pd_div_0/divider_0/prescaler_0/tspc_2/D 0.05fF -C129 pd_div_0/divider_0/prescaler_0/tspc_1/a_630_n680# pd_div_0/divider_0/clk 0.01fF -C130 pd_div_0/divider_0/nor_1/B pd_div_0/divider_0/and_0/A 0.26fF -C131 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_1/Z1 0.03fF -C132 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/tspc_0/a_630_n680# 0.12fF -C133 divbuf_5/IN divbuf_5/OUT5 0.00fF -C134 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/out1 0.31fF -C135 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/and_0/A 0.01fF -C136 ro_div_0/ro_complete_0/cbank_0/switch_5/vin ro_div_0/ro_complete_0/a0 0.09fF -C137 divider_0/tspc_1/a_630_n680# divider_0/nor_1/B 0.35fF -C138 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/Z4 0.36fF -C139 pd_div_0/pd_0/tspc_r_0/Z4 pd_div_0/pd_0/tspc_r_0/z5 0.04fF -C140 ro_div_0/divider_0/prescaler_0/tspc_0/Z3 ro_div_0/divider_0/prescaler_0/tspc_0/D 0.05fF -C141 pll_full_0/ro_complete_0/cbank_2/switch_0/vin pll_full_0/ro_complete_0/a4 0.12fF -C142 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF -C143 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/nand_1/z1 0.22fF -C144 divider_0/prescaler_0/tspc_0/Q divider_0/prescaler_0/tspc_2/D 0.04fF -C145 ro_complete_0/a4 ro_complete_0/cbank_1/v 0.05fF -C146 pd_div_0/pd_0/DOWN pd_div_0/pd_0/and_pd_0/Z1 0.07fF -C147 pd_0/DIV pd_0/tspc_r_0/Z2 0.19fF -C148 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/Z1 0.09fF -C149 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/v 0.05fF -C150 pll_full_0/ro_complete_0/cbank_2/switch_2/vin pll_full_0/ro_complete_0/cbank_2/switch_1/vin 0.20fF -C151 pll_full_0/pd_0/REF pll_full_0/pd_0/R 0.61fF -C152 pd_div_0/divider_0/nor_1/A pd_div_0/divider_0/and_0/B 0.08fF -C153 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/nor_1/A 0.01fF -C154 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/tspc_1/Z3 0.16fF -C155 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_1/Z4 0.21fF -C156 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.15fF -C157 ro_div_0/ro_complete_0/cbank_0/switch_1/vin ro_div_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF -C158 ro_complete_0/a0 ro_complete_0/cbank_2/switch_4/vin 0.13fF -C159 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/and_0/B 0.29fF -C160 pll_full_0/pd_0/tspc_r_0/Qbar pll_full_0/pd_0/DOWN 0.21fF -C161 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/tspc_1/Z3 0.16fF -C162 pd_div_0/pd_0/tspc_r_0/z5 pd_div_0/pd_0/tspc_r_0/Qbar1 0.20fF -C163 ro_div_0/divider_0/nor_1/B ro_div_0/divider_0/tspc_2/Z2 0.20fF -C164 ro_div_0/divider_0/tspc_1/a_630_n680# ro_div_0/divider_0/tspc_0/Q 0.01fF -C165 divider_0/tspc_2/Z3 divider_0/tspc_2/Z4 0.65fF -C166 ro_div_0/divbuf_0/OUT4 ro_div_0/divbuf_0/OUT5 20.26fF -C167 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.14fF -C168 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/a4 0.12fF -C169 pd_0/R pd_0/tspc_r_1/Qbar 0.03fF -C170 pd_div_0/divider_0/tspc_1/Z1 pd_div_0/divider_0/tspc_1/Z4 0.00fF -C171 pd_div_0/divider_0/prescaler_0/tspc_1/Z4 pd_div_0/divider_0/prescaler_0/tspc_2/a_740_n680# 0.01fF -C172 pd_div_0/divider_0/prescaler_0/tspc_0/a_740_n680# pd_div_0/divider_0/prescaler_0/tspc_0/Q 0.20fF -C173 pd_div_0/divider_0/prescaler_0/tspc_0/Z2 pd_div_0/divider_0/prescaler_0/tspc_0/D 0.09fF -C174 ro_complete_0/a2 ro_complete_0/cbank_2/switch_3/vin 0.09fF -C175 io_clamp_low[0] io_clamp_high[0] 0.53fF -C176 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.09fF -C177 pd_div_0/div pd_div_0/pd_0/tspc_r_0/z5 0.04fF -C178 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z2 1.07fF -C179 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z4 0.12fF -C180 ro_div_0/divider_0/nor_1/A ro_div_0/divider_0/prescaler_0/Out 0.15fF -C181 ro_div_0/divider_0/prescaler_0/tspc_1/Q ro_div_0/divider_0/prescaler_0/tspc_0/Q 0.19fF -C182 ro_div_0/divider_0/prescaler_0/tspc_2/a_740_n680# ro_div_0/divider_0/clk 0.14fF -C183 pll_full_0/pd_0/tspc_r_1/Qbar pll_full_0/pd_0/and_pd_0/Out1 0.05fF -C184 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/Z4 0.02fF -C185 ro_div_0/divbuf_0/OUT ro_div_0/divbuf_0/OUT5 43.38fF -C186 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.09fF -C187 pd_0/tspc_r_1/Qbar pd_0/and_pd_0/Out1 0.05fF -C188 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.06fF -C189 pd_div_0/divider_0/prescaler_0/tspc_2/a_740_n680# pd_div_0/divider_0/prescaler_0/tspc_1/Q 0.15fF -C190 pd_div_0/divider_0/prescaler_0/tspc_2/Z2 pd_div_0/divider_0/and_0/OUT 0.06fF -C191 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/Out 0.04fF -C192 pll_full_0/pd_0/REF pll_full_0/divbuf_1/OUT5 0.00fF -C193 ro_div_0/divider_0/tspc_1/Z1 ro_div_0/divider_0/tspc_1/Z2 1.07fF -C194 ro_div_0/divider_0/nor_1/B ro_div_0/divider_0/tspc_1/Z3 0.38fF -C195 ro_div_0/divider_0/prescaler_0/m1_2700_2190# ro_div_0/divider_0/prescaler_0/tspc_1/Z4 0.08fF -C196 ro_div_0/divider_0/prescaler_0/tspc_1/a_630_n680# ro_div_0/divider_0/prescaler_0/tspc_1/Z3 0.05fF -C197 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_0/switch_0/vin 0.09fF -C198 pll_full_0/pd_0/tspc_r_0/z5 pll_full_0/pd_0/DIV 0.04fF -C199 divider_0/tspc_1/Q divider_0/tspc_2/Z4 0.15fF -C200 divider_0/prescaler_0/tspc_1/Z3 divider_0/prescaler_0/Out 0.11fF -C201 divider_0/prescaler_0/tspc_1/Z2 divider_0/clk 0.11fF -C202 divbuf_1/a_492_n240# divbuf_1/IN 0.13fF -C203 pd_div_0/pd_0/tspc_r_0/Z3 pd_div_0/pd_0/R 0.27fF -C204 ro_div_0/divider_0/tspc_2/Z1 ro_div_0/divider_0/tspc_2/Z3 0.06fF -C205 ro_div_0/divider_0/nor_0/B ro_div_0/divbuf_0/IN 0.30fF -C206 ro_div_0/divider_0/prescaler_0/tspc_2/D ro_div_0/divider_0/clk 0.29fF -C207 pll_full_0/divbuf_1/OUT3 pll_full_0/divbuf_1/OUT4 5.16fF -C208 pll_full_0/ro_complete_0/cbank_1/switch_4/vin pll_full_0/ro_complete_0/cbank_1/switch_5/vin 0.20fF -C209 divbuf_3/OUT4 divbuf_3/OUT5 20.26fF -C210 divbuf_3/OUT3 divbuf_3/OUT 0.26fF -C211 divbuf_3/a_492_n240# divbuf_3/IN 0.13fF -C212 pd_div_0/divider_0/prescaler_0/tspc_0/Z2 pd_div_0/divider_0/prescaler_0/tspc_0/Z3 0.16fF -C213 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z3 0.06fF -C214 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_1/Q 0.51fF -C215 pll_full_0/ro_complete_0/a1 pll_full_0/divider_0/clk 0.11fF -C216 pd_div_0/divider_0/tspc_0/a_630_n680# pd_div_0/divider_0/tspc_0/Z2 0.01fF -C217 pd_div_0/divider_0/prescaler_0/tspc_1/Q pd_div_0/divider_0/prescaler_0/tspc_2/D 0.32fF -C218 pd_div_0/divider_0/prescaler_0/tspc_2/a_630_n680# pd_div_0/divider_0/clk 0.01fF -C219 pll_full_0/divider_0/tspc_2/Z2 pll_full_0/divider_0/tspc_2/Z3 0.16fF -C220 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_2/Z4 0.22fF -C221 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Z3 0.05fF -C222 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF -C223 ro_div_0/ro_complete_0/a0 ro_div_0/ro_complete_0/cbank_2/switch_4/vin 0.13fF -C224 ro_div_0/divider_0/tspc_1/Z2 ro_div_0/divider_0/tspc_1/Z4 0.36fF -C225 ro_div_0/divider_0/prescaler_0/tspc_1/Z2 ro_div_0/divider_0/and_0/OUT 0.06fF -C226 ro_div_0/divider_0/prescaler_0/tspc_2/a_740_n680# ro_div_0/divider_0/prescaler_0/tspc_2/Z3 0.33fF -C227 ro_div_0/divider_0/prescaler_0/m1_2700_2190# ro_div_0/divider_0/prescaler_0/tspc_1/Q 0.38fF -C228 ro_div_0/divider_0/and_0/out1 ro_div_0/divider_0/and_0/Z1 0.36fF -C229 ro_complete_0/a1 ro_complete_0/cbank_1/v 0.05fF -C230 pd_div_0/divider_0/prescaler_0/tspc_1/Z1 pd_div_0/divider_0/prescaler_0/tspc_1/Z2 1.07fF -C231 pd_div_0/divider_0/prescaler_0/tspc_1/a_630_n680# pd_div_0/divider_0/prescaler_0/tspc_1/Z4 0.12fF -C232 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/cbank_0/switch_1/vin 0.19fF -C233 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/tspc_1/Z4 0.65fF -C234 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z2 0.01fF -C235 pd_div_0/divider_0/tspc_2/Z1 pd_div_0/divider_0/tspc_2/Z4 0.00fF -C236 io_clamp_high[2] io_analog[6] 0.53fF -C237 ro_div_0/divider_0/tspc_1/Q ro_div_0/divider_0/tspc_2/Z1 0.01fF -C238 ro_div_0/divider_0/prescaler_0/tspc_2/Z3 ro_div_0/divider_0/prescaler_0/tspc_2/D 0.05fF -C239 ro_div_0/divider_0/prescaler_0/tspc_1/a_630_n680# ro_div_0/divider_0/clk 0.01fF -C240 ro_div_0/divider_0/nor_1/B ro_div_0/divider_0/and_0/A 0.26fF -C241 divider_0/prescaler_0/Out divider_0/clk 0.51fF -C242 pll_full_0/ro_complete_0/cbank_0/switch_2/vin pll_full_0/ro_complete_0/a3 0.09fF -C243 cp_0/upbar cp_0/down 0.02fF -C244 pd_0/R pd_0/and_pd_0/Z1 0.02fF -C245 pd_0/tspc_r_1/Qbar1 pd_0/tspc_r_1/z5 0.20fF -C246 divbuf_2/OUT2 divbuf_2/OUT3 1.37fF -C247 pd_div_0/divider_0/tspc_1/a_630_n680# pd_div_0/divider_0/nor_0/B 0.00fF -C248 pd_div_0/divider_0/tspc_0/a_630_n680# pd_div_0/divider_0/nor_1/A 0.35fF -C249 pd_div_0/divider_0/prescaler_0/tspc_2/a_740_n680# pd_div_0/divider_0/prescaler_0/tspc_2/Z4 0.08fF -C250 pd_div_0/divider_0/prescaler_0/tspc_2/a_630_n680# pd_div_0/divider_0/prescaler_0/tspc_2/Z3 0.05fF -C251 pd_div_0/divider_0/prescaler_0/tspc_1/a_630_n680# pd_div_0/divider_0/prescaler_0/tspc_1/Q 0.04fF -C252 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/and_0/B 0.31fF -C253 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_2/Z2 0.14fF -C254 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/nand_0/z1 0.01fF -C255 ro_div_0/ro_complete_0/a3 ro_div_0/ro_complete_0/cbank_1/switch_2/vin 0.09fF -C256 ro_complete_0/cbank_2/switch_0/vin ro_complete_0/cbank_2/v 1.44fF -C257 pd_div_0/pd_0/UP pd_div_0/pd_0/tspc_r_1/z5 0.03fF -C258 ro_div_0/divider_0/tspc_1/a_630_n680# ro_div_0/divider_0/tspc_1/Z2 0.01fF -C259 pd_div_0/divider_0/tspc_0/Q pd_div_0/divider_0/tspc_1/a_630_n680# 0.01fF -C260 pd_div_0/divider_0/prescaler_0/tspc_0/a_740_n680# pd_div_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.19fF -C261 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF -C262 pll_full_0/ro_complete_0/cbank_0/switch_5/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF -C263 pd_0/and_pd_0/Out1 pd_0/and_pd_0/Z1 0.18fF -C264 divbuf_2/OUT2 divbuf_2/a_492_n240# 0.42fF -C265 pd_div_0/divider_0/tspc_1/Q pd_div_0/divider_0/tspc_2/Z3 0.45fF -C266 pd_div_0/divider_0/prescaler_0/tspc_2/Z4 pd_div_0/divider_0/prescaler_0/tspc_2/D 0.11fF -C267 pd_div_0/divider_0/prescaler_0/tspc_1/Z1 pd_div_0/divider_0/prescaler_0/Out 0.08fF -C268 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/clk 0.05fF -C269 divbuf_5/OUT3 divbuf_5/OUT5 0.01fF -C270 divbuf_5/OUT2 divbuf_5/OUT 0.06fF -C271 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/tspc_r_0/z5 0.20fF -C272 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/ro_complete_0/cbank_1/switch_0/vin 0.19fF -C273 divider_0/prescaler_0/tspc_0/Q divider_0/prescaler_0/nand_1/z1 0.01fF -C274 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/Out 0.05fF -C275 divider_0/prescaler_0/tspc_2/Z2 divider_0/clk 0.11fF -C276 ro_div_0/divider_0/tspc_1/Z1 ro_div_0/divider_0/tspc_1/Z4 0.00fF -C277 ro_div_0/divider_0/tspc_0/Z1 ro_div_0/divider_0/nor_1/A 0.03fF -C278 ro_div_0/divider_0/prescaler_0/tspc_1/Z4 ro_div_0/divider_0/prescaler_0/tspc_2/a_740_n680# 0.01fF -C279 ro_div_0/divider_0/prescaler_0/tspc_0/Z4 ro_div_0/divider_0/prescaler_0/tspc_0/D 0.11fF -C280 pd_0/DIV pd_0/R 0.51fF -C281 divbuf_3/a_492_n240# divbuf_3/OUT5 0.01fF -C282 pd_div_0/divider_0/tspc_0/Z4 pd_div_0/divider_0/tspc_0/a_630_n680# 0.12fF -C283 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/tspc_1/Q 0.05fF -C284 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.05fF -C285 ro_div_0/ro_complete_0/cbank_2/switch_0/vin ro_div_0/ro_complete_0/cbank_2/v 1.44fF -C286 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/tspc_1/Z4 0.36fF -C287 divider_0/mc2 divider_0/nor_0/B 0.15fF -C288 pd_div_0/pd_0/tspc_r_0/z5 pd_div_0/pd_0/tspc_r_0/Z3 0.11fF -C289 ro_div_0/divider_0/tspc_0/Z3 ro_div_0/divider_0/prescaler_0/Out 0.45fF -C290 ro_div_0/divider_0/prescaler_0/tspc_2/a_740_n680# ro_div_0/divider_0/prescaler_0/tspc_1/Q 0.15fF -C291 ro_div_0/divider_0/prescaler_0/tspc_2/Z2 ro_div_0/divider_0/and_0/OUT 0.06fF -C292 ro_div_0/divider_0/prescaler_0/tspc_0/Z3 ro_div_0/divider_0/clk 0.45fF -C293 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/v 1.30fF -C294 divbuf_3/OUT3 divbuf_3/OUT4 5.16fF -C295 pd_0/REF pd_0/tspc_r_1/Qbar1 0.12fF -C296 divbuf_2/OUT4 divbuf_2/OUT3 5.16fF -C297 pd_div_0/divider_0/prescaler_0/tspc_0/a_630_n680# pd_div_0/divider_0/prescaler_0/tspc_0/Q 0.04fF -C298 ro_complete_0/a2 ro_complete_0/cbank_0/switch_2/vin 0.14fF -C299 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/a4 0.09fF -C300 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/a5 0.09fF -C301 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_2/Z4 0.02fF -C302 pd_div_0/pd_0/tspc_r_0/Z2 pd_div_0/pd_0/tspc_r_0/Z4 0.14fF -C303 pll_full_0/cp_0/upbar pll_full_0/cp_0/down 0.02fF -C304 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/tspc_1/Q 0.06fF -C305 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/Z3 0.16fF -C306 ro_div_0/divider_0/nor_1/A ro_div_0/divider_0/tspc_0/Q 0.55fF -C307 ro_div_0/divider_0/prescaler_0/tspc_1/Q ro_div_0/divider_0/prescaler_0/tspc_2/D 0.32fF -C308 ro_div_0/divider_0/prescaler_0/tspc_2/a_630_n680# ro_div_0/divider_0/clk 0.01fF -C309 pll_full_0/divbuf_1/a_492_n240# pll_full_0/divbuf_1/OUT5 0.01fF -C310 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/a1 0.14fF -C311 pd_div_0/divider_0/prescaler_0/tspc_0/Z2 pd_div_0/divider_0/clk 0.11fF -C312 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.00fF -C313 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/tspc_0/Z3 0.05fF -C314 pd_div_0/pd_0/tspc_r_1/Qbar1 pd_div_0/pd_0/UP 0.11fF -C315 pd_div_0/pd_0/REF pd_div_0/pd_0/tspc_r_1/Z1 0.17fF -C316 ro_complete_0/cbank_2/switch_5/vin ro_complete_0/cbank_2/v 1.30fF -C317 divider_0/nor_1/Z1 divider_0/nor_1/B 0.06fF -C318 ro_div_0/divider_0/tspc_1/a_630_n680# ro_div_0/divider_0/tspc_1/Z4 0.12fF -C319 ro_div_0/divider_0/prescaler_0/tspc_1/Z1 ro_div_0/divider_0/prescaler_0/tspc_1/Z2 1.07fF -C320 ro_div_0/divider_0/prescaler_0/tspc_1/a_630_n680# ro_div_0/divider_0/prescaler_0/tspc_1/Z4 0.12fF -C321 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/cbank_0/switch_0/vin 0.19fF -C322 divider_0/prescaler_0/tspc_1/Z4 divider_0/prescaler_0/Out 0.28fF -C323 ro_div_0/divider_0/tspc_2/Z1 ro_div_0/divider_0/tspc_2/Z4 0.00fF -C324 pd_div_0/divider_0/tspc_1/a_630_n680# pd_div_0/divider_0/nor_1/B 0.35fF -C325 pd_div_0/divider_0/prescaler_0/tspc_0/Z2 pd_div_0/divider_0/prescaler_0/tspc_0/Z4 0.36fF -C326 pll_full_0/divbuf_1/OUT4 pll_full_0/divbuf_1/OUT5 20.26fF -C327 pd_div_0/divider_0/prescaler_0/tspc_1/Q pd_div_0/divider_0/prescaler_0/nand_1/z1 0.22fF -C328 pd_div_0/divider_0/prescaler_0/tspc_0/Q pd_div_0/divider_0/prescaler_0/tspc_2/D 0.04fF -C329 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_0/a_630_n680# 0.01fF -C330 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.06fF -C331 pll_full_0/divider_0/tspc_2/Z2 pll_full_0/divider_0/tspc_2/Z4 0.36fF -C332 pll_full_0/divider_0/tspc_2/Z3 pll_full_0/divbuf_0/IN 0.05fF -C333 divbuf_6/a_492_n240# divbuf_6/OUT5 0.01fF -C334 pd_div_0/div pd_div_0/pd_0/tspc_r_0/Z2 0.19fF -C335 ro_div_0/divider_0/nor_1/A ro_div_0/divider_0/tspc_0/Z2 0.23fF -C336 ro_div_0/divider_0/prescaler_0/tspc_2/a_740_n680# ro_div_0/divider_0/prescaler_0/tspc_2/Z4 0.08fF -C337 ro_div_0/divider_0/prescaler_0/tspc_2/a_630_n680# ro_div_0/divider_0/prescaler_0/tspc_2/Z3 0.05fF -C338 ro_div_0/divider_0/prescaler_0/tspc_1/a_630_n680# ro_div_0/divider_0/prescaler_0/tspc_1/Q 0.04fF -C339 ro_div_0/ro_complete_0/cbank_1/switch_5/vin ro_div_0/divider_0/clk 1.30fF -C340 pll_full_0/pd_0/tspc_r_1/Z4 pll_full_0/pd_0/tspc_r_0/Z4 0.02fF -C341 divider_0/and_0/OUT divider_0/and_0/B 0.01fF -C342 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/Out 0.91fF -C343 pll_full_0/divbuf_1/OUT pll_full_0/divbuf_1/a_492_n240# 0.00fF -C344 pll_full_0/divbuf_0/OUT2 pll_full_0/divbuf_0/OUT3 1.37fF -C345 pd_0/DOWN pd_0/UP 0.46fF -C346 pd_0/tspc_r_0/Z4 pd_0/tspc_r_0/z5 0.04fF -C347 pd_div_0/divider_0/prescaler_0/tspc_1/Z2 pd_div_0/divider_0/prescaler_0/tspc_1/Z3 0.16fF -C348 pll_full_0/ro_complete_0/cbank_2/switch_2/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF -C349 pd_div_0/divider_0/tspc_2/Z3 pd_div_0/divider_0/tspc_2/Z4 0.65fF -C350 pll_full_0/divider_0/and_0/A pll_full_0/divider_0/and_0/B 0.18fF -C351 ro_div_0/divider_0/prescaler_0/tspc_0/a_630_n680# ro_div_0/divider_0/prescaler_0/tspc_0/Z2 0.01fF -C352 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF -C353 ro_div_0/divider_0/tspc_1/Q ro_div_0/divider_0/tspc_2/Z3 0.45fF -C354 ro_div_0/divider_0/prescaler_0/tspc_2/Z4 ro_div_0/divider_0/prescaler_0/tspc_2/D 0.11fF -C355 ro_div_0/divider_0/prescaler_0/tspc_1/Z1 ro_div_0/divider_0/prescaler_0/Out 0.08fF -C356 io_clamp_low[1] io_analog[5] 0.53fF -C357 divider_0/prescaler_0/Out divider_0/tspc_0/Z3 0.45fF -C358 pll_full_0/divbuf_1/OUT pll_full_0/divbuf_1/OUT4 1.11fF -C359 pll_full_0/divbuf_1/a_492_n240# pll_full_0/divbuf_1/OUT2 0.42fF -C360 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/OUT4 1.11fF -C361 divbuf_7/OUT3 divbuf_7/OUT5 0.01fF -C362 pd_div_0/divider_0/prescaler_0/tspc_2/Z1 pd_div_0/divider_0/prescaler_0/tspc_2/Z2 1.07fF -C363 pd_div_0/divider_0/prescaler_0/tspc_2/a_630_n680# pd_div_0/divider_0/prescaler_0/tspc_2/Z4 0.12fF -C364 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/nor_1/B 0.06fF -C365 ro_div_0/ro_complete_0/cbank_0/switch_3/vin ro_div_0/ro_complete_0/a2 0.09fF -C366 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/cbank_0/v 1.30fF -C367 pll_full_0/divider_0/prescaler_0/tspc_0/D pll_full_0/divider_0/prescaler_0/nand_0/z1 0.24fF -C368 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/Out 0.19fF -C369 divider_0/mc2 divider_0/nor_1/B 0.06fF -C370 ro_div_0/ro_complete_0/a3 ro_div_0/ro_complete_0/cbank_2/switch_1/vin 0.13fF -C371 divbuf_1/OUT divbuf_1/a_492_n240# 0.00fF -C372 ro_div_0/divider_0/tspc_1/a_630_n680# ro_div_0/divider_0/tspc_1/Q 0.04fF -C373 ro_div_0/divider_0/tspc_0/Z3 ro_div_0/divider_0/tspc_0/Z1 0.06fF -C374 pll_full_0/pd_0/tspc_r_0/Z2 pll_full_0/pd_0/tspc_r_0/Z4 0.14fF -C375 divider_0/tspc_0/Z1 divider_0/tspc_0/Z3 0.06fF -C376 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_1/Q 0.06fF -C377 filter_0/a_4216_n2998# filter_0/v 0.31fF -C378 divbuf_7/OUT5 divbuf_7/a_492_n240# 0.01fF -C379 pd_div_0/divider_0/tspc_1/Q pd_div_0/divider_0/tspc_2/Z4 0.15fF -C380 pd_div_0/divider_0/prescaler_0/tspc_1/Z3 pd_div_0/divider_0/prescaler_0/Out 0.11fF -C381 pd_div_0/divider_0/prescaler_0/tspc_1/Z2 pd_div_0/divider_0/clk 0.11fF -C382 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/tspc_1/Z2 0.01fF -C383 pll_full_0/ro_complete_0/cbank_1/switch_0/vin pll_full_0/divider_0/clk 1.61fF -C384 ro_div_0/ro_complete_0/cbank_2/switch_3/vin ro_div_0/ro_complete_0/a2 0.09fF -C385 divbuf_5/OUT4 divbuf_5/OUT 1.11fF -C386 pll_full_0/divider_0/prescaler_0/tspc_0/D pll_full_0/divider_0/clk 0.26fF -C387 pd_div_0/pd_0/tspc_r_1/Z1 pd_div_0/pd_0/tspc_r_1/Z2 0.71fF -C388 ro_div_0/divider_0/tspc_1/Z2 ro_div_0/divider_0/nor_1/A 0.15fF -C389 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/switch_4/vin 0.20fF -C390 divider_0/prescaler_0/tspc_2/D divider_0/prescaler_0/nand_1/z1 0.21fF -C391 ro_div_0/ro_complete_0/a4 ro_div_0/ro_complete_0/cbank_2/switch_0/vin 0.12fF -C392 ro_complete_0/a5 ro_complete_0/cbank_1/v 0.10fF -C393 ro_div_0/divbuf_0/a_492_n240# ro_div_0/divbuf_0/IN 0.13fF -C394 ro_div_0/ro_complete_0/cbank_1/switch_0/vin ro_div_0/divider_0/clk 1.45fF -C395 pd_0/tspc_r_0/Qbar1 pd_0/R 0.01fF -C396 pd_0/DIV pd_0/tspc_r_0/Z4 0.02fF -C397 pd_0/DOWN pd_0/tspc_r_0/Qbar 0.21fF -C398 pll_full_0/ro_complete_0/a1 pll_full_0/ro_complete_0/cbank_2/v 0.05fF -C399 divbuf_1/IN divbuf_1/OUT5 0.00fF -C400 pd_div_0/divider_0/tspc_1/a_630_n680# pd_div_0/divider_0/tspc_1/Z3 0.05fF -C401 pd_div_0/divider_0/prescaler_0/m1_2700_2190# pd_div_0/divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF -C402 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.11fF -C403 pd_div_0/pd_0/tspc_r_0/Z1 pd_div_0/pd_0/tspc_r_0/Z2 0.71fF -C404 ro_div_0/ro_complete_0/a0 ro_div_0/ro_complete_0/cbank_2/switch_5/vin 0.09fF -C405 ro_div_0/divider_0/tspc_0/Z3 ro_div_0/divider_0/tspc_0/Q 0.05fF -C406 ro_div_0/divider_0/prescaler_0/tspc_0/Z4 ro_div_0/divider_0/clk 0.12fF -C407 pd_div_0/divider_0/nor_0/Z1 pd_div_0/divider_0/and_0/B 0.78fF -C408 pd_div_0/pd_0/R pd_div_0/pd_0/and_pd_0/Z1 0.02fF -C409 ro_div_0/divbuf_0/OUT2 ro_div_0/divbuf_0/OUT5 0.02fF -C410 ro_div_0/ro_complete_0/cbank_0/switch_4/vin ro_div_0/ro_complete_0/a0 0.13fF -C411 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/divider_0/clk 1.46fF -C412 pd_0/tspc_r_1/Z3 pd_0/UP 0.03fF -C413 pd_div_0/divider_0/prescaler_0/Out pd_div_0/divider_0/clk 0.51fF -C414 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/clk 0.45fF -C415 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/Z4 0.36fF -C416 divider_0/nor_1/Z1 divider_0/and_0/A 0.80fF -C417 ro_div_0/divider_0/prescaler_0/tspc_1/Q ro_div_0/divider_0/prescaler_0/nand_1/z1 0.22fF -C418 ro_div_0/divider_0/prescaler_0/tspc_0/Q ro_div_0/divider_0/prescaler_0/tspc_2/D 0.04fF -C419 pd_div_0/divider_0/mc2 pd_div_0/divider_0/nor_1/A 0.04fF -C420 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/a0 0.13fF -C421 ro_div_0/divider_0/nor_0/Z1 ro_div_0/divider_0/and_0/B 0.78fF -C422 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.65fF -C423 divbuf_4/OUT3 divbuf_4/OUT5 0.01fF -C424 ro_complete_0/cbank_1/switch_1/vin ro_complete_0/cbank_1/switch_0/vin 0.19fF -C425 divbuf_5/a_492_n240# divbuf_5/IN 0.13fF -C426 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Z2 0.01fF -C427 pll_full_0/pd_0/tspc_r_0/z5 pll_full_0/pd_0/tspc_r_0/Z4 0.04fF -C428 pd_div_0/pd_0/tspc_r_0/Z2 pd_div_0/pd_0/tspc_r_0/Z3 0.25fF -C429 ro_div_0/divider_0/nor_1/Z1 ro_div_0/divider_0/and_0/B 0.18fF -C430 ro_div_0/divider_0/tspc_0/Z3 ro_div_0/divider_0/tspc_0/Z2 0.16fF -C431 ro_div_0/divider_0/prescaler_0/tspc_1/Z2 ro_div_0/divider_0/prescaler_0/tspc_1/Z3 0.16fF -C432 ro_div_0/ro_complete_0/cbank_1/switch_2/vin ro_div_0/divider_0/clk 1.30fF -C433 pd_div_0/pd_0/DOWN pd_div_0/pd_0/R 0.36fF -C434 ro_div_0/divider_0/tspc_2/Z3 ro_div_0/divider_0/tspc_2/Z4 0.65fF -C435 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/v 1.30fF -C436 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/tspc_1/Z4 0.12fF -C437 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.00fF -C438 pll_full_0/ro_complete_0/cbank_0/v pll_full_0/divider_0/clk 1.27fF -C439 pd_div_0/divider_0/prescaler_0/tspc_0/Q pd_div_0/divider_0/prescaler_0/nand_1/z1 0.01fF -C440 pd_div_0/divider_0/prescaler_0/tspc_2/Z3 pd_div_0/divider_0/prescaler_0/Out 0.05fF -C441 pd_div_0/divider_0/prescaler_0/tspc_2/Z2 pd_div_0/divider_0/clk 0.11fF -C442 divbuf_6/OUT2 divbuf_6/OUT3 1.37fF -C443 divider_0/tspc_0/Q divider_0/nor_1/A 0.55fF -C444 pll_full_0/pd_0/UP pll_full_0/pd_0/and_pd_0/Z1 0.06fF -C445 divider_0/nor_0/B divider_0/tspc_2/Z1 0.03fF -C446 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z3 0.05fF -C447 ro_div_0/divider_0/nor_1/A ro_div_0/divider_0/tspc_1/Z4 0.02fF -C448 ro_div_0/divider_0/prescaler_0/tspc_2/Z1 ro_div_0/divider_0/prescaler_0/tspc_2/Z2 1.07fF -C449 ro_div_0/divider_0/prescaler_0/tspc_2/a_630_n680# ro_div_0/divider_0/prescaler_0/tspc_2/Z4 0.12fF -C450 pd_div_0/pd_0/tspc_r_1/Qbar pd_div_0/pd_0/and_pd_0/Z1 0.02fF -C451 ro_complete_0/cbank_0/v ro_complete_0/cbank_1/v 1.27fF -C452 pll_full_0/divbuf_0/OUT2 pll_full_0/divbuf_0/OUT5 0.02fF -C453 cp_0/a_1710_0# cp_0/a_1710_n2840# 0.83fF -C454 pd_0/R pd_0/REF 0.61fF -C455 pd_div_0/divider_0/prescaler_0/tspc_1/Z2 pd_div_0/divider_0/prescaler_0/tspc_1/Z4 0.36fF -C456 pll_full_0/ro_complete_0/cbank_2/switch_4/vin pll_full_0/ro_complete_0/cbank_2/switch_5/vin 0.20fF -C457 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.06fF -C458 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/and_0/A 0.80fF -C459 divider_0/mc2 divider_0/and_0/A 0.16fF -C460 divider_0/and_0/out1 divider_0/and_0/B 0.18fF -C461 divider_0/tspc_0/Z2 divider_0/tspc_0/Z3 0.16fF -C462 ro_div_0/divider_0/tspc_1/Q ro_div_0/divider_0/tspc_2/Z4 0.15fF -C463 ro_div_0/divider_0/prescaler_0/tspc_1/Z3 ro_div_0/divider_0/prescaler_0/Out 0.11fF -C464 ro_div_0/divider_0/prescaler_0/tspc_1/Z2 ro_div_0/divider_0/clk 0.11fF -C465 divbuf_7/OUT4 divbuf_7/OUT 1.11fF -C466 ro_div_0/ro_complete_0/a5 ro_div_0/ro_complete_0/cbank_2/switch_0/vin 0.09fF -C467 pd_div_0/divider_0/prescaler_0/tspc_1/Z2 pd_div_0/divider_0/prescaler_0/tspc_1/Q 0.06fF -C468 pd_div_0/divider_0/prescaler_0/tspc_2/Z2 pd_div_0/divider_0/prescaler_0/tspc_2/Z3 0.16fF -C469 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/tspc_0/Q 0.04fF -C470 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/divider_0/clk 0.45fF -C471 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Z4 0.02fF -C472 pll_full_0/pd_0/tspc_r_0/Qbar pll_full_0/pd_0/tspc_r_0/Qbar1 0.01fF -C473 pll_full_0/divbuf_0/a_492_n240# pll_full_0/divbuf_0/OUT2 0.42fF -C474 divider_0/nor_1/A divider_0/prescaler_0/tspc_1/Q 0.03fF -C475 divider_0/tspc_1/Q divider_0/tspc_2/a_630_n680# 0.01fF -C476 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/Out 0.11fF -C477 ro_div_0/divider_0/prescaler_0/m1_2700_2190# ro_div_0/divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF -C478 pd_div_0/pd_0/DOWN pd_div_0/pd_0/tspc_r_1/Qbar 0.02fF -C479 pd_div_0/divider_0/nor_1/Z1 pd_div_0/divider_0/nor_1/B 0.06fF -C480 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/switch_4/vin 0.20fF -C481 divbuf_7/OUT3 divbuf_7/OUT2 1.37fF -C482 pd_div_0/divider_0/prescaler_0/tspc_1/Z4 pd_div_0/divider_0/prescaler_0/Out 0.28fF -C483 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/tspc_1/Q 0.04fF -C484 pll_full_0/divider_0/tspc_0/Q pll_full_0/divider_0/nor_1/A 0.55fF -C485 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/nor_0/B 0.35fF -C486 divider_0/tspc_0/Q divider_0/tspc_1/Z2 0.14fF -C487 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/a3 0.13fF -C488 divider_0/nor_1/A divider_0/tspc_0/Z3 0.38fF -C489 ro_div_0/divider_0/prescaler_0/tspc_0/Z3 ro_div_0/divider_0/prescaler_0/tspc_0/Q 0.05fF -C490 ro_div_0/ro_complete_0/a0 ro_div_0/divider_0/clk 0.05fF -C491 divbuf_0/OUT2 divbuf_0/a_492_n240# 0.42fF -C492 ro_complete_0/a2 ro_complete_0/cbank_2/v 0.05fF -C493 ro_div_0/divider_0/prescaler_0/Out ro_div_0/divider_0/clk 0.51fF -C494 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/z5 0.11fF -C495 pd_div_0/divider_0/and_0/OUT pd_div_0/divider_0/and_0/B 0.01fF -C496 pd_div_0/divider_0/prescaler_0/tspc_1/Q pd_div_0/divider_0/prescaler_0/Out 0.91fF -C497 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/and_0/OUT 0.14fF -C498 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/and_0/B 0.78fF -C499 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_0/Z2 0.11fF -C500 divbuf_7/a_492_n240# divbuf_7/OUT2 0.42fF -C501 ro_div_0/ro_complete_0/a0 ro_div_0/ro_complete_0/cbank_2/v 0.05fF -C502 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/tspc_2/a_740_n680# 0.01fF -C503 divider_0/nor_1/B divider_0/nor_1/A 1.21fF -C504 pll_full_0/pd_0/DOWN pll_full_0/pd_0/and_pd_0/Z1 0.07fF -C505 pd_div_0/pd_0/tspc_r_0/z5 pd_div_0/pd_0/DOWN 0.03fF -C506 ro_div_0/ro_complete_0/cbank_2/switch_3/vin ro_div_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF -C507 ro_div_0/ro_complete_0/cbank_1/switch_3/vin ro_div_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF -C508 pd_0/REF pd_0/tspc_r_1/Z2 0.19fF -C509 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/Z1 0.09fF -C510 pd_div_0/divider_0/prescaler_0/tspc_2/a_740_n680# pd_div_0/divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF -C511 pd_div_0/divider_0/prescaler_0/Out pd_div_0/divider_0/tspc_0/Z3 0.45fF -C512 pll_full_0/divider_0/tspc_0/Z1 pll_full_0/divider_0/tspc_0/Z2 1.07fF -C513 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_0/divider_0/clk 0.12fF -C514 divider_0/mc2 divider_0/prescaler_0/tspc_0/a_630_n680# 0.33fF -C515 pll_full_0/pd_0/UP pll_full_0/pd_0/tspc_r_1/z5 0.03fF -C516 divider_0/tspc_0/Z4 divider_0/tspc_0/Z3 0.65fF -C517 ro_div_0/divider_0/nor_1/A ro_div_0/divider_0/and_0/B 0.08fF -C518 ro_div_0/divider_0/prescaler_0/tspc_0/Q ro_div_0/divider_0/prescaler_0/nand_1/z1 0.01fF -C519 ro_div_0/divider_0/prescaler_0/tspc_2/Z3 ro_div_0/divider_0/prescaler_0/Out 0.05fF -C520 ro_div_0/divider_0/prescaler_0/tspc_2/Z2 ro_div_0/divider_0/clk 0.11fF -C521 pd_div_0/divider_0/tspc_0/Z1 pd_div_0/divider_0/tspc_0/Z3 0.06fF -C522 pd_div_0/divider_0/prescaler_0/tspc_2/Z2 pd_div_0/divider_0/prescaler_0/tspc_1/Q 0.06fF -C523 pll_full_0/divider_0/tspc_0/Q pll_full_0/divider_0/tspc_1/Z2 0.14fF -C524 pll_full_0/divbuf_0/OUT5 pll_full_0/divbuf_0/IN 0.00fF -C525 ro_complete_0/a3 ro_complete_0/cbank_1/switch_2/vin 0.09fF -C526 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/prescaler_0/Out 0.15fF -C527 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/clk 0.64fF -C528 ro_div_0/ro_complete_0/a3 ro_div_0/ro_complete_0/cbank_2/switch_2/vin 0.09fF -C529 divider_0/tspc_0/Q divider_0/tspc_1/Z1 0.01fF -C530 ro_div_0/divider_0/prescaler_0/tspc_1/Z2 ro_div_0/divider_0/prescaler_0/tspc_1/Z4 0.36fF -C531 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/pd_0/tspc_r_1/Qbar 0.01fF -C532 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/Out 0.21fF -C533 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/OUT3 0.26fF -C534 divbuf_1/OUT divbuf_1/OUT5 43.38fF -C535 pd_0/DIV pd_0/tspc_r_0/Z3 0.65fF -C536 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_1/switch_5/vin 0.09fF -C537 divbuf_4/OUT3 divbuf_4/OUT2 1.37fF -C538 pd_div_0/divider_0/prescaler_0/tspc_2/D pd_div_0/divider_0/prescaler_0/nand_1/z1 0.21fF -C539 pll_full_0/divider_0/tspc_0/Z1 pll_full_0/divider_0/nor_1/A 0.03fF -C540 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.65fF -C541 divbuf_6/OUT2 divbuf_6/OUT5 0.02fF -C542 divbuf_6/OUT3 divbuf_6/OUT4 5.16fF -C543 pd_div_0/div pd_div_0/divbuf_0/OUT2 0.06fF -C544 ro_div_0/ro_complete_0/cbank_2/switch_1/vin ro_div_0/ro_complete_0/cbank_2/v 1.30fF -C545 divider_0/tspc_0/Q divider_0/tspc_1/Z4 0.15fF -C546 divider_0/nor_1/B divider_0/tspc_1/Z2 0.30fF -C547 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Z2 0.01fF -C548 ro_div_0/divider_0/tspc_0/a_630_n680# ro_div_0/divider_0/prescaler_0/Out 0.01fF -C549 ro_div_0/divider_0/prescaler_0/tspc_1/Z2 ro_div_0/divider_0/prescaler_0/tspc_1/Q 0.06fF -C550 ro_div_0/divider_0/prescaler_0/tspc_2/Z2 ro_div_0/divider_0/prescaler_0/tspc_2/Z3 0.16fF -C551 ro_div_0/divider_0/prescaler_0/tspc_0/a_740_n680# ro_div_0/divider_0/clk 0.01fF -C552 pll_full_0/pd_0/DOWN pll_full_0/cp_0/a_1710_0# 0.04fF -C553 pll_full_0/pd_0/tspc_r_1/Z1 pll_full_0/pd_0/tspc_r_1/Z2 0.71fF -C554 divider_0/tspc_2/Z1 divider_0/tspc_2/Z2 1.07fF -C555 divider_0/nor_0/B divider_0/tspc_2/Z3 0.38fF -C556 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z4 0.12fF -C557 pll_full_0/divbuf_0/a_492_n240# pll_full_0/divbuf_0/IN 0.13fF -C558 pd_0/DOWN pd_0/tspc_r_1/Qbar 0.02fF -C559 pd_0/R pd_0/tspc_r_1/Qbar1 0.30fF -C560 pll_full_0/ro_complete_0/cbank_2/switch_4/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF -C561 divbuf_2/OUT divbuf_2/OUT3 0.26fF -C562 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/tspc_0/Z3 0.65fF -C563 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.00fF -C564 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.21fF -C565 pll_full_0/divider_0/and_0/B pll_full_0/divider_0/and_0/Z1 0.07fF -C566 pd_div_0/pd_0/tspc_r_1/Z3 pd_div_0/pd_0/tspc_r_1/Z4 0.20fF -C567 pd_div_0/pd_0/REF pd_div_0/pd_0/tspc_r_1/z5 0.04fF -C568 ro_div_0/divider_0/prescaler_0/tspc_0/Z1 ro_div_0/divider_0/prescaler_0/tspc_0/Z3 0.06fF -C569 io_clamp_high[0] io_analog[4] 0.53fF -C570 ro_div_0/divider_0/prescaler_0/tspc_1/Z4 ro_div_0/divider_0/prescaler_0/Out 0.28fF -C571 divbuf_1/a_492_n240# divbuf_1/OUT5 0.01fF -C572 ro_div_0/ro_complete_0/a2 ro_div_0/divider_0/clk 0.05fF -C573 pll_full_0/divider_0/tspc_0/Q pll_full_0/divider_0/tspc_1/Z1 0.01fF -C574 divbuf_2/OUT divbuf_2/a_492_n240# 0.00fF -C575 pd_div_0/divider_0/prescaler_0/tspc_2/Z2 pd_div_0/divider_0/prescaler_0/tspc_2/Z4 0.36fF -C576 pd_div_0/divider_0/nor_1/Z1 pd_div_0/divider_0/and_0/A 0.80fF -C577 ro_div_0/divbuf_0/a_492_n240# ro_div_0/divbuf_0/OUT 0.00fF -C578 ro_div_0/ro_complete_0/cbank_1/switch_0/vin ro_div_0/ro_complete_0/a5 0.09fF -C579 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/a1 0.14fF -C580 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/cbank_0/v 1.30fF -C581 ro_complete_0/cbank_0/switch_2/vin ro_complete_0/a3 0.09fF -C582 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/z5 0.11fF -C583 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 pll_full_0/divider_0/clk 0.12fF -C584 pd_div_0/divbuf_0/OUT2 pd_div_0/divbuf_0/a_492_n240# 0.42fF -C585 pd_div_0/pd_0/REF pd_div_0/pd_0/tspc_r_1/Z2 0.19fF -C586 pll_full_0/pd_0/R pll_full_0/pd_0/and_pd_0/Z1 0.02fF -C587 divider_0/tspc_1/Q divider_0/nor_0/B 0.22fF -C588 divider_0/and_0/OUT divider_0/prescaler_0/tspc_0/D 0.03fF -C589 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/D 0.09fF -C590 ro_div_0/divider_0/and_0/OUT ro_div_0/divider_0/and_0/B 0.01fF -C591 ro_div_0/divider_0/prescaler_0/tspc_1/Q ro_div_0/divider_0/prescaler_0/Out 0.91fF -C592 ro_div_0/ro_complete_0/a2 ro_div_0/ro_complete_0/cbank_2/v 0.05fF -C593 pd_div_0/divider_0/prescaler_0/tspc_0/a_630_n680# pd_div_0/divider_0/prescaler_0/tspc_0/Z2 0.01fF -C594 pll_full_0/divider_0/tspc_0/Q pll_full_0/divider_0/tspc_1/Z4 0.15fF -C595 divbuf_7/OUT5 divbuf_7/OUT2 0.02fF -C596 ro_complete_0/cbank_0/switch_5/vin ro_complete_0/cbank_0/v 1.30fF -C597 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Z2 0.25fF -C598 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z2 0.01fF -C599 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/clk 0.60fF -C600 divider_0/nor_1/B divider_0/tspc_1/Z1 0.03fF -C601 ro_div_0/divider_0/prescaler_0/tspc_2/a_740_n680# ro_div_0/divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF -C602 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF -C603 divider_0/and_0/OUT divider_0/and_0/out1 0.31fF -C604 divider_0/nor_1/A divider_0/and_0/A 0.01fF -C605 pd_div_0/div pd_div_0/bufin 0.26fF -C606 ro_div_0/divider_0/prescaler_0/Out ro_div_0/divider_0/tspc_0/Z4 0.12fF -C607 pd_0/DOWN pd_0/tspc_r_0/z5 0.03fF -C608 pd_0/tspc_r_0/Z2 pd_0/R 0.21fF -C609 pll_full_0/ro_complete_0/cbank_0/v pll_full_0/ro_complete_0/cbank_2/v 0.04fF -C610 pd_div_0/divider_0/tspc_0/Q pd_div_0/divider_0/nor_1/A 0.55fF -C611 pd_div_0/divider_0/mc2 pd_div_0/divider_0/and_0/B 0.20fF -C612 ro_div_0/divbuf_0/OUT3 ro_div_0/divbuf_0/OUT4 5.16fF -C613 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_0/D 0.16fF -C614 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_0/Q 0.05fF -C615 divbuf_4/OUT4 divbuf_4/OUT 1.11fF -C616 pd_div_0/divider_0/nor_0/B pd_div_0/divider_0/tspc_2/Z1 0.03fF -C617 pd_div_0/divider_0/tspc_2/a_630_n680# pd_div_0/divider_0/tspc_2/Z3 0.05fF -C618 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/A 0.01fF -C619 divider_0/prescaler_0/m1_2700_2190# divider_0/nor_1/A 0.01fF -C620 divider_0/tspc_1/Z2 divider_0/tspc_1/Z3 0.16fF -C621 divider_0/nor_1/B divider_0/tspc_1/Z4 0.21fF -C622 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/D 0.15fF -C623 ro_div_0/divider_0/prescaler_0/tspc_2/Z2 ro_div_0/divider_0/prescaler_0/tspc_1/Q 0.06fF -C624 divider_0/nor_0/B divider_0/and_0/B 0.29fF -C625 pd_div_0/pd_0/and_pd_0/Out1 pd_div_0/pd_0/and_pd_0/Z1 0.18fF -C626 ro_complete_0/a0 ro_complete_0/cbank_2/switch_5/vin 0.09fF -C627 pd_0/DOWN pd_0/and_pd_0/Z1 0.07fF -C628 ro_div_0/divbuf_0/OUT3 ro_div_0/divbuf_0/OUT 0.26fF -C629 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.13fF -C630 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Qbar1 0.12fF -C631 pd_div_0/divider_0/and_0/out1 pd_div_0/divider_0/and_0/B 0.18fF -C632 pd_div_0/divider_0/tspc_0/Z2 pd_div_0/divider_0/tspc_0/Z3 0.16fF -C633 pd_div_0/pd_0/REF pd_div_0/pd_0/tspc_r_1/Qbar1 0.12fF -C634 ro_div_0/divider_0/prescaler_0/tspc_2/D ro_div_0/divider_0/prescaler_0/nand_1/z1 0.21fF -C635 pd_div_0/divbuf_0/a_492_n240# pd_div_0/bufin 0.13fF -C636 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/divider_0/clk 1.32fF -C637 pd_div_0/divider_0/nor_1/A pd_div_0/divider_0/prescaler_0/tspc_1/Q 0.03fF -C638 pd_div_0/divider_0/tspc_1/Q pd_div_0/divider_0/tspc_2/a_630_n680# 0.01fF -C639 pd_div_0/divider_0/prescaler_0/m1_2700_2190# pd_div_0/divider_0/prescaler_0/Out 0.11fF -C640 ro_complete_0/a3 ro_complete_0/cbank_2/switch_1/vin 0.13fF -C641 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/switch_2/vin 0.20fF -C642 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_0/Z2 0.23fF -C643 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 pll_full_0/divider_0/clk 0.12fF -C644 divbuf_5/a_492_n240# divbuf_5/OUT5 0.01fF -C645 ro_div_0/ro_complete_0/cbank_0/switch_5/vin ro_div_0/ro_complete_0/cbank_0/v 1.30fF -C646 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/Z3 0.06fF -C647 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/a2 0.09fF -C648 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/Out 0.04fF -C649 divbuf_1/OUT divbuf_1/OUT2 0.06fF -C650 pd_div_0/pd_0/tspc_r_1/Z3 pd_div_0/pd_0/R 0.29fF -C651 ro_div_0/divider_0/prescaler_0/tspc_0/Z2 ro_div_0/divider_0/and_0/OUT 0.05fF -C652 ro_div_0/ro_complete_0/cbank_1/switch_4/vin ro_div_0/divider_0/clk 1.30fF -C653 ro_div_0/ro_complete_0/a4 ro_div_0/ro_complete_0/cbank_2/switch_1/vin 0.09fF -C654 pd_div_0/pd_0/DOWN pd_div_0/pd_0/and_pd_0/Out1 0.12fF -C655 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/OUT5 43.38fF -C656 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/Qbar1 0.38fF -C657 pd_div_0/divider_0/tspc_0/Q pd_div_0/divider_0/tspc_1/Z2 0.14fF -C658 pll_full_0/pd_0/DIV pll_full_0/divider_0/and_0/OUT 0.01fF -C659 divbuf_4/OUT5 divbuf_4/OUT2 0.02fF -C660 pd_div_0/divider_0/nor_1/A pd_div_0/divider_0/tspc_0/Z3 0.38fF -C661 ro_div_0/ro_complete_0/a2 ro_div_0/ro_complete_0/cbank_1/switch_3/vin 0.09fF -C662 divbuf_6/OUT4 divbuf_6/OUT5 20.26fF -C663 divbuf_6/OUT3 divbuf_6/OUT 0.26fF -C664 divider_0/tspc_1/Z1 divider_0/tspc_1/Z3 0.06fF -C665 divider_0/nor_1/B divider_0/tspc_1/Q 0.51fF -C666 divider_0/tspc_2/Z2 divider_0/tspc_2/Z3 0.16fF -C667 divider_0/nor_0/B divider_0/tspc_2/Z4 0.22fF -C668 pd_div_0/pd_0/UP pd_div_0/pd_0/and_pd_0/Z1 0.06fF -C669 ro_div_0/divider_0/tspc_0/a_630_n680# ro_div_0/divider_0/tspc_0/Q 0.04fF -C670 ro_div_0/divider_0/prescaler_0/tspc_2/Z2 ro_div_0/divider_0/prescaler_0/tspc_2/Z4 0.36fF -C671 ro_div_0/divider_0/prescaler_0/tspc_0/a_630_n680# ro_div_0/divider_0/clk 0.01fF -C672 divbuf_3/IN divbuf_3/OUT5 0.00fF -C673 pd_div_0/divider_0/prescaler_0/tspc_1/Z2 pd_div_0/divider_0/prescaler_0/tspc_2/a_740_n680# 0.01fF -C674 pd_div_0/divider_0/nor_1/B pd_div_0/divider_0/nor_1/A 1.21fF -C675 pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF -C676 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/nor_0/B 0.47fF -C677 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.65fF -C678 pll_full_0/ro_complete_0/cbank_2/v pll_full_0/divider_0/clk 1.36fF -C679 pd_div_0/pd_0/tspc_r_1/Qbar1 pd_div_0/pd_0/tspc_r_1/z5 0.20fF -C680 ro_div_0/divider_0/prescaler_0/tspc_0/Z1 ro_div_0/divider_0/prescaler_0/tspc_0/Z4 0.00fF -C681 pll_full_0/divbuf_0/a_492_n240# pll_full_0/pd_0/DIV 0.00fF -C682 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_1/Z2 0.21fF -C683 divider_0/tspc_1/Z3 divider_0/tspc_1/Z4 0.65fF -C684 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z2 0.01fF -C685 divider_0/nor_0/Z1 divider_0/and_0/B 0.78fF -C686 divbuf_1/a_492_n240# divbuf_1/OUT2 0.42fF -C687 ro_div_0/divider_0/tspc_0/Z1 ro_div_0/divider_0/tspc_0/Z4 0.00fF -C688 pll_full_0/ro_complete_0/cbank_0/switch_2/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF -C689 pd_0/tspc_r_1/Z4 pd_0/tspc_r_1/z5 0.04fF -C690 pd_div_0/divider_0/tspc_0/Z4 pd_div_0/divider_0/tspc_0/Z3 0.65fF -C691 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.05fF -C692 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/a1 0.14fF -C693 pd_div_0/pd_0/UP pd_div_0/pd_0/DOWN 0.49fF -C694 ro_div_0/divider_0/tspc_0/Z3 ro_div_0/divider_0/nor_1/A 0.38fF -C695 ro_div_0/divider_0/tspc_0/a_630_n680# ro_div_0/divider_0/tspc_0/Z2 0.01fF -C696 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/DOWN 0.03fF -C697 divider_0/nor_1/B divider_0/and_0/B 0.31fF -C698 divider_0/tspc_1/Q divider_0/tspc_2/Z2 0.14fF -C699 divider_0/and_0/OUT divider_0/prescaler_0/nand_0/z1 0.01fF -C700 divbuf_0/OUT5 divbuf_0/a_492_n240# 0.01fF -C701 pll_full_0/pd_0/and_pd_0/Out1 pll_full_0/pd_0/and_pd_0/Z1 0.18fF -C702 pd_div_0/pd_0/tspc_r_0/Qbar1 pd_div_0/pd_0/tspc_r_0/Qbar 0.01fF -C703 ro_div_0/divider_0/nor_0/B ro_div_0/divider_0/tspc_2/Z1 0.03fF -C704 ro_div_0/divider_0/tspc_2/a_630_n680# ro_div_0/divider_0/tspc_2/Z3 0.05fF -C705 divbuf_2/OUT divbuf_2/OUT2 0.06fF -C706 pd_div_0/divider_0/tspc_0/Q pd_div_0/divider_0/tspc_1/Z1 0.01fF -C707 filter_0/a_4216_n5230# filter_0/v 0.19fF -C708 pd_div_0/divider_0/prescaler_0/tspc_2/a_740_n680# pd_div_0/divider_0/prescaler_0/Out 0.21fF -C709 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.33fF -C710 pll_full_0/ro_complete_0/cbank_1/switch_2/vin pll_full_0/divider_0/clk 1.46fF -C711 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/Z1 0.04fF -C712 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_2/Z2 0.40fF -C713 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divbuf_0/IN 0.04fF -C714 pll_full_0/divider_0/prescaler_0/tspc_0/Q pll_full_0/divider_0/clk 0.05fF -C715 divider_0/tspc_0/Q divider_0/tspc_0/a_630_n680# 0.04fF -C716 divider_0/and_0/OUT divider_0/clk 0.04fF -C717 ro_complete_0/cbank_1/switch_2/vin ro_complete_0/cbank_1/v 1.30fF -C718 pd_div_0/pd_0/tspc_r_1/Qbar pd_div_0/pd_0/R 0.03fF -C719 ro_div_0/divider_0/and_0/out1 ro_div_0/divider_0/and_0/B 0.18fF -C720 ro_div_0/ro_complete_0/cbank_1/switch_1/vin ro_div_0/divider_0/clk 1.30fF -C721 pd_0/tspc_r_0/Z2 pd_0/tspc_r_0/Z4 0.14fF -C722 pd_div_0/divider_0/tspc_0/Q pd_div_0/divider_0/tspc_1/Z4 0.15fF -C723 pd_div_0/divider_0/nor_1/B pd_div_0/divider_0/tspc_1/Z2 0.30fF -C724 pd_div_0/divider_0/prescaler_0/tspc_1/a_630_n680# pd_div_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF -C725 divbuf_4/a_492_n240# divbuf_4/IN 0.13fF -C726 pd_div_0/divider_0/tspc_2/Z1 pd_div_0/divider_0/tspc_2/Z2 1.07fF -C727 pd_div_0/divider_0/nor_0/B pd_div_0/divider_0/tspc_2/Z3 0.38fF -C728 pd_div_0/divider_0/tspc_2/a_630_n680# pd_div_0/divider_0/tspc_2/Z4 0.12fF -C729 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/nor_1/A 0.15fF -C730 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/nand_0/z1 0.07fF -C731 ro_div_0/ro_complete_0/cbank_2/switch_2/vin ro_div_0/ro_complete_0/cbank_2/v 1.30fF -C732 divider_0/tspc_1/Z3 divider_0/tspc_1/Q 0.05fF -C733 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_0/D 0.05fF -C734 pd_div_0/divbuf_0/OUT2 pd_div_0/divbuf_0/OUT5 0.02fF -C735 ro_div_0/divider_0/tspc_1/Q ro_div_0/divider_0/tspc_2/a_630_n680# 0.01fF -C736 ro_div_0/divider_0/nor_1/B ro_div_0/divider_0/tspc_0/Q 0.22fF -C737 ro_div_0/divider_0/prescaler_0/m1_2700_2190# ro_div_0/divider_0/prescaler_0/Out 0.11fF -C738 ro_div_0/ro_complete_0/cbank_2/switch_3/vin ro_div_0/ro_complete_0/cbank_2/switch_4/vin 0.20fF -C739 ro_div_0/ro_complete_0/cbank_1/switch_3/vin ro_div_0/ro_complete_0/cbank_1/switch_4/vin 0.20fF -C740 ro_complete_0/a0 ro_complete_0/cbank_2/v 0.05fF -C741 pd_0/R pd_0/and_pd_0/Out1 0.33fF -C742 pd_0/REF pd_0/tspc_r_1/Z4 0.02fF -C743 pd_0/UP pd_0/tspc_r_1/Qbar 0.21fF -C744 pll_full_0/ro_complete_0/cbank_2/switch_5/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF -C745 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/UP 0.03fF -C746 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.21fF -C747 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.03fF -C748 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/clk 0.01fF -C749 divbuf_0/a_492_n240# divbuf_0/IN 0.13fF -C750 pll_full_0/pd_0/UP pll_full_0/pd_0/DOWN 4.58fF -C751 divider_0/nor_1/B divider_0/tspc_2/Z4 0.02fF -C752 divbuf_1/OUT divbuf_1/OUT3 0.26fF -C753 ro_div_0/divider_0/tspc_0/Z2 ro_div_0/divider_0/tspc_0/Z4 0.36fF -C754 divbuf_2/OUT divbuf_2/OUT4 1.11fF -C755 pd_div_0/divider_0/mc2 pd_div_0/divider_0/and_0/OUT 0.05fF -C756 pll_full_0/divider_0/tspc_0/Q pll_full_0/divider_0/tspc_0/a_630_n680# 0.04fF -C757 pd_div_0/divider_0/tspc_1/Q pd_div_0/divider_0/nor_0/B 0.22fF -C758 pd_div_0/divider_0/and_0/OUT pd_div_0/divider_0/prescaler_0/tspc_0/D 0.03fF -C759 pd_div_0/divider_0/prescaler_0/tspc_2/Z2 pd_div_0/divider_0/prescaler_0/tspc_2/D 0.09fF -C760 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/a0 0.13fF -C761 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Z1 0.09fF -C762 divbuf_5/OUT2 divbuf_5/OUT3 1.37fF -C763 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/Z4 0.00fF -C764 ro_div_0/divider_0/prescaler_0/tspc_1/Z2 ro_div_0/divider_0/prescaler_0/tspc_2/a_740_n680# 0.01fF -C765 ro_div_0/divider_0/prescaler_0/tspc_0/a_740_n680# ro_div_0/divider_0/prescaler_0/tspc_0/Q 0.20fF -C766 ro_div_0/divider_0/prescaler_0/tspc_0/Z2 ro_div_0/divider_0/prescaler_0/tspc_0/D 0.09fF -C767 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/ro_complete_0/a4 0.09fF -C768 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_1/switch_0/vin 0.09fF -C769 divider_0/tspc_0/a_630_n680# divider_0/tspc_0/Z3 0.05fF -C770 divbuf_2/OUT5 divbuf_2/IN 0.00fF -C771 ro_div_0/ro_complete_0/cbank_0/switch_3/vin ro_div_0/ro_complete_0/cbank_0/v 1.30fF -C772 ro_complete_0/a4 ro_complete_0/cbank_2/switch_0/vin 0.12fF -C773 pd_0/tspc_r_0/Qbar1 pd_0/DOWN 0.11fF -C774 pd_0/DIV pd_0/tspc_r_0/Z1 0.17fF -C775 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF -C776 pd_div_0/divider_0/nor_1/B pd_div_0/divider_0/tspc_1/Z1 0.03fF -C777 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/and_0/OUT 0.05fF -C778 pd_div_0/divider_0/and_0/OUT pd_div_0/divider_0/and_0/out1 0.31fF -C779 pd_div_0/divider_0/nor_1/A pd_div_0/divider_0/and_0/A 0.01fF -C780 divbuf_6/OUT5 divbuf_6/OUT 43.38fF -C781 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_0/Z3 0.27fF -C782 divider_0/nor_1/B divider_0/tspc_0/a_630_n680# 0.01fF -C783 divider_0/prescaler_0/tspc_1/Z1 divider_0/prescaler_0/tspc_1/Z3 0.06fF -C784 divider_0/tspc_2/Z2 divider_0/tspc_2/Z4 0.36fF -C785 divider_0/tspc_2/Z3 divider_0/Out 0.05fF -C786 ro_div_0/ro_complete_0/cbank_0/switch_4/vin ro_div_0/ro_complete_0/cbank_0/switch_5/vin 0.20fF -C787 ro_complete_0/a3 ro_complete_0/cbank_2/v 0.05fF -C788 pd_0/R pd_0/tspc_r_1/Z2 0.21fF -C789 divbuf_3/OUT2 divbuf_3/OUT 0.06fF -C790 pd_div_0/divider_0/prescaler_0/m1_2700_2190# pd_div_0/divider_0/nor_1/A 0.01fF -C791 pd_div_0/divider_0/tspc_1/Z2 pd_div_0/divider_0/tspc_1/Z3 0.16fF -C792 pd_div_0/divider_0/nor_1/B pd_div_0/divider_0/tspc_1/Z4 0.21fF -C793 pd_div_0/divider_0/prescaler_0/tspc_0/Z1 pd_div_0/divider_0/prescaler_0/tspc_0/D 0.15fF -C794 pd_div_0/divbuf_0/OUT5 pd_div_0/bufin 0.00fF -C795 ro_div_0/divbuf_0/a_492_n240# ro_div_0/divbuf_0/OUT2 0.42fF -C796 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_1/Z4 0.02fF -C797 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_2/Z2 0.20fF -C798 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/clk 0.01fF -C799 divbuf_4/a_492_n240# divbuf_4/OUT 0.00fF -C800 pd_div_0/divider_0/nor_0/B pd_div_0/divider_0/and_0/B 0.29fF -C801 pll_full_0/pd_0/REF pll_full_0/divbuf_1/a_492_n240# 0.13fF -C802 ro_div_0/divider_0/prescaler_0/tspc_0/Z3 ro_div_0/divider_0/prescaler_0/tspc_0/Z4 0.65fF -C803 ro_div_0/divider_0/tspc_1/Z3 ro_div_0/divider_0/tspc_0/Q 0.45fF -C804 ro_div_0/divider_0/prescaler_0/tspc_2/a_740_n680# ro_div_0/divider_0/prescaler_0/Out 0.21fF -C805 divider_0/and_0/A divider_0/and_0/B 0.18fF -C806 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/cbank_0/switch_5/vin 0.20fF -C807 pd_0/UP pd_0/and_pd_0/Z1 0.06fF -C808 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 1.07fF -C809 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.12fF -C810 divbuf_0/OUT2 divbuf_0/OUT3 1.37fF -C811 ro_div_0/divbuf_0/OUT4 ro_div_0/divbuf_0/OUT 1.11fF -C812 ro_complete_0/a4 ro_complete_0/cbank_2/switch_1/vin 0.09fF -C813 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/v 1.30fF -C814 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/Out 0.01fF -C815 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/tspc_0/Q 0.19fF -C816 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/clk 0.14fF -C817 divider_0/prescaler_0/tspc_0/D divider_0/prescaler_0/nand_0/z1 0.24fF -C818 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/Out 0.19fF -C819 ro_div_0/divider_0/nor_1/B ro_div_0/divider_0/tspc_1/Z2 0.30fF -C820 ro_div_0/divider_0/prescaler_0/tspc_1/a_630_n680# ro_div_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF -C821 ro_div_0/divider_0/tspc_2/Z1 ro_div_0/divider_0/tspc_2/Z2 1.07fF -C822 ro_div_0/divider_0/nor_0/B ro_div_0/divider_0/tspc_2/Z3 0.38fF -C823 ro_div_0/divider_0/tspc_2/a_630_n680# ro_div_0/divider_0/tspc_2/Z4 0.12fF -C824 divbuf_3/OUT3 divbuf_3/OUT5 0.01fF -C825 pd_div_0/divider_0/prescaler_0/tspc_0/Z1 pd_div_0/divider_0/prescaler_0/tspc_0/Z3 0.06fF -C826 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z2 1.07fF -C827 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_1/Z3 0.38fF -C828 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.08fF -C829 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.05fF -C830 pd_div_0/divider_0/prescaler_0/tspc_2/a_630_n680# pd_div_0/divider_0/prescaler_0/Out 0.04fF -C831 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/switch_2/vin 0.20fF -C832 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z3 0.06fF -C833 pll_full_0/divider_0/nor_0/B pll_full_0/divbuf_0/IN 0.29fF -C834 pll_full_0/divider_0/prescaler_0/tspc_2/D pll_full_0/divider_0/clk 0.29fF -C835 divbuf_6/a_492_n240# divbuf_6/OUT2 0.42fF -C836 pll_full_0/pd_0/R pll_full_0/pd_0/UP 0.46fF -C837 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Z2 0.01fF -C838 divbuf_1/OUT4 divbuf_1/OUT 1.11fF -C839 divbuf_0/a_492_n240# divbuf_0/OUT 0.00fF -C840 divider_0/prescaler_0/tspc_0/D divider_0/clk 0.26fF -C841 ro_div_0/divider_0/tspc_1/a_630_n680# ro_div_0/divider_0/nor_0/B 0.00fF -C842 pd_div_0/divider_0/nor_0/Z1 pd_div_0/divider_0/nor_0/B 0.06fF -C843 ro_complete_0/cbank_1/switch_4/vin ro_complete_0/cbank_1/switch_5/vin 0.20fF -C844 pd_div_0/divider_0/tspc_1/Z1 pd_div_0/divider_0/tspc_1/Z3 0.06fF -C845 pd_div_0/divider_0/nor_1/B pd_div_0/divider_0/tspc_1/Q 0.51fF -C846 ro_div_0/divbuf_0/OUT3 ro_div_0/divbuf_0/OUT2 1.37fF -C847 ro_div_0/ro_complete_0/a4 ro_div_0/ro_complete_0/cbank_1/switch_1/vin 0.09fF -C848 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/tspc_1/Z4 0.36fF -C849 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/and_0/OUT 0.06fF -C850 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.33fF -C851 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.38fF -C852 pd_div_0/divider_0/tspc_2/Z2 pd_div_0/divider_0/tspc_2/Z3 0.16fF -C853 pd_div_0/divider_0/nor_0/B pd_div_0/divider_0/tspc_2/Z4 0.22fF -C854 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/Z1 0.36fF -C855 divider_0/prescaler_0/tspc_0/Z4 divider_0/prescaler_0/tspc_0/D 0.11fF -C856 pd_div_0/div pd_div_0/pd_0/tspc_r_0/Z4 0.02fF -C857 ro_div_0/ro_complete_0/cbank_2/switch_4/vin ro_div_0/ro_complete_0/cbank_2/switch_5/vin 0.20fF -C858 io_clamp_low[2] io_analog[6] 0.53fF -C859 ro_div_0/divider_0/tspc_1/Q ro_div_0/divider_0/nor_0/B 0.22fF -C860 ro_div_0/divider_0/and_0/OUT ro_div_0/divider_0/prescaler_0/tspc_0/D 0.03fF -C861 ro_div_0/divider_0/prescaler_0/tspc_2/Z2 ro_div_0/divider_0/prescaler_0/tspc_2/D 0.09fF -C862 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF -C863 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/z5 0.11fF -C864 pd_div_0/divider_0/tspc_1/Z3 pd_div_0/divider_0/tspc_1/Z4 0.65fF -C865 pd_div_0/divider_0/prescaler_0/tspc_2/a_630_n680# pd_div_0/divider_0/prescaler_0/tspc_2/Z2 0.01fF -C866 ro_div_0/divider_0/nor_0/Z1 ro_div_0/divider_0/nor_0/B 0.06fF -C867 ro_complete_0/a4 ro_complete_0/cbank_1/switch_1/vin 0.09fF -C868 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_2/Z1 0.01fF -C869 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.05fF -C870 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/clk 0.01fF -C871 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/and_0/A 0.26fF -C872 divider_0/prescaler_0/tspc_0/Z3 divider_0/clk 0.45fF -C873 pd_div_0/div pd_div_0/pd_0/tspc_r_0/Qbar1 0.12fF -C874 ro_div_0/divider_0/nor_1/B ro_div_0/divider_0/tspc_1/Z1 0.03fF -C875 ro_div_0/divider_0/and_0/OUT ro_div_0/divider_0/and_0/out1 0.31fF -C876 divbuf_1/OUT2 divbuf_1/OUT5 0.02fF -C877 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_2/switch_1/vin 0.09fF -C878 pd_div_0/divider_0/nor_1/B pd_div_0/divider_0/and_0/B 0.31fF -C879 pd_div_0/divider_0/tspc_1/Q pd_div_0/divider_0/tspc_2/Z2 0.14fF -C880 pd_div_0/divider_0/and_0/OUT pd_div_0/divider_0/prescaler_0/nand_0/z1 0.01fF -C881 pll_full_0/ro_complete_0/a4 pll_full_0/divider_0/clk 0.11fF -C882 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/switch_4/vin 0.20fF -C883 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/and_0/B 0.08fF -C884 divbuf_5/OUT2 divbuf_5/OUT5 0.02fF -C885 divbuf_5/OUT3 divbuf_5/OUT4 5.16fF -C886 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_0/Z4 0.65fF -C887 pd_div_0/div pd_div_0/divbuf_0/OUT4 1.11fF -C888 ro_div_0/divider_0/tspc_1/Z2 ro_div_0/divider_0/tspc_1/Z3 0.16fF -C889 ro_div_0/divider_0/nor_1/B ro_div_0/divider_0/tspc_1/Z4 0.21fF -C890 ro_div_0/divider_0/prescaler_0/tspc_0/a_630_n680# ro_div_0/divider_0/prescaler_0/tspc_0/Q 0.04fF -C891 ro_complete_0/cbank_1/switch_1/vin ro_complete_0/cbank_1/v 1.30fF -C892 ro_div_0/divider_0/nor_0/B ro_div_0/divider_0/and_0/B 0.29fF -C893 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/Z2 0.25fF -C894 pd_div_0/divider_0/mc2 pd_div_0/divider_0/and_0/out1 0.06fF -C895 pd_div_0/divider_0/tspc_0/Q pd_div_0/divider_0/tspc_0/a_630_n680# 0.04fF -C896 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/R 0.29fF -C897 pd_div_0/divider_0/and_0/OUT pd_div_0/divider_0/clk 0.04fF -C898 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z4 0.00fF -C899 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# 0.01fF -C900 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.09fF -C901 ro_div_0/ro_complete_0/a2 ro_div_0/ro_complete_0/cbank_0/switch_2/vin 0.14fF -C902 pll_full_0/pd_0/R pll_full_0/pd_0/DOWN 0.36fF -C903 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Z4 0.12fF -C904 divider_0/prescaler_0/tspc_1/Z1 divider_0/prescaler_0/tspc_1/Z4 0.00fF -C905 pd_div_0/divbuf_0/OUT2 pd_div_0/divbuf_0/OUT3 1.37fF -C906 pd_div_0/pd_0/tspc_r_0/Z2 pd_div_0/pd_0/R 0.21fF -C907 ro_div_0/divider_0/prescaler_0/tspc_0/Z2 ro_div_0/divider_0/clk 0.11fF -C908 ro_div_0/ro_complete_0/cbank_0/switch_4/vin ro_div_0/ro_complete_0/cbank_0/v 1.30fF -C909 pll_full_0/ro_complete_0/a5 pll_full_0/divider_0/clk 0.15fF -C910 pd_div_0/pd_0/R pd_div_0/pd_0/and_pd_0/Out1 0.33fF -C911 cp_0/a_1710_0# cp_0/out 0.84fF -C912 pd_0/REF pd_0/tspc_r_1/Z3 0.65fF -C913 pd_div_0/divider_0/tspc_1/Z3 pd_div_0/divider_0/tspc_1/Q 0.05fF -C914 pd_div_0/divider_0/prescaler_0/tspc_0/Z3 pd_div_0/divider_0/prescaler_0/tspc_0/D 0.05fF -C915 pll_full_0/pd_0/DIV pll_full_0/divider_0/clk 2.26fF -C916 divbuf_0/OUT5 divbuf_0/OUT2 0.02fF -C917 ro_div_0/ro_complete_0/cbank_0/switch_3/vin ro_div_0/ro_complete_0/cbank_0/switch_4/vin 0.20fF -C918 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/cbank_0/switch_2/vin 0.20fF -C919 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.15fF -C920 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/and_0/OUT 0.06fF -C921 pd_div_0/div pd_div_0/divbuf_0/a_492_n240# 0.00fF -C922 ro_div_0/divider_0/tspc_1/a_630_n680# ro_div_0/divider_0/nor_1/B 0.35fF -C923 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z3 0.06fF -C924 pd_div_0/divider_0/nor_0/Z1 pd_div_0/divider_0/nor_1/B 0.18fF -C925 ro_div_0/divider_0/prescaler_0/tspc_2/a_630_n680# ro_div_0/divider_0/prescaler_0/Out 0.04fF -C926 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.14fF -C927 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF -C928 pd_div_0/divider_0/nor_1/B pd_div_0/divider_0/tspc_2/Z4 0.02fF -C929 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.16fF -C930 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/tspc_0/Z2 0.01fF -C931 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/tspc_2/D 0.32fF -C932 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/clk 0.01fF -C933 pd_div_0/pd_0/tspc_r_1/Z3 pd_div_0/pd_0/UP 0.03fF -C934 ro_div_0/ro_complete_0/cbank_2/switch_1/vin ro_div_0/ro_complete_0/cbank_2/switch_0/vin 0.19fF -C935 ro_div_0/divider_0/tspc_1/Z1 ro_div_0/divider_0/tspc_1/Z3 0.06fF -C936 ro_div_0/divider_0/nor_1/B ro_div_0/divider_0/tspc_1/Q 0.51fF -C937 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Z1 0.09fF -C938 divider_0/and_0/OUT divider_0/prescaler_0/tspc_0/Q 0.04fF -C939 divider_0/prescaler_0/tspc_1/Z3 divider_0/clk 0.45fF -C940 ro_div_0/divider_0/tspc_2/Z2 ro_div_0/divider_0/tspc_2/Z3 0.16fF -C941 ro_div_0/divider_0/nor_0/B ro_div_0/divider_0/tspc_2/Z4 0.22fF -C942 ro_div_0/divider_0/nor_0/Z1 ro_div_0/divider_0/nor_1/B 0.18fF -C943 pll_full_0/divbuf_1/OUT3 pll_full_0/divbuf_1/OUT5 0.01fF -C944 pll_full_0/divbuf_0/OUT3 pll_full_0/divbuf_0/OUT4 5.16fF -C945 divbuf_3/OUT4 divbuf_3/OUT 1.11fF -C946 divbuf_3/a_492_n240# divbuf_3/OUT2 0.42fF -C947 pd_div_0/divider_0/prescaler_0/tspc_0/Z1 pd_div_0/divider_0/prescaler_0/tspc_0/Z4 0.00fF -C948 pd_div_0/divider_0/tspc_0/a_630_n680# pd_div_0/divider_0/tspc_0/Z3 0.05fF -C949 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 1.07fF -C950 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.12fF -C951 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/nor_0/B 0.06fF -C952 pll_full_0/ro_complete_0/cbank_1/switch_4/vin pll_full_0/divider_0/clk 1.46fF -C953 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z4 0.00fF -C954 pd_div_0/div pd_div_0/pd_0/tspc_r_0/Z1 0.17fF -C955 ro_div_0/divider_0/nor_1/Z1 ro_div_0/divider_0/nor_1/B 0.06fF -C956 ro_div_0/ro_complete_0/a0 ro_div_0/ro_complete_0/cbank_1/switch_5/vin 0.09fF -C957 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Q 0.04fF -C958 pd_div_0/pd_0/UP pd_div_0/pd_0/R 0.45fF -C959 pd_div_0/pd_0/tspc_r_0/Z4 pd_div_0/pd_0/tspc_r_0/Z3 0.20fF -C960 ro_div_0/divider_0/tspc_1/Z3 ro_div_0/divider_0/tspc_1/Z4 0.65fF -C961 ro_div_0/divider_0/prescaler_0/tspc_2/a_630_n680# ro_div_0/divider_0/prescaler_0/tspc_2/Z2 0.01fF -C962 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/a1 0.14fF -C963 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF -C964 pll_full_0/pd_0/UP pll_full_0/pd_0/and_pd_0/Out1 0.33fF -C965 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/DIV 0.65fF -C966 divider_0/tspc_2/a_630_n680# divider_0/nor_0/B 0.35fF -C967 ro_complete_0/a4 ro_complete_0/cbank_2/v 0.05fF -C968 ro_complete_0/cbank_1/switch_4/vin ro_complete_0/cbank_1/v 1.30fF -C969 pd_div_0/pd_0/tspc_r_1/Qbar pd_div_0/pd_0/and_pd_0/Out1 0.05fF -C970 pd_div_0/divider_0/nor_1/B pd_div_0/divider_0/tspc_0/a_630_n680# 0.01fF -C971 pd_div_0/divider_0/prescaler_0/tspc_1/Z1 pd_div_0/divider_0/prescaler_0/tspc_1/Z3 0.06fF -C972 pd_div_0/divider_0/tspc_2/Z2 pd_div_0/divider_0/tspc_2/Z4 0.36fF -C973 pd_div_0/divider_0/tspc_2/Z3 pd_div_0/bufin 0.05fF -C974 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/nor_0/B 0.00fF -C975 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/nor_1/A 0.35fF -C976 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.08fF -C977 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.05fF -C978 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.04fF -C979 ro_div_0/divider_0/prescaler_0/tspc_0/a_740_n680# ro_div_0/divider_0/prescaler_0/tspc_0/Z3 0.33fF -C980 ro_div_0/ro_complete_0/cbank_2/switch_4/vin ro_div_0/ro_complete_0/cbank_2/v 1.30fF -C981 divider_0/prescaler_0/m1_2700_2190# divider_0/and_0/OUT 0.14fF -C982 pd_div_0/pd_0/tspc_r_0/Qbar1 pd_div_0/pd_0/tspc_r_0/Z3 0.38fF -C983 ro_div_0/divider_0/nor_1/B ro_div_0/divider_0/and_0/B 0.31fF -C984 ro_div_0/divider_0/tspc_1/Q ro_div_0/divider_0/tspc_2/Z2 0.14fF -C985 ro_div_0/divider_0/and_0/OUT ro_div_0/divider_0/prescaler_0/nand_0/z1 0.01fF -C986 divider_0/prescaler_0/Out divider_0/tspc_0/Z2 0.11fF -C987 divbuf_7/OUT3 divbuf_7/OUT4 5.16fF -C988 ro_div_0/ro_complete_0/cbank_0/switch_1/vin ro_div_0/ro_complete_0/cbank_0/v 1.30fF -C989 ro_complete_0/cbank_2/switch_2/vin ro_complete_0/cbank_2/v 1.30fF -C990 pll_full_0/divbuf_1/OUT pll_full_0/divbuf_1/OUT3 0.26fF -C991 pd_0/UP pd_0/tspc_r_1/z5 0.03fF -C992 divbuf_1/OUT3 divbuf_1/OUT5 0.01fF -C993 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/switch_2/vin 0.20fF -C994 pd_div_0/divider_0/and_0/A pd_div_0/divider_0/and_0/B 0.18fF -C995 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_2/Z3 0.45fF -C996 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.11fF -C997 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/Out 0.08fF -C998 ro_complete_0/cbank_1/v ro_complete_0/cbank_2/v 1.36fF -C999 pd_div_0/div pd_div_0/pd_0/tspc_r_0/Z3 0.65fF -C1000 ro_div_0/divider_0/tspc_1/a_630_n680# ro_div_0/divider_0/tspc_1/Z3 0.05fF -C1001 ro_div_0/divider_0/tspc_0/a_630_n680# ro_div_0/divider_0/nor_1/A 0.35fF -C1002 pll_full_0/pd_0/tspc_r_1/Z4 pll_full_0/pd_0/tspc_r_1/z5 0.04fF -C1003 divider_0/tspc_0/Z1 divider_0/tspc_0/Z2 1.07fF -C1004 divider_0/prescaler_0/tspc_0/Z4 divider_0/clk 0.12fF -C1005 ro_div_0/divider_0/and_0/OUT ro_div_0/divider_0/clk 0.04fF -C1006 pll_full_0/divbuf_1/OUT2 pll_full_0/divbuf_1/OUT3 1.37fF -C1007 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.09fF -C1008 pd_div_0/divider_0/prescaler_0/tspc_0/D pd_div_0/divider_0/prescaler_0/nand_0/z1 0.24fF -C1009 pd_div_0/divider_0/prescaler_0/tspc_1/Z2 pd_div_0/divider_0/prescaler_0/Out 0.19fF -C1010 divbuf_5/OUT4 divbuf_5/OUT5 20.26fF -C1011 divbuf_5/OUT3 divbuf_5/OUT 0.26fF -C1012 divider_0/mc2 divider_0/nor_1/A 0.04fF -C1013 pd_div_0/pd_0/UP pd_div_0/pd_0/tspc_r_1/Qbar 0.21fF -C1014 ro_div_0/divider_0/tspc_1/Z3 ro_div_0/divider_0/tspc_1/Q 0.05fF -C1015 ro_div_0/ro_complete_0/cbank_0/v ro_div_0/divider_0/clk 1.27fF -C1016 pll_full_0/pd_0/tspc_r_1/Z4 pll_full_0/pd_0/tspc_r_1/Z2 0.14fF -C1017 divider_0/nor_1/A divider_0/prescaler_0/Out 0.15fF -C1018 divider_0/prescaler_0/tspc_2/Z3 divider_0/clk 0.64fF -C1019 divbuf_2/OUT5 divbuf_2/OUT3 0.01fF -C1020 ro_div_0/ro_complete_0/cbank_0/switch_0/vin ro_div_0/ro_complete_0/cbank_0/v 1.30fF -C1021 ro_complete_0/a5 ro_complete_0/cbank_2/switch_0/vin 0.09fF -C1022 pd_0/tspc_r_0/Qbar1 pd_0/tspc_r_0/Qbar 0.01fF -C1023 pd_0/tspc_r_0/Z3 pd_0/R 0.27fF -C1024 divbuf_3/a_492_n240# divbuf_3/OUT 0.00fF -C1025 pd_div_0/divider_0/tspc_1/a_630_n680# pd_div_0/divider_0/tspc_1/Z2 0.01fF -C1026 pll_full_0/pd_0/DIV pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.03fF -C1027 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Q 0.04fF -C1028 pd_div_0/divider_0/prescaler_0/tspc_0/D pd_div_0/divider_0/clk 0.26fF -C1029 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/tspc_r_0/Z3 0.38fF -C1030 divider_0/tspc_0/Z1 divider_0/nor_1/A 0.03fF -C1031 divider_0/prescaler_0/tspc_1/Z3 divider_0/prescaler_0/tspc_1/Z4 0.65fF -C1032 ro_div_0/ro_complete_0/cbank_0/v ro_div_0/ro_complete_0/cbank_2/v 0.04fF -C1033 ro_div_0/divider_0/nor_1/A ro_div_0/divider_0/prescaler_0/tspc_1/Q 0.03fF -C1034 ro_div_0/divider_0/nor_1/B ro_div_0/divider_0/tspc_2/Z4 0.02fF -C1035 pll_full_0/pd_0/DOWN pll_full_0/pd_0/and_pd_0/Out1 0.12fF -C1036 divbuf_2/OUT5 divbuf_2/a_492_n240# 0.01fF -C1037 ro_div_0/ro_complete_0/cbank_0/switch_1/vin ro_div_0/ro_complete_0/a3 0.13fF -C1038 ro_complete_0/a1 ro_complete_0/cbank_2/v 0.05fF -C1039 cp_0/a_1710_0# cp_0/down 0.32fF -C1040 cp_0/upbar cp_0/a_1710_n2840# 0.29fF -C1041 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/Qbar1 0.38fF -C1042 pd_div_0/divider_0/prescaler_0/tspc_0/Z4 pd_div_0/divider_0/prescaler_0/tspc_0/D 0.11fF -C1043 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/nor_1/B 0.18fF -C1044 divbuf_0/OUT5 divbuf_0/OUT3 0.01fF -C1045 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/clk 0.11fF -C1046 divider_0/tspc_0/Z4 divider_0/prescaler_0/Out 0.12fF -C1047 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z4 0.00fF -C1048 divider_0/prescaler_0/tspc_1/Z3 divider_0/prescaler_0/tspc_1/Q 0.21fF -C1049 ro_div_0/divider_0/nor_1/A ro_div_0/divider_0/tspc_0/Z4 0.21fF -C1050 pll_full_0/pd_0/tspc_r_1/Qbar pll_full_0/pd_0/and_pd_0/Z1 0.02fF -C1051 divider_0/and_0/B divider_0/and_0/Z1 0.07fF -C1052 divbuf_0/OUT3 divbuf_0/OUT4 5.16fF -C1053 divbuf_0/OUT2 divbuf_0/OUT 0.06fF -C1054 ro_div_0/ro_complete_0/cbank_2/switch_3/vin ro_div_0/ro_complete_0/cbank_2/v 1.30fF -C1055 pd_0/tspc_r_1/Qbar pd_0/and_pd_0/Z1 0.02fF -C1056 divbuf_4/OUT3 divbuf_4/OUT4 5.16fF -C1057 pd_div_0/divider_0/prescaler_0/tspc_0/Z3 pd_div_0/divider_0/clk 0.45fF -C1058 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/nor_1/B 0.35fF -C1059 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.36fF -C1060 ro_div_0/divbuf_0/OUT2 ro_div_0/divbuf_0/OUT 0.06fF -C1061 ro_complete_0/a2 ro_complete_0/cbank_2/switch_2/vin 0.14fF -C1062 ro_complete_0/cbank_0/switch_2/vin ro_complete_0/cbank_0/v 1.30fF -C1063 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/nand_1/z1 0.22fF -C1064 pll_full_0/divider_0/prescaler_0/tspc_0/Q pll_full_0/divider_0/prescaler_0/tspc_2/D 0.04fF -C1065 pd_div_0/pd_0/tspc_r_1/Z3 pd_div_0/pd_0/tspc_r_1/Z1 0.09fF -C1066 divider_0/tspc_0/Z4 divider_0/tspc_0/Z1 0.00fF -C1067 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_0/Z3 0.33fF -C1068 divider_0/prescaler_0/tspc_1/Z4 divider_0/clk 0.12fF -C1069 pd_div_0/pd_0/tspc_r_0/Z1 pd_div_0/pd_0/tspc_r_0/Z3 0.09fF -C1070 ro_div_0/divider_0/prescaler_0/tspc_1/Z1 ro_div_0/divider_0/prescaler_0/tspc_1/Z3 0.06fF -C1071 ro_div_0/divider_0/nor_1/B ro_div_0/divider_0/nor_1/A 1.21fF -C1072 ro_div_0/divider_0/nor_1/Z1 ro_div_0/divider_0/and_0/A 0.80fF -C1073 ro_div_0/ro_complete_0/a3 ro_div_0/divider_0/clk 0.05fF -C1074 ro_div_0/ro_complete_0/cbank_0/switch_3/vin ro_div_0/ro_complete_0/a1 0.14fF -C1075 ro_complete_0/a2 ro_complete_0/cbank_1/v 0.05fF -C1076 divbuf_1/OUT4 divbuf_1/OUT5 20.26fF -C1077 pd_div_0/pd_0/DOWN pd_div_0/pd_0/tspc_r_0/Qbar 0.21fF -C1078 ro_div_0/divider_0/tspc_2/Z2 ro_div_0/divider_0/tspc_2/Z4 0.36fF -C1079 ro_div_0/divider_0/tspc_2/Z3 ro_div_0/divbuf_0/IN 0.05fF -C1080 pd_div_0/divider_0/prescaler_0/tspc_0/Z3 pd_div_0/divider_0/prescaler_0/tspc_0/Z4 0.65fF -C1081 pd_div_0/divider_0/mc2 pd_div_0/divider_0/nor_0/B 0.15fF -C1082 pll_full_0/divbuf_0/OUT5 pll_full_0/divbuf_0/OUT4 20.26fF -C1083 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_2/v 0.05fF -C1084 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.16fF -C1085 pll_full_0/divider_0/tspc_2/Z3 pll_full_0/divider_0/tspc_2/Z4 0.65fF -C1086 divbuf_6/a_492_n240# divbuf_6/OUT 0.00fF -C1087 ro_div_0/ro_complete_0/a3 ro_div_0/ro_complete_0/cbank_2/v 0.05fF -C1088 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z2 0.01fF -C1089 divider_0/prescaler_0/tspc_1/Q divider_0/clk 0.60fF -C1090 pd_div_0/div pd_div_0/divbuf_0/OUT5 43.38fF -C1091 ro_div_0/ro_complete_0/cbank_2/switch_3/vin ro_div_0/ro_complete_0/a1 0.14fF -C1092 ro_complete_0/cbank_1/switch_0/vin ro_complete_0/cbank_1/v 1.45fF -C1093 pd_div_0/divbuf_0/OUT4 pd_div_0/divbuf_0/OUT5 20.26fF -C1094 ro_div_0/divider_0/and_0/A ro_div_0/divider_0/and_0/B 0.18fF -C1095 pd_div_0/divider_0/tspc_1/a_630_n680# pd_div_0/divider_0/tspc_1/Z4 0.12fF -C1096 pd_div_0/divider_0/prescaler_0/tspc_1/Z1 pd_div_0/divider_0/prescaler_0/tspc_1/Z4 0.00fF -C1097 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/prescaler_0/Out 0.12fF -C1098 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 1.07fF -C1099 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.12fF -C1100 io_clamp_low[2] io_clamp_high[2] 0.53fF -C1101 ro_div_0/divider_0/tspc_0/a_630_n680# ro_div_0/divider_0/tspc_0/Z3 0.05fF -C1102 ro_div_0/divider_0/prescaler_0/tspc_0/a_740_n680# ro_div_0/divider_0/prescaler_0/tspc_0/Z4 0.08fF -C1103 ro_div_0/divider_0/prescaler_0/tspc_0/a_630_n680# ro_div_0/divider_0/prescaler_0/tspc_0/Z3 0.05fF -C1104 pll_full_0/pd_0/tspc_r_0/z5 pll_full_0/pd_0/tspc_r_1/z5 0.02fF -C1105 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_0/D 0.16fF -C1106 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_0/Q 0.05fF -C1107 io_clamp_high[1] io_analog[5] 0.53fF -C1108 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_2/v 0.08fF -C1109 divider_0/and_0/out1 divider_0/and_0/A 0.01fF -C1110 ro_div_0/divider_0/prescaler_0/tspc_0/D ro_div_0/divider_0/prescaler_0/nand_0/z1 0.24fF -C1111 ro_div_0/divider_0/prescaler_0/tspc_1/Z2 ro_div_0/divider_0/prescaler_0/Out 0.19fF -C1112 ro_complete_0/cbank_2/switch_4/vin ro_complete_0/cbank_2/switch_5/vin 0.20fF -C1113 pll_full_0/divbuf_1/OUT pll_full_0/divbuf_1/OUT5 43.38fF -C1114 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/ro_complete_0/cbank_1/switch_4/vin 0.20fF -C1115 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF -C1116 divbuf_7/OUT4 divbuf_7/OUT5 20.26fF -C1117 divbuf_7/OUT3 divbuf_7/OUT 0.26fF -C1118 divbuf_1/OUT2 divbuf_1/OUT3 1.37fF -C1119 cp_0/a_1710_n2840# cp_0/out 0.61fF -C1120 pd_0/tspc_r_1/Z2 pd_0/tspc_r_1/Z4 0.14fF -C1121 pd_div_0/divider_0/prescaler_0/tspc_2/Z1 pd_div_0/divider_0/prescaler_0/tspc_2/Z3 0.06fF -C1122 pll_full_0/filter_0/a_4216_n5230# pll_full_0/divider_0/clk 1.58fF -C1123 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/tspc_0/Z1 0.00fF -C1124 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.33fF -C1125 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_2/Z4 0.15fF -C1126 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/divider_0/prescaler_0/Out 0.11fF -C1127 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/clk 0.11fF -C1128 pll_full_0/pd_0/R pll_full_0/pd_0/and_pd_0/Out1 0.33fF -C1129 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_1/Q 0.13fF -C1130 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/OUT2 0.06fF -C1131 pd_div_0/divbuf_0/a_492_n240# pd_div_0/divbuf_0/OUT5 0.01fF -C1132 ro_div_0/divider_0/prescaler_0/tspc_0/D ro_div_0/divider_0/clk 0.26fF -C1133 pll_full_0/divbuf_1/OUT2 pll_full_0/divbuf_1/OUT5 0.02fF -C1134 pll_full_0/ro_complete_0/cbank_0/switch_5/vin pll_full_0/ro_complete_0/a0 0.09fF -C1135 divbuf_7/OUT divbuf_7/a_492_n240# 0.00fF -C1136 pd_div_0/divider_0/and_0/OUT pd_div_0/divider_0/prescaler_0/tspc_0/Q 0.04fF -C1137 pd_div_0/divider_0/prescaler_0/tspc_1/Z3 pd_div_0/divider_0/clk 0.45fF -C1138 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/tspc_1/Z3 0.05fF -C1139 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF -C1140 divbuf_5/OUT5 divbuf_5/OUT 43.38fF -C1141 ro_div_0/ro_complete_0/cbank_1/switch_4/vin ro_div_0/ro_complete_0/cbank_1/switch_5/vin 0.20fF -C1142 divider_0/nor_1/A divider_0/tspc_0/Z2 0.23fF -C1143 divider_0/prescaler_0/tspc_2/Z4 divider_0/clk 0.12fF -C1144 pd_0/DOWN pd_0/R 0.36fF -C1145 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/Z4 0.20fF -C1146 pd_0/DIV pd_0/tspc_r_0/z5 0.04fF -C1147 pd_0/tspc_r_0/Z1 pd_0/tspc_r_0/Z2 0.71fF -C1148 pd_div_0/divider_0/tspc_1/a_630_n680# pd_div_0/divider_0/tspc_1/Q 0.04fF -C1149 pd_div_0/divider_0/tspc_2/a_630_n680# pd_div_0/divider_0/nor_0/B 0.35fF -C1150 pll_full_0/ro_complete_0/cbank_1/switch_5/vin pll_full_0/divider_0/clk 1.46fF -C1151 divbuf_7/a_492_n240# divbuf_7/IN 0.13fF -C1152 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/clk 0.51fF -C1153 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/DOWN 0.11fF -C1154 pll_full_0/pd_0/tspc_r_0/Z2 pll_full_0/pd_0/tspc_r_0/Z3 0.25fF -C1155 divider_0/nor_0/Z1 divider_0/nor_0/B 0.06fF -C1156 ro_div_0/divider_0/tspc_0/Z3 ro_div_0/divider_0/tspc_0/Z4 0.65fF -C1157 pll_full_0/ro_complete_0/cbank_2/switch_0/vin pll_full_0/ro_complete_0/cbank_2/switch_1/vin 0.19fF -C1158 divbuf_0/OUT5 divbuf_0/OUT4 20.26fF -C1159 pll_full_0/divbuf_1/OUT pll_full_0/divbuf_1/OUT2 0.06fF -C1160 pd_div_0/divider_0/mc2 pd_div_0/divider_0/nor_1/B 0.06fF -C1161 pd_0/tspc_r_0/Z4 pd_0/tspc_r_1/Z4 0.02fF -C1162 pd_0/DOWN pd_0/and_pd_0/Out1 0.12fF -C1163 pd_0/tspc_r_1/Qbar1 pd_0/UP 0.11fF -C1164 pd_0/REF pd_0/tspc_r_1/Z1 0.17fF -C1165 pd_div_0/divider_0/prescaler_0/m1_2700_2190# pd_div_0/divider_0/and_0/OUT 0.14fF -C1166 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/switch_2/vin 0.20fF -C1167 pd_div_0/divider_0/prescaler_0/Out pd_div_0/divider_0/tspc_0/Z2 0.11fF -C1168 ro_div_0/ro_complete_0/cbank_2/switch_5/vin ro_div_0/ro_complete_0/cbank_2/v 1.30fF -C1169 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/pd_0/tspc_r_1/z5 0.20fF -C1170 pll_full_0/pd_0/R pll_full_0/pd_0/DIV 0.51fF -C1171 divider_0/nor_1/Z1 divider_0/and_0/B 0.18fF -C1172 divider_0/nor_1/B divider_0/nor_0/B 0.47fF -C1173 divider_0/tspc_0/Z4 divider_0/tspc_0/Z2 0.36fF -C1174 divider_0/tspc_0/Q divider_0/tspc_0/Z3 0.05fF -C1175 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_2/Z4 0.65fF -C1176 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/clk 0.01fF -C1177 divbuf_2/OUT5 divbuf_2/OUT2 0.02fF -C1178 ro_div_0/divider_0/nor_1/A ro_div_0/divider_0/and_0/A 0.01fF -C1179 divbuf_0/OUT3 divbuf_0/OUT 0.26fF -C1180 divbuf_4/OUT4 divbuf_4/OUT5 20.26fF -C1181 pd_div_0/divider_0/tspc_0/Z1 pd_div_0/divider_0/tspc_0/Z2 1.07fF -C1182 pd_div_0/divider_0/prescaler_0/tspc_0/Z4 pd_div_0/divider_0/clk 0.12fF -C1183 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/cbank_0/switch_5/vin 0.20fF -C1184 divbuf_5/a_492_n240# divbuf_5/OUT2 0.42fF -C1185 pll_full_0/divider_0/prescaler_0/tspc_0/Q pll_full_0/divider_0/prescaler_0/nand_1/z1 0.01fF -C1186 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/Out 0.05fF -C1187 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/clk 0.11fF -C1188 divider_0/tspc_0/Q divider_0/nor_1/B 0.22fF -C1189 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_0/Z4 0.08fF -C1190 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Z3 0.05fF -C1191 ro_div_0/divider_0/prescaler_0/m1_2700_2190# ro_div_0/divider_0/nor_1/A 0.01fF -C1192 ro_div_0/divider_0/prescaler_0/tspc_1/Z1 ro_div_0/divider_0/prescaler_0/tspc_1/Z4 0.00fF -C1193 divbuf_0/OUT5 divbuf_0/IN 0.00fF -C1194 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/switch_4/vin 0.13fF -C1195 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.36fF -C1196 pd_div_0/divider_0/nor_1/A pd_div_0/divider_0/prescaler_0/Out 0.15fF -C1197 pd_div_0/divider_0/prescaler_0/tspc_2/Z3 pd_div_0/divider_0/clk 0.64fF -C1198 divbuf_6/IN divbuf_6/OUT5 0.00fF -C1199 divider_0/tspc_0/Z4 divider_0/nor_1/A 0.21fF -C1200 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/Z3 0.33fF -C1201 pd_div_0/pd_0/UP pd_div_0/pd_0/and_pd_0/Out1 0.33fF -C1202 ro_div_0/divider_0/prescaler_0/tspc_2/Z1 ro_div_0/divider_0/prescaler_0/tspc_2/Z3 0.06fF -C1203 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF -C1204 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Z4 0.20fF -C1205 divider_0/and_0/OUT divider_0/and_0/Z1 0.04fF -C1206 divider_0/nor_0/B divider_0/tspc_2/Z2 0.40fF -C1207 divider_0/tspc_2/a_630_n680# divider_0/Out 0.04fF -C1208 divider_0/prescaler_0/tspc_0/Q divider_0/clk 0.05fF -C1209 ro_complete_0/a5 ro_complete_0/cbank_2/v 0.08fF -C1210 ro_complete_0/a0 ro_complete_0/cbank_1/switch_5/vin 0.09fF -C1211 pd_0/R pd_0/tspc_r_1/Z3 0.29fF -C1212 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/IN 5.26fF -C1213 pd_div_0/divider_0/tspc_0/Z1 pd_div_0/divider_0/nor_1/A 0.03fF -C1214 pd_div_0/divider_0/prescaler_0/tspc_1/Z3 pd_div_0/divider_0/prescaler_0/tspc_1/Z4 0.65fF -C1215 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/and_0/B 0.18fF -C1216 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/tspc_0/Z2 0.36fF -C1217 pll_full_0/divider_0/tspc_0/Q pll_full_0/divider_0/tspc_0/Z3 0.05fF -C1218 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.06fF -C1219 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.16fF -C1220 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/clk 0.01fF -C1221 pll_full_0/pd_0/tspc_r_0/z5 pll_full_0/pd_0/tspc_r_0/Z3 0.11fF -C1222 divider_0/tspc_1/Z2 divider_0/nor_1/A 0.15fF -C1223 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/nand_0/z1 0.07fF -C1224 divider_0/mc2 divider_0/and_0/B 0.20fF -C1225 pd_div_0/pd_0/REF pd_div_0/pd_0/tspc_r_1/Z4 0.02fF -C1226 ro_div_0/divider_0/prescaler_0/tspc_0/Z1 ro_div_0/divider_0/prescaler_0/tspc_0/Z2 1.07fF -C1227 ro_div_0/divider_0/prescaler_0/tspc_0/a_630_n680# ro_div_0/divider_0/prescaler_0/tspc_0/Z4 0.12fF -C1228 io_clamp_low[0] io_analog[4] 0.53fF -C1229 divbuf_2/OUT5 divbuf_2/OUT4 20.26fF -C1230 pd_div_0/pd_0/tspc_r_0/Qbar1 pd_div_0/pd_0/DOWN 0.11fF -C1231 ro_div_0/divider_0/and_0/OUT ro_div_0/divider_0/prescaler_0/tspc_0/Q 0.04fF -C1232 ro_div_0/divider_0/prescaler_0/tspc_1/Z3 ro_div_0/divider_0/clk 0.45fF -C1233 divbuf_7/OUT5 divbuf_7/OUT 43.38fF -C1234 ro_complete_0/cbank_2/switch_4/vin ro_complete_0/cbank_2/v 1.30fF -C1235 pll_full_0/divider_0/tspc_0/Q pll_full_0/divider_0/nor_1/B 0.22fF -C1236 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.08fF -C1237 pd_div_0/divider_0/tspc_0/Z4 pd_div_0/divider_0/prescaler_0/Out 0.12fF -C1238 pd_div_0/divider_0/prescaler_0/tspc_2/Z1 pd_div_0/divider_0/prescaler_0/tspc_2/Z4 0.00fF -C1239 pd_div_0/divider_0/prescaler_0/tspc_1/Z3 pd_div_0/divider_0/prescaler_0/tspc_1/Q 0.21fF -C1240 ro_div_0/ro_complete_0/cbank_0/switch_0/vin ro_div_0/ro_complete_0/cbank_0/switch_1/vin 0.19fF -C1241 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/switch_4/vin 0.20fF -C1242 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 pll_full_0/divider_0/prescaler_0/Out 0.28fF -C1243 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Z4 0.20fF -C1244 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/z5 0.04fF -C1245 pd_div_0/divider_0/and_0/B pd_div_0/divider_0/and_0/Z1 0.07fF -C1246 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_0/Qbar1 0.01fF -C1247 divider_0/nor_0/Z1 divider_0/nor_1/B 0.18fF -C1248 divider_0/prescaler_0/tspc_2/Z4 divider_0/prescaler_0/tspc_1/Q 0.21fF -C1249 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/D 0.03fF -C1250 divider_0/prescaler_0/m1_2700_2190# divider_0/clk 0.01fF -C1251 ro_div_0/divider_0/tspc_2/a_630_n680# ro_div_0/divider_0/nor_0/B 0.35fF -C1252 pd_div_0/divider_0/tspc_0/Z4 pd_div_0/divider_0/tspc_0/Z1 0.00fF -C1253 pd_div_0/divider_0/prescaler_0/tspc_0/a_740_n680# pd_div_0/divider_0/prescaler_0/tspc_0/Z3 0.33fF -C1254 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/nor_1/A 0.21fF -C1255 divbuf_7/OUT5 divbuf_7/IN 0.00fF -C1256 pd_div_0/divider_0/prescaler_0/tspc_1/Z4 pd_div_0/divider_0/clk 0.12fF -C1257 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/B 0.01fF -C1258 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/Out 0.91fF -C1259 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Z2 0.19fF -C1260 divider_0/tspc_0/Q divider_0/tspc_1/Z3 0.45fF -C1261 pd_div_0/div pd_div_0/divbuf_0/OUT3 0.26fF -C1262 ro_div_0/divider_0/prescaler_0/m1_2700_2190# ro_div_0/divider_0/and_0/OUT 0.14fF -C1263 pd_div_0/divbuf_0/OUT4 pd_div_0/divbuf_0/OUT3 5.16fF -C1264 cp_0/a_1710_0# cp_0/a_10_n50# 0.04fF -C1265 pd_0/tspc_r_0/Qbar1 pd_0/tspc_r_0/z5 0.20fF -C1266 pd_div_0/divider_0/mc2 pd_div_0/divider_0/and_0/A 0.16fF -C1267 ro_div_0/ro_complete_0/cbank_1/switch_0/vin ro_div_0/ro_complete_0/cbank_1/switch_1/vin 0.19fF -C1268 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF -C1269 divbuf_4/OUT3 divbuf_4/OUT 0.26fF -C1270 divbuf_2/IN divbuf_2/a_492_n240# 0.13fF -C1271 pd_div_0/divider_0/tspc_2/a_630_n680# pd_div_0/divider_0/tspc_2/Z2 0.01fF -C1272 pd_div_0/divider_0/prescaler_0/tspc_1/Q pd_div_0/divider_0/clk 0.60fF -C1273 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_0/Z3 0.45fF -C1274 divider_0/prescaler_0/tspc_0/Z2 divider_0/and_0/OUT 0.05fF -C1275 pd_div_0/pd_0/tspc_r_1/Z4 pd_div_0/pd_0/tspc_r_1/z5 0.04fF -C1276 ro_div_0/ro_complete_0/cbank_2/v ro_div_0/divider_0/clk 1.36fF -C1277 divbuf_0/OUT5 divbuf_0/OUT 43.38fF -C1278 ro_complete_0/cbank_0/v ro_complete_0/cbank_2/v 0.04fF -C1279 pll_full_0/divbuf_0/OUT3 pll_full_0/divbuf_0/OUT5 0.01fF -C1280 cp_0/a_10_n50# cp_0/vbias 0.19fF -C1281 pd_0/tspc_r_0/z5 pd_0/tspc_r_1/z5 0.02fF -C1282 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/Z2 0.25fF -C1283 pd_div_0/divider_0/prescaler_0/m1_2700_2190# pd_div_0/divider_0/prescaler_0/tspc_0/D 0.16fF -C1284 pd_div_0/divider_0/prescaler_0/tspc_0/Z3 pd_div_0/divider_0/prescaler_0/tspc_0/Q 0.05fF -C1285 pll_full_0/divider_0/tspc_0/Z1 pll_full_0/divider_0/tspc_0/Z3 0.06fF -C1286 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.06fF -C1287 pd_div_0/divider_0/and_0/out1 pd_div_0/divider_0/and_0/A 0.01fF -C1288 pd_div_0/pd_0/REF pd_div_0/pd_0/tspc_r_1/Z3 0.65fF -C1289 divider_0/nor_1/A divider_0/tspc_1/Z4 0.02fF -C1290 divider_0/nor_1/B divider_0/tspc_2/Z2 0.20fF -C1291 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/clk 0.01fF -C1292 divbuf_0/OUT4 divbuf_0/OUT 1.11fF -C1293 pll_full_0/cp_0/a_1710_0# pll_full_0/cp_0/down 0.32fF -C1294 divbuf_1/OUT4 divbuf_1/OUT3 5.16fF -C1295 pd_div_0/pd_0/tspc_r_1/Z4 pd_div_0/pd_0/tspc_r_1/Z2 0.14fF -C1296 ro_div_0/divider_0/tspc_0/Z2 ro_div_0/divider_0/prescaler_0/Out 0.11fF -C1297 ro_div_0/divider_0/prescaler_0/tspc_2/Z3 ro_div_0/divider_0/clk 0.64fF -C1298 pd_div_0/divider_0/prescaler_0/tspc_2/Z3 pd_div_0/divider_0/prescaler_0/tspc_1/Q 0.13fF -C1299 pll_full_0/divider_0/tspc_0/Q pll_full_0/divider_0/tspc_1/Z3 0.45fF -C1300 pll_full_0/ro_complete_0/a2 pll_full_0/divider_0/clk 0.11fF -C1301 ro_complete_0/a5 ro_complete_0/cbank_1/switch_0/vin 0.09fF -C1302 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/cbank_0/v 1.30fF -C1303 pll_full_0/divider_0/prescaler_0/tspc_2/D pll_full_0/divider_0/prescaler_0/nand_1/z1 0.21fF -C1304 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/Z2 1.07fF -C1305 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Z4 0.12fF -C1306 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF -C1307 pll_full_0/pd_0/UP pll_full_0/pd_0/tspc_r_1/Qbar 0.21fF -C1308 divider_0/tspc_0/a_630_n680# divider_0/prescaler_0/Out 0.01fF -C1309 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/tspc_0/Q 0.19fF -C1310 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/clk 0.14fF -C1311 pd_div_0/pd_0/REF pd_div_0/pd_0/R 0.61fF -C1312 ro_div_0/divider_0/prescaler_0/tspc_1/Z3 ro_div_0/divider_0/prescaler_0/tspc_1/Z4 0.65fF -C1313 ro_div_0/ro_complete_0/a1 ro_div_0/divider_0/clk 0.05fF -C1314 ro_div_0/ro_complete_0/cbank_1/switch_1/vin ro_div_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF -C1315 pd_0/DIV pd_0/tspc_r_0/Qbar1 0.12fF -C1316 divbuf_4/OUT5 divbuf_4/IN 0.00fF -C1317 pd_div_0/divider_0/nor_1/A pd_div_0/divider_0/tspc_0/Z2 0.23fF -C1318 pd_div_0/divider_0/prescaler_0/tspc_2/Z4 pd_div_0/divider_0/clk 0.12fF -C1319 pll_full_0/ro_complete_0/a0 pll_full_0/divider_0/clk 0.01fF -C1320 divbuf_6/OUT3 divbuf_6/OUT5 0.01fF -C1321 divbuf_6/OUT2 divbuf_6/OUT 0.06fF -C1322 ro_div_0/ro_complete_0/a1 ro_div_0/ro_complete_0/cbank_2/v 0.05fF -C1323 divider_0/tspc_1/Z1 divider_0/tspc_1/Z2 1.07fF -C1324 divider_0/nor_1/B divider_0/tspc_1/Z3 0.38fF -C1325 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/Z4 0.08fF -C1326 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Z3 0.05fF -C1327 ro_div_0/divider_0/prescaler_0/tspc_2/Z1 ro_div_0/divider_0/prescaler_0/tspc_2/Z4 0.00fF -C1328 ro_div_0/divider_0/prescaler_0/tspc_1/Z3 ro_div_0/divider_0/prescaler_0/tspc_1/Q 0.21fF -C1329 pll_full_0/pd_0/tspc_r_0/Z1 pll_full_0/pd_0/DIV 0.17fF -C1330 divider_0/tspc_2/Z1 divider_0/tspc_2/Z3 0.06fF -C1331 divider_0/nor_0/B divider_0/Out 0.22fF -C1332 divider_0/prescaler_0/tspc_2/D divider_0/clk 0.29fF -C1333 ro_div_0/divbuf_0/a_492_n240# ro_div_0/divbuf_0/OUT5 0.01fF -C1334 ro_complete_0/a0 ro_complete_0/cbank_1/v 0.05fF -C1335 pd_div_0/divider_0/mc2 pd_div_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.33fF -C1336 ro_div_0/divider_0/and_0/B ro_div_0/divider_0/and_0/Z1 0.07fF -C1337 pd_0/R pd_0/UP 0.45fF -C1338 ro_complete_0/a2 ro_complete_0/cbank_1/switch_3/vin 0.09fF -C1339 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.36fF -C1340 io_clamp_low[1] io_clamp_high[1] 0.53fF -C1341 pd_div_0/pd_0/tspc_r_1/Z3 pd_div_0/pd_0/tspc_r_1/z5 0.11fF -C1342 ro_div_0/divider_0/prescaler_0/tspc_0/Z2 ro_div_0/divider_0/prescaler_0/tspc_0/Z3 0.16fF -C1343 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/pd_0/UP 0.11fF -C1344 pll_full_0/pd_0/tspc_r_0/z5 pll_full_0/pd_0/DOWN 0.03fF -C1345 divider_0/tspc_1/Z2 divider_0/tspc_1/Z4 0.36fF -C1346 divider_0/prescaler_0/tspc_1/Z2 divider_0/and_0/OUT 0.06fF -C1347 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/Z3 0.33fF -C1348 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/Q 0.38fF -C1349 pd_div_0/pd_0/tspc_r_0/Z3 pd_div_0/pd_0/DOWN 0.03fF -C1350 ro_div_0/divider_0/prescaler_0/tspc_1/Z4 ro_div_0/divider_0/clk 0.12fF -C1351 pll_full_0/ro_complete_0/cbank_2/switch_0/vin pll_full_0/ro_complete_0/cbank_2/v 1.44fF -C1352 divider_0/and_0/out1 divider_0/and_0/Z1 0.36fF -C1353 ro_div_0/ro_complete_0/cbank_0/switch_2/vin ro_div_0/ro_complete_0/cbank_0/v 1.30fF -C1354 ro_div_0/ro_complete_0/cbank_1/switch_3/vin ro_div_0/divider_0/clk 1.30fF -C1355 pd_0/UP pd_0/and_pd_0/Out1 0.33fF -C1356 pd_div_0/divider_0/nor_1/Z1 pd_div_0/divider_0/and_0/B 0.18fF -C1357 pd_div_0/divider_0/nor_1/B pd_div_0/divider_0/nor_0/B 0.47fF -C1358 pd_div_0/divider_0/tspc_0/Z4 pd_div_0/divider_0/tspc_0/Z2 0.36fF -C1359 pd_div_0/divider_0/tspc_0/Q pd_div_0/divider_0/tspc_0/Z3 0.05fF -C1360 pd_div_0/divider_0/prescaler_0/tspc_2/Z3 pd_div_0/divider_0/prescaler_0/tspc_2/Z4 0.65fF -C1361 pd_div_0/divider_0/prescaler_0/tspc_0/a_740_n680# pd_div_0/divider_0/clk 0.01fF -C1362 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z2 0.01fF -C1363 ro_div_0/ro_complete_0/cbank_0/switch_3/vin ro_div_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF -C1364 ro_div_0/ro_complete_0/a4 ro_div_0/ro_complete_0/cbank_0/switch_1/vin 0.09fF -C1365 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_0/Z2 0.21fF -C1366 pd_div_0/pd_0/tspc_r_1/Z3 pd_div_0/pd_0/tspc_r_1/Z2 0.25fF -C1367 divider_0/tspc_1/Q divider_0/tspc_2/Z1 0.01fF -C1368 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_2/D 0.05fF -C1369 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/clk 0.01fF -C1370 divider_0/nor_1/B divider_0/and_0/A 0.26fF -C1371 ro_div_0/divider_0/tspc_2/a_630_n680# ro_div_0/divider_0/tspc_2/Z2 0.01fF -C1372 ro_div_0/divider_0/prescaler_0/tspc_1/Q ro_div_0/divider_0/clk 0.60fF -C1373 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/switch_1/vin 0.13fF -C1374 pd_div_0/divider_0/tspc_0/Q pd_div_0/divider_0/nor_1/B 0.22fF -C1375 pd_div_0/divider_0/prescaler_0/tspc_0/a_740_n680# pd_div_0/divider_0/prescaler_0/tspc_0/Z4 0.08fF -C1376 pd_div_0/divider_0/prescaler_0/tspc_0/a_630_n680# pd_div_0/divider_0/prescaler_0/tspc_0/Z3 0.05fF -C1377 divbuf_7/OUT divbuf_7/OUT2 0.06fF -C1378 divbuf_4/OUT5 divbuf_4/a_492_n240# 0.01fF -C1379 pll_full_0/ro_complete_0/a3 pll_full_0/divider_0/clk 0.11fF -C1380 ro_complete_0/a3 ro_complete_0/cbank_2/switch_2/vin 0.09fF -C1381 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_2/Z1 0.03fF -C1382 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z3 0.05fF -C1383 divider_0/mc2 divider_0/and_0/OUT 0.05fF -C1384 pd_div_0/pd_0/tspc_r_0/Z4 pd_div_0/pd_0/tspc_r_1/Z4 0.02fF -C1385 ro_div_0/divider_0/tspc_0/Z1 ro_div_0/divider_0/tspc_0/Z2 1.07fF -C1386 ro_div_0/divider_0/prescaler_0/m1_2700_2190# ro_div_0/divider_0/prescaler_0/tspc_0/D 0.16fF -C1387 ro_div_0/divbuf_0/OUT5 ro_div_0/divbuf_0/IN 0.00fF -C1388 pll_full_0/pd_0/DOWN pll_full_0/pd_0/tspc_r_1/Qbar 0.02fF -C1389 divider_0/nor_1/A divider_0/and_0/B 0.08fF -C1390 pd_div_0/pd_0/tspc_r_1/Z2 pd_div_0/pd_0/R 0.21fF -C1391 ro_div_0/divider_0/and_0/out1 ro_div_0/divider_0/and_0/A 0.01fF -C1392 ro_div_0/divbuf_0/OUT3 ro_div_0/divbuf_0/OUT5 0.01fF -C1393 ro_complete_0/a3 ro_complete_0/cbank_1/v 0.05fF -C1394 ro_div_0/ro_complete_0/a4 ro_div_0/divider_0/clk 0.05fF -C1395 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/switch_5/vin 0.09fF -C1396 pd_div_0/divider_0/tspc_0/Z4 pd_div_0/divider_0/nor_1/A 0.21fF -C1397 pd_div_0/divider_0/prescaler_0/m1_2700_2190# pd_div_0/divider_0/prescaler_0/tspc_1/Z3 0.33fF -C1398 ro_div_0/ro_complete_0/cbank_0/switch_0/vin ro_div_0/ro_complete_0/a4 0.12fF -C1399 divbuf_4/OUT5 divbuf_4/OUT 43.38fF -C1400 pd_div_0/divider_0/and_0/OUT pd_div_0/divider_0/and_0/Z1 0.04fF -C1401 pd_div_0/divider_0/nor_0/B pd_div_0/divider_0/tspc_2/Z2 0.40fF -C1402 pd_div_0/divider_0/tspc_2/a_630_n680# pd_div_0/bufin 0.04fF -C1403 pd_div_0/divider_0/prescaler_0/tspc_0/Q pd_div_0/divider_0/clk 0.05fF -C1404 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/B 0.18fF -C1405 pll_full_0/divider_0/tspc_0/Z2 pll_full_0/divider_0/tspc_0/Z3 0.16fF -C1406 ro_div_0/divider_0/prescaler_0/tspc_0/a_740_n680# ro_div_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.19fF -C1407 divider_0/tspc_1/Z1 divider_0/tspc_1/Z4 0.00fF -C1408 divider_0/prescaler_0/tspc_1/Z4 divider_0/prescaler_0/tspc_2/a_740_n680# 0.01fF -C1409 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_0/Q 0.20fF -C1410 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/D 0.09fF -C1411 ro_div_0/divider_0/prescaler_0/tspc_2/Z3 ro_div_0/divider_0/prescaler_0/tspc_1/Q 0.13fF -C1412 ro_div_0/ro_complete_0/a4 ro_div_0/ro_complete_0/cbank_2/v 0.05fF -C1413 ro_div_0/ro_complete_0/cbank_0/switch_2/vin ro_div_0/ro_complete_0/a3 0.09fF -C1414 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/switch_3/vin 0.09fF -C1415 pd_0/tspc_r_1/Qbar1 pd_0/tspc_r_1/Qbar 0.01fF -C1416 pd_div_0/divider_0/tspc_1/Z2 pd_div_0/divider_0/nor_1/A 0.15fF -C1417 pd_div_0/divider_0/prescaler_0/m1_2700_2190# pd_div_0/divider_0/prescaler_0/nand_0/z1 0.07fF -C1418 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/switch_4/vin 0.20fF -C1419 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Qbar1 0.38fF -C1420 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.03fF -C1421 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_2/a_630_n680# 0.01fF -C1422 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/Out 0.11fF -C1423 pd_div_0/pd_0/tspc_r_1/Z3 pd_div_0/pd_0/tspc_r_1/Qbar1 0.38fF +C0 pll_full_0/divider_0/and_0/A pll_full_0/divider_0/and_0/B 0.18fF +C1 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF +C2 divider_0/prescaler_0/Out divider_0/tspc_0/Z3 0.45fF +C3 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z1 ro_div_new_0/divider_0/prescaler_0/tspc_0/D 0.15fF +C4 ro_div_new_0/divider_0/tspc_0/Z2 ro_div_new_0/divider_0/tspc_0/Z4 0.36fF +C5 pll_full_0/divbuf_1/a_492_n240# pll_full_0/divbuf_1/OUT2 0.42fF +C6 pll_full_0/divbuf_1/OUT pll_full_0/divbuf_1/OUT4 1.11fF +C7 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/nor_1/B 0.06fF +C8 pll_full_0/divider_0/prescaler_0/tspc_0/D pll_full_0/divider_0/prescaler_0/nand_0/z1 0.24fF +C9 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/Out 0.19fF +C10 divider_0/mc2 divider_0/nor_1/B 0.06fF +C11 pll_full_0/pd_0/tspc_r_0/Z2 pll_full_0/pd_0/tspc_r_0/Z4 0.14fF +C12 divider_0/tspc_0/Z1 divider_0/tspc_0/Z3 0.06fF +C13 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_1/Q 0.06fF +C14 ro_div_new_0/divider_0/tspc_1/Z1 ro_div_new_0/divider_0/tspc_1/Z4 0.00fF +C15 ro_div_new_0/divider_0/tspc_0/a_630_n680# ro_div_new_0/divider_0/tspc_0/Z2 0.01fF +C16 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z2 ro_div_new_0/divider_0/prescaler_0/tspc_2/a_740_n680# 0.01fF +C17 ro_complete_0/a0 ro_complete_0/cbank_1/v 0.05fF +C18 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/tspc_1/Z2 0.01fF +C19 pll_full_0/ro_complete_0/cbank_1/switch_0/vin pll_full_0/divider_0/clk 1.61fF +C20 pll_full_0/divider_0/prescaler_0/tspc_0/D pll_full_0/divider_0/clk 0.26fF +C21 divbuf_6/a_492_n240# divbuf_6/OUT 0.00fF +C22 pd_0/tspc_r_1/Z1 pd_0/tspc_r_1/Z2 0.71fF +C23 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/Z4 0.20fF +C24 pd_0/REF pd_0/tspc_r_1/z5 0.04fF +C25 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/switch_4/vin 0.20fF +C26 divider_0/prescaler_0/tspc_2/D divider_0/prescaler_0/nand_1/z1 0.21fF +C27 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z2 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z4 0.36fF +C28 ro_div_new_0/divider_0/nor_0/Z1 ro_div_new_0/divider_0/nor_0/B 0.06fF +C29 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/a3 0.13fF +C30 pll_full_0/ro_complete_0/a1 pll_full_0/ro_complete_0/cbank_2/v 0.05fF +C31 divbuf_3/OUT2 divbuf_3/OUT3 1.37fF +C32 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.11fF +C33 divbuf_7/OUT4 divbuf_7/OUT 1.11fF +C34 ro_div_new_0/ro_complete_0/a4 ro_div_new_0/ro_complete_0/cbank_0/switch_1/vin 0.09fF +C35 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/OUT3 0.26fF +C36 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/divider_0/clk 1.46fF +C37 ro_div_new_0/divider_0/tspc_1/Z3 ro_div_new_0/divider_0/tspc_0/Q 0.45fF +C38 ro_div_new_0/divider_0/prescaler_0/tspc_2/a_740_n680# ro_div_new_0/divider_0/prescaler_0/Out 0.21fF +C39 ro_div_new_0/divider_0/nor_1/A ro_div_new_0/divider_0/and_0/A 0.01fF +C40 ro_complete_0/a4 ro_complete_0/cbank_2/switch_1/vin 0.09fF +C41 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/v 1.30fF +C42 ro_complete_0/cbank_0/switch_2/vin ro_complete_0/cbank_0/v 1.30fF +C43 divbuf_4/OUT2 divbuf_4/OUT3 1.37fF +C44 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/clk 0.45fF +C45 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/Z1 0.09fF +C46 pd_0/DIV pd_0/tspc_r_0/Z2 0.19fF +C47 ro_div_new_0/ro_complete_0/cbank_0/switch_1/vin ro_div_new_0/ro_complete_0/a3 0.13fF +C48 ro_div_new_0/ro_complete_0/cbank_0/switch_4/vin ro_div_new_0/ro_complete_0/cbank_0/v 1.30fF +C49 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/Z4 0.36fF +C50 divider_0/nor_1/Z1 divider_0/and_0/A 0.80fF +C51 ro_div_new_0/divider_0/mc2 ro_div_new_0/divider_0/and_0/A 0.16fF +C52 ro_div_new_0/divider_0/prescaler_0/tspc_1/a_630_n680# ro_div_new_0/divider_0/prescaler_0/tspc_1/Z4 0.12fF +C53 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z1 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z2 1.07fF +C54 ro_div_new_0/ro_complete_0/cbank_2/switch_5/vin ro_div_new_0/ro_complete_0/cbank_2/v 1.30fF +C55 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/a0 0.13fF +C56 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/switch_2/vin 0.20fF +C57 ro_div_new_0/divider_0/tspc_2/a_630_n680# ro_div_new_0/divider_0/tspc_2/Z4 0.12fF +C58 ro_div_new_0/divider_0/tspc_2/Z1 ro_div_new_0/divider_0/tspc_2/Z2 1.07fF +C59 ro_div_new_0/divider_0/nor_0/B ro_div_new_0/divider_0/tspc_2/Z3 0.38fF +C60 divbuf_2/OUT5 divbuf_2/OUT 43.38fF +C61 ro_complete_0/a3 ro_complete_0/cbank_1/v 0.05fF +C62 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.65fF +C63 divbuf_5/OUT5 divbuf_5/OUT 43.38fF +C64 pd_0/R pd_0/tspc_r_1/Qbar 0.03fF +C65 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Z2 0.01fF +C66 pll_full_0/pd_0/tspc_r_0/z5 pll_full_0/pd_0/tspc_r_0/Z4 0.04fF +C67 io_clamp_low[0] io_analog[4] 0.53fF +C68 ro_div_new_0/divider_0/prescaler_0/tspc_1/a_630_n680# ro_div_new_0/divider_0/prescaler_0/tspc_1/Q 0.04fF +C69 ro_div_new_0/ro_complete_0/cbank_0/v ro_div_new_0/divider_0/clk 1.27fF +C70 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/tspc_1/Z4 0.12fF +C71 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.00fF +C72 pll_full_0/ro_complete_0/cbank_0/v pll_full_0/divider_0/clk 1.27fF +C73 divbuf_7/a_492_n240# divbuf_7/IN 0.13fF +C74 pd_0/tspc_r_1/Qbar pd_0/and_pd_0/Out1 0.05fF +C75 divider_0/tspc_0/Q divider_0/nor_1/A 0.55fF +C76 cp_0/out cp_0/a_1710_n2840# 0.61fF +C77 ro_div_new_0/divider_0/tspc_0/Z1 ro_div_new_0/divider_0/nor_1/A 0.03fF +C78 pll_full_0/pd_0/UP pll_full_0/pd_0/and_pd_0/Z1 0.06fF +C79 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z3 0.05fF +C80 divider_0/nor_0/B divider_0/tspc_2/Z1 0.03fF +C81 pll_full_0/divbuf_0/OUT2 pll_full_0/divbuf_0/OUT5 0.02fF +C82 ro_div_new_0/divider_0/tspc_1/Q ro_div_new_0/divider_0/nor_0/B 0.22fF +C83 ro_div_new_0/divider_0/and_0/OUT ro_div_new_0/divider_0/prescaler_0/tspc_0/D 0.03fF +C84 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z2 ro_div_new_0/divider_0/prescaler_0/tspc_2/D 0.09fF +C85 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z1 ro_div_new_0/divider_0/prescaler_0/Out 0.08fF +C86 pll_full_0/ro_complete_0/cbank_2/switch_4/vin pll_full_0/ro_complete_0/cbank_2/switch_5/vin 0.20fF +C87 divbuf_0/IN divbuf_0/a_492_n240# 0.13fF +C88 ro_complete_0/cbank_2/switch_5/vin ro_complete_0/cbank_2/v 1.30fF +C89 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.06fF +C90 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/and_0/A 0.80fF +C91 divider_0/mc2 divider_0/and_0/A 0.16fF +C92 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z3 ro_div_new_0/divider_0/prescaler_0/tspc_0/D 0.05fF +C93 ro_div_new_0/ro_complete_0/a5 ro_div_new_0/divider_0/clk 0.10fF +C94 divider_0/and_0/out1 divider_0/and_0/B 0.18fF +C95 divider_0/tspc_0/Z2 divider_0/tspc_0/Z3 0.16fF +C96 ro_div_new_0/divider_0/and_0/OUT ro_div_new_0/divider_0/and_0/out1 0.31fF +C97 ro_complete_0/a2 ro_complete_0/cbank_2/v 0.05fF +C98 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/switch_4/vin 0.20fF +C99 divbuf_5/a_492_n240# divbuf_5/OUT2 0.42fF +C100 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/tspc_0/Q 0.04fF +C101 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/divider_0/clk 0.45fF +C102 pll_full_0/pd_0/tspc_r_0/Qbar pll_full_0/pd_0/tspc_r_0/Qbar1 0.01fF +C103 pll_full_0/divbuf_0/a_492_n240# pll_full_0/divbuf_0/OUT2 0.42fF +C104 divider_0/nor_1/A divider_0/prescaler_0/tspc_1/Q 0.03fF +C105 divider_0/tspc_1/Q divider_0/tspc_2/a_630_n680# 0.01fF +C106 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/Out 0.11fF +C107 filter_0/a_4216_n2998# filter_0/v 0.31fF +C108 ro_div_new_0/divider_0/tspc_1/Z2 ro_div_new_0/divider_0/tspc_1/Z3 0.16fF +C109 ro_div_new_0/divider_0/prescaler_0/tspc_0/a_630_n680# ro_div_new_0/divider_0/prescaler_0/tspc_0/Q 0.04fF +C110 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/switch_4/vin 0.20fF +C111 ro_div_new_0/divider_0/nor_0/B ro_div_new_0/divider_0/and_0/B 0.29fF +C112 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/tspc_1/Q 0.04fF +C113 pll_full_0/divider_0/tspc_0/Q pll_full_0/divider_0/nor_1/A 0.55fF +C114 divbuf_6/IN divbuf_6/OUT5 0.00fF +C115 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/nor_0/B 0.35fF +C116 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Z4 0.20fF +C117 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/z5 0.04fF +C118 divider_0/tspc_0/Q divider_0/tspc_1/Z2 0.14fF +C119 pd_0/R pd_0/and_pd_0/Z1 0.02fF +C120 pd_0/tspc_r_1/Qbar1 pd_0/tspc_r_1/z5 0.20fF +C121 ro_div_new_0/ro_complete_0/a2 ro_div_new_0/ro_complete_0/cbank_2/v 0.05fF +C122 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/a3 0.13fF +C123 divider_0/nor_1/A divider_0/tspc_0/Z3 0.38fF +C124 ro_complete_0/a5 ro_complete_0/cbank_1/switch_0/vin 0.09fF +C125 divbuf_1/IN divbuf_1/OUT5 0.00fF +C126 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/and_0/OUT 0.14fF +C127 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/and_0/B 0.78fF +C128 divbuf_3/OUT2 divbuf_3/OUT5 0.02fF +C129 divbuf_3/OUT3 divbuf_3/OUT4 5.16fF +C130 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_0/Z2 0.11fF +C131 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Z2 0.19fF +C132 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/tspc_2/a_740_n680# 0.01fF +C133 divider_0/nor_1/B divider_0/nor_1/A 1.21fF +C134 divbuf_1/OUT3 divbuf_1/OUT4 5.16fF +C135 pd_0/and_pd_0/Out1 pd_0/and_pd_0/Z1 0.18fF +C136 ro_div_new_0/divider_0/tspc_0/Z1 ro_div_new_0/divider_0/tspc_0/Z2 1.07fF +C137 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/OUT5 43.38fF +C138 pll_full_0/pd_0/DOWN pll_full_0/pd_0/and_pd_0/Z1 0.07fF +C139 ro_div_new_0/divider_0/prescaler_0/tspc_2/a_630_n680# ro_div_new_0/divider_0/prescaler_0/Out 0.04fF +C140 pll_full_0/pd_0/DIV pll_full_0/divider_0/and_0/OUT 0.01fF +C141 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/cbank_0/switch_5/vin 0.20fF +C142 pll_full_0/divider_0/tspc_0/Z1 pll_full_0/divider_0/tspc_0/Z2 1.07fF +C143 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_0/divider_0/clk 0.12fF +C144 divbuf_4/OUT2 divbuf_4/OUT5 0.02fF +C145 divbuf_4/OUT3 divbuf_4/OUT4 5.16fF +C146 pd_0/DIV pd_0/R 0.51fF +C147 divider_0/mc2 divider_0/prescaler_0/tspc_0/a_630_n680# 0.33fF +C148 pll_full_0/pd_0/UP pll_full_0/pd_0/tspc_r_1/z5 0.03fF +C149 divider_0/tspc_0/Z4 divider_0/tspc_0/Z3 0.65fF +C150 ro_complete_0/a5 ro_complete_0/cbank_2/v 0.08fF +C151 ro_div_new_0/divider_0/tspc_2/Z2 ro_div_new_0/divider_0/tspc_2/Z3 0.16fF +C152 ro_div_new_0/divider_0/nor_0/B ro_div_new_0/divider_0/tspc_2/Z4 0.22fF +C153 pll_full_0/divider_0/tspc_0/Q pll_full_0/divider_0/tspc_1/Z2 0.14fF +C154 pll_full_0/divbuf_0/OUT5 pll_full_0/divbuf_0/IN 0.00fF +C155 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/prescaler_0/Out 0.15fF +C156 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/clk 0.64fF +C157 pd_0/REF pd_0/tspc_r_1/Qbar1 0.12fF +C158 io_clamp_low[1] io_clamp_high[1] 0.53fF +C159 pll_full_0/divbuf_0/a_492_n240# pll_full_0/pd_0/DIV 0.00fF +C160 divider_0/tspc_0/Q divider_0/tspc_1/Z1 0.01fF +C161 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/pd_0/tspc_r_1/Qbar 0.01fF +C162 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/Out 0.21fF +C163 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z3 ro_div_new_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.33fF +C164 ro_div_new_0/divider_0/tspc_1/Z3 ro_div_new_0/divider_0/tspc_1/Z4 0.65fF +C165 ro_div_new_0/divider_0/prescaler_0/tspc_2/a_630_n680# ro_div_new_0/divider_0/prescaler_0/tspc_2/Z2 0.01fF +C166 ro_complete_0/a2 ro_complete_0/cbank_0/switch_2/vin 0.14fF +C167 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_1/switch_5/vin 0.09fF +C168 pll_full_0/divider_0/tspc_0/Z1 pll_full_0/divider_0/nor_1/A 0.03fF +C169 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.65fF +C170 divider_0/tspc_0/Q divider_0/tspc_1/Z4 0.15fF +C171 divider_0/nor_1/B divider_0/tspc_1/Z2 0.30fF +C172 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Z2 0.01fF +C173 pll_full_0/pd_0/DOWN pll_full_0/cp_0/a_1710_0# 0.04fF +C174 pll_full_0/pd_0/tspc_r_1/Z1 pll_full_0/pd_0/tspc_r_1/Z2 0.71fF +C175 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z4 0.12fF +C176 divider_0/tspc_2/Z1 divider_0/tspc_2/Z2 1.07fF +C177 divider_0/nor_0/B divider_0/tspc_2/Z3 0.38fF +C178 cp_0/down cp_0/upbar 0.02fF +C179 ro_div_new_0/divider_0/tspc_1/Q ro_div_new_0/divider_0/tspc_2/Z2 0.14fF +C180 ro_div_new_0/divider_0/and_0/OUT ro_div_new_0/divider_0/prescaler_0/nand_0/z1 0.01fF +C181 pll_full_0/divbuf_0/a_492_n240# pll_full_0/divbuf_0/IN 0.13fF +C182 pll_full_0/ro_complete_0/cbank_2/switch_4/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF +C183 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/tspc_0/Z3 0.65fF +C184 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.00fF +C185 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.21fF +C186 divbuf_4/a_492_n240# divbuf_4/IN 0.13fF +C187 pll_full_0/divider_0/and_0/B pll_full_0/divider_0/and_0/Z1 0.07fF +C188 ro_div_new_0/ro_complete_0/cbank_1/switch_1/vin ro_div_new_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF +C189 ro_div_new_0/divider_0/and_0/OUT ro_div_new_0/divider_0/clk 0.04fF +C190 divbuf_2/OUT5 divbuf_2/a_492_n240# 0.01fF +C191 pll_full_0/divider_0/tspc_0/Q pll_full_0/divider_0/tspc_1/Z1 0.01fF +C192 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 pll_full_0/divider_0/clk 0.12fF +C193 pd_0/DOWN pd_0/UP 0.46fF +C194 pd_0/tspc_r_0/Z4 pd_0/tspc_r_0/z5 0.04fF +C195 pll_full_0/pd_0/R pll_full_0/pd_0/and_pd_0/Z1 0.02fF +C196 divider_0/tspc_1/Q divider_0/nor_0/B 0.22fF +C197 divider_0/and_0/OUT divider_0/prescaler_0/tspc_0/D 0.03fF +C198 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/D 0.09fF +C199 ro_div_new_0/divider_0/nor_1/Z1 ro_div_new_0/divider_0/and_0/B 0.18fF +C200 ro_div_new_0/divider_0/tspc_1/Z3 ro_div_new_0/divider_0/tspc_1/Q 0.05fF +C201 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z3 ro_div_new_0/divider_0/clk 0.45fF +C202 divbuf_2/a_492_n240# divbuf_2/OUT 0.00fF +C203 divbuf_0/a_492_n240# divbuf_0/OUT5 0.01fF +C204 pll_full_0/divider_0/tspc_0/Q pll_full_0/divider_0/tspc_1/Z4 0.15fF +C205 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z2 0.01fF +C206 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/clk 0.60fF +C207 divbuf_6/OUT2 divbuf_6/OUT 0.06fF +C208 divbuf_6/OUT3 divbuf_6/OUT5 0.01fF +C209 divider_0/nor_1/B divider_0/tspc_1/Z1 0.03fF +C210 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF +C211 divider_0/and_0/OUT divider_0/and_0/out1 0.31fF +C212 divider_0/nor_1/A divider_0/and_0/A 0.01fF +C213 divbuf_1/OUT2 divbuf_1/OUT 0.06fF +C214 pll_full_0/ro_complete_0/cbank_0/v pll_full_0/ro_complete_0/cbank_2/v 0.04fF +C215 divbuf_3/OUT3 divbuf_3/OUT 0.26fF +C216 divbuf_3/OUT4 divbuf_3/OUT5 20.26fF +C217 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_0/D 0.16fF +C218 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_0/Q 0.05fF +C219 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/A 0.01fF +C220 divider_0/prescaler_0/m1_2700_2190# divider_0/nor_1/A 0.01fF +C221 divider_0/tspc_1/Z2 divider_0/tspc_1/Z3 0.16fF +C222 divider_0/nor_1/B divider_0/tspc_1/Z4 0.21fF +C223 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/D 0.15fF +C224 divider_0/nor_0/B divider_0/and_0/B 0.29fF +C225 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/a4 0.12fF +C226 cp_0/upbar cp_0/a_1710_n2840# 0.29fF +C227 divbuf_0/OUT divbuf_0/OUT4 1.11fF +C228 ro_complete_0/a4 ro_complete_0/cbank_1/switch_1/vin 0.09fF +C229 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/cbank_0/v 1.30fF +C230 divbuf_4/OUT3 divbuf_4/OUT 0.26fF +C231 divbuf_4/OUT4 divbuf_4/OUT5 20.26fF +C232 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.13fF +C233 pd_0/tspc_r_0/Qbar1 pd_0/R 0.01fF +C234 pd_0/DIV pd_0/tspc_r_0/Z4 0.02fF +C235 pd_0/DOWN pd_0/tspc_r_0/Qbar 0.21fF +C236 ro_div_new_0/divider_0/nor_1/B ro_div_new_0/divider_0/tspc_1/a_630_n680# 0.35fF +C237 ro_div_new_0/ro_complete_0/a2 ro_div_new_0/divider_0/clk 0.05fF +C238 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/switch_4/vin 0.20fF +C239 ro_div_new_0/divider_0/tspc_2/Z2 ro_div_new_0/divider_0/tspc_2/Z4 0.36fF +C240 ro_div_new_0/divider_0/tspc_2/Z3 ro_div_new_0/divider_0/Out 0.05fF +C241 ro_complete_0/a1 ro_complete_0/cbank_1/v 0.05fF +C242 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/divider_0/clk 1.32fF +C243 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_0/Z2 0.23fF +C244 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 pll_full_0/divider_0/clk 0.12fF +C245 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Qbar1 0.38fF +C246 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/Z3 0.06fF +C247 pd_0/tspc_r_1/Z3 pd_0/UP 0.03fF +C248 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z2 ro_div_new_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.01fF +C249 ro_div_new_0/ro_complete_0/a3 ro_div_new_0/ro_complete_0/cbank_2/switch_2/vin 0.09fF +C250 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/a2 0.09fF +C251 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/Out 0.04fF +C252 ro_complete_0/a2 ro_complete_0/cbank_2/switch_3/vin 0.09fF +C253 ro_div_new_0/divider_0/and_0/A ro_div_new_0/divider_0/and_0/B 0.18fF +C254 divbuf_7/a_492_n240# divbuf_7/OUT5 0.01fF +C255 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Z1 0.17fF +C256 divider_0/tspc_1/Z1 divider_0/tspc_1/Z3 0.06fF +C257 divider_0/nor_1/B divider_0/tspc_1/Q 0.51fF +C258 ro_div_new_0/ro_complete_0/cbank_2/switch_1/vin ro_div_new_0/ro_complete_0/cbank_2/v 1.30fF +C259 divider_0/tspc_2/Z2 divider_0/tspc_2/Z3 0.16fF +C260 divider_0/nor_0/B divider_0/tspc_2/Z4 0.22fF +C261 ro_div_new_0/divider_0/prescaler_0/tspc_0/D ro_div_new_0/divider_0/prescaler_0/nand_0/z1 0.24fF +C262 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z2 ro_div_new_0/divider_0/prescaler_0/Out 0.19fF +C263 ro_div_new_0/ro_complete_0/cbank_2/v ro_div_new_0/divider_0/clk 1.36fF +C264 pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF +C265 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/nor_0/B 0.47fF +C266 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.65fF +C267 pll_full_0/ro_complete_0/cbank_2/v pll_full_0/divider_0/clk 1.36fF +C268 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_1/Z2 0.21fF +C269 divider_0/tspc_1/Z3 divider_0/tspc_1/Z4 0.65fF +C270 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z2 0.01fF +C271 divider_0/nor_0/Z1 divider_0/and_0/B 0.78fF +C272 ro_div_new_0/ro_complete_0/a5 ro_div_new_0/ro_complete_0/cbank_2/switch_0/vin 0.09fF +C273 ro_div_new_0/ro_complete_0/cbank_1/switch_1/vin ro_div_new_0/divider_0/clk 1.30fF +C274 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/cbank_0/v 1.30fF +C275 ro_div_new_0/divider_0/prescaler_0/tspc_0/D ro_div_new_0/divider_0/clk 0.26fF +C276 pll_full_0/ro_complete_0/cbank_0/switch_2/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF +C277 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.05fF +C278 ro_complete_0/a3 ro_complete_0/cbank_2/switch_2/vin 0.09fF +C279 divbuf_5/a_492_n240# divbuf_5/OUT 0.00fF +C280 pd_0/R pd_0/REF 0.61fF +C281 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/DOWN 0.03fF +C282 divider_0/nor_1/B divider_0/and_0/B 0.31fF +C283 divider_0/tspc_1/Q divider_0/tspc_2/Z2 0.14fF +C284 divider_0/and_0/OUT divider_0/prescaler_0/nand_0/z1 0.01fF +C285 ro_div_new_0/ro_complete_0/cbank_1/switch_2/vin ro_div_new_0/divider_0/clk 1.30fF +C286 pll_full_0/pd_0/and_pd_0/Out1 pll_full_0/pd_0/and_pd_0/Z1 0.18fF +C287 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.33fF +C288 pll_full_0/ro_complete_0/cbank_1/switch_2/vin pll_full_0/divider_0/clk 1.46fF +C289 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/v 1.30fF +C290 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/Z1 0.04fF +C291 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divbuf_0/IN 0.04fF +C292 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_2/Z2 0.40fF +C293 pll_full_0/divider_0/prescaler_0/tspc_0/Q pll_full_0/divider_0/clk 0.05fF +C294 divbuf_6/OUT4 divbuf_6/OUT 1.11fF +C295 pll_full_0/pd_0/REF pll_full_0/pd_0/DOWN 1.48fF +C296 divider_0/tspc_0/Q divider_0/tspc_0/a_630_n680# 0.04fF +C297 divider_0/and_0/OUT divider_0/clk 0.04fF +C298 ro_div_new_0/divider_0/tspc_0/Z3 ro_div_new_0/divider_0/tspc_0/Z4 0.65fF +C299 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/nor_1/A 0.15fF +C300 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/nand_0/z1 0.07fF +C301 divbuf_3/OUT5 divbuf_3/OUT 43.38fF +C302 divider_0/tspc_1/Z3 divider_0/tspc_1/Q 0.05fF +C303 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_0/D 0.05fF +C304 ro_div_new_0/divider_0/tspc_0/Z3 ro_div_new_0/divider_0/tspc_0/a_630_n680# 0.05fF +C305 ro_div_new_0/divider_0/tspc_1/a_630_n680# ro_div_new_0/divider_0/tspc_0/Q 0.01fF +C306 pll_full_0/ro_complete_0/cbank_2/switch_5/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF +C307 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.21fF +C308 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.03fF +C309 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/clk 0.01fF +C310 divbuf_4/OUT5 divbuf_4/OUT 43.38fF +C311 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/z5 0.11fF +C312 pll_full_0/pd_0/UP pll_full_0/pd_0/DOWN 4.58fF +C313 divider_0/nor_1/B divider_0/tspc_2/Z4 0.02fF +C314 ro_complete_0/cbank_2/switch_0/vin ro_complete_0/a4 0.12fF +C315 pll_full_0/pd_0/DIV pll_full_0/divider_0/clk 2.26fF +C316 divbuf_0/OUT divbuf_0/OUT5 43.38fF +C317 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/v 1.30fF +C318 pll_full_0/divider_0/tspc_0/Q pll_full_0/divider_0/tspc_0/a_630_n680# 0.04fF +C319 divbuf_6/a_492_n240# divbuf_6/IN 0.13fF +C320 io_clamp_low[0] io_clamp_high[0] 0.53fF +C321 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/Z1 0.09fF +C322 pd_0/REF pd_0/tspc_r_1/Z2 0.19fF +C323 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/Z4 0.00fF +C324 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/ro_complete_0/a4 0.09fF +C325 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_1/switch_0/vin 0.09fF +C326 divider_0/tspc_0/a_630_n680# divider_0/tspc_0/Z3 0.05fF +C327 ro_div_new_0/ro_complete_0/cbank_0/switch_5/vin ro_div_new_0/ro_complete_0/a0 0.09fF +C328 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z1 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z3 0.06fF +C329 ro_div_new_0/divider_0/prescaler_0/tspc_0/a_740_n680# ro_div_new_0/divider_0/clk 0.01fF +C330 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/a4 0.09fF +C331 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF +C332 divbuf_3/a_492_n240# divbuf_3/OUT2 0.42fF +C333 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/and_0/OUT 0.05fF +C334 divbuf_7/OUT2 divbuf_7/OUT3 1.37fF +C335 ro_div_new_0/ro_complete_0/a5 ro_div_new_0/ro_complete_0/cbank_1/switch_0/vin 0.09fF +C336 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_0/Z3 0.27fF +C337 divider_0/nor_1/B divider_0/tspc_0/a_630_n680# 0.01fF +C338 divider_0/prescaler_0/tspc_1/Z1 divider_0/prescaler_0/tspc_1/Z3 0.06fF +C339 divider_0/tspc_2/Z2 divider_0/tspc_2/Z4 0.36fF +C340 divider_0/tspc_2/Z3 divider_0/Out 0.05fF +C341 ro_div_new_0/divider_0/prescaler_0/tspc_0/a_630_n680# ro_div_new_0/divider_0/prescaler_0/tspc_0/Z4 0.12fF +C342 ro_div_new_0/divider_0/nor_1/A ro_div_new_0/divider_0/prescaler_0/Out 0.15fF +C343 ro_div_new_0/divider_0/and_0/OUT ro_div_new_0/divider_0/prescaler_0/tspc_0/Q 0.04fF +C344 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z3 ro_div_new_0/divider_0/clk 0.45fF +C345 divbuf_2/OUT2 divbuf_2/OUT3 1.37fF +C346 divbuf_4/a_492_n240# divbuf_4/OUT5 0.01fF +C347 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_1/Z4 0.02fF +C348 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_2/Z2 0.20fF +C349 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/clk 0.01fF +C350 pd_0/DIV pd_0/tspc_r_0/Z3 0.65fF +C351 pll_full_0/pd_0/REF pll_full_0/pd_0/R 0.61fF +C352 ro_div_new_0/ro_complete_0/cbank_0/switch_1/vin ro_div_new_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF +C353 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/Z3 0.65fF +C354 divider_0/and_0/A divider_0/and_0/B 0.18fF +C355 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z3 ro_div_new_0/divider_0/prescaler_0/tspc_0/Q 0.05fF +C356 ro_div_new_0/divider_0/nor_1/B ro_div_new_0/divider_0/nor_1/A 1.21fF +C357 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/cbank_0/switch_5/vin 0.20fF +C358 ro_div_new_0/divider_0/tspc_2/a_630_n680# ro_div_new_0/divider_0/nor_0/B 0.35fF +C359 divbuf_2/OUT5 divbuf_2/IN 0.00fF +C360 ro_complete_0/a4 ro_complete_0/cbank_1/v 0.05fF +C361 ro_complete_0/cbank_0/switch_5/vin ro_complete_0/a0 0.09fF +C362 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.12fF +C363 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 1.07fF +C364 divbuf_5/IN divbuf_5/OUT5 0.00fF +C365 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/Out 0.01fF +C366 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/tspc_0/Q 0.19fF +C367 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/clk 0.14fF +C368 pd_0/DOWN pd_0/tspc_r_1/Qbar 0.02fF +C369 pd_0/R pd_0/tspc_r_1/Qbar1 0.30fF +C370 ro_div_new_0/divider_0/mc2 ro_div_new_0/divider_0/nor_1/B 0.06fF +C371 divider_0/prescaler_0/tspc_0/D divider_0/prescaler_0/nand_0/z1 0.24fF +C372 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/Out 0.19fF +C373 io_clamp_high[2] io_analog[6] 0.53fF +C374 ro_div_new_0/divider_0/tspc_1/Z2 ro_div_new_0/divider_0/tspc_1/a_630_n680# 0.01fF +C375 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z2 1.07fF +C376 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_1/Z3 0.38fF +C377 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.05fF +C378 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.08fF +C379 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z3 0.06fF +C380 pll_full_0/divider_0/nor_0/B pll_full_0/divbuf_0/IN 0.29fF +C381 pll_full_0/divider_0/prescaler_0/tspc_2/D pll_full_0/divider_0/clk 0.29fF +C382 pll_full_0/pd_0/R pll_full_0/pd_0/UP 0.46fF +C383 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Z2 0.01fF +C384 ro_div_new_0/ro_complete_0/a0 ro_div_new_0/ro_complete_0/cbank_2/switch_4/vin 0.13fF +C385 pll_full_0/pd_0/REF pll_full_0/divbuf_1/OUT5 0.00fF +C386 divider_0/prescaler_0/tspc_0/D divider_0/clk 0.26fF +C387 ro_div_new_0/divider_0/nor_1/B ro_div_new_0/divider_0/tspc_0/Q 0.22fF +C388 ro_div_new_0/divider_0/prescaler_0/m1_2700_2190# ro_div_new_0/divider_0/prescaler_0/Out 0.11fF +C389 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/cbank_0/v 1.30fF +C390 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/tspc_1/Z4 0.36fF +C391 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/and_0/OUT 0.06fF +C392 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.33fF +C393 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.38fF +C394 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/Z1 0.36fF +C395 divider_0/prescaler_0/tspc_0/Z4 divider_0/prescaler_0/tspc_0/D 0.11fF +C396 divbuf_1/OUT3 divbuf_1/OUT2 1.37fF +C397 pll_full_0/pd_0/DIV pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.03fF +C398 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF +C399 divbuf_0/OUT3 divbuf_0/OUT4 5.16fF +C400 ro_div_new_0/divider_0/tspc_0/Z2 ro_div_new_0/divider_0/prescaler_0/Out 0.11fF +C401 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z3 ro_div_new_0/divider_0/clk 0.64fF +C402 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_2/Z1 0.01fF +C403 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.05fF +C404 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/clk 0.01fF +C405 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/and_0/A 0.26fF +C406 pd_0/tspc_r_0/Z2 pd_0/R 0.21fF +C407 pd_0/DOWN pd_0/tspc_r_0/z5 0.03fF +C408 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z1 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z2 1.07fF +C409 ro_div_new_0/ro_complete_0/cbank_0/switch_3/vin ro_div_new_0/ro_complete_0/a1 0.14fF +C410 ro_div_new_0/ro_complete_0/cbank_0/switch_1/vin ro_div_new_0/ro_complete_0/cbank_0/v 1.30fF +C411 ro_div_new_0/ro_complete_0/cbank_0/switch_2/vin ro_div_new_0/ro_complete_0/a3 0.09fF +C412 divider_0/prescaler_0/tspc_0/Z3 divider_0/clk 0.45fF +C413 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z3 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z4 0.65fF +C414 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_2/switch_1/vin 0.09fF +C415 pll_full_0/ro_complete_0/a4 pll_full_0/divider_0/clk 0.11fF +C416 ro_complete_0/a0 ro_complete_0/cbank_2/switch_4/vin 0.13fF +C417 ro_complete_0/cbank_0/v ro_complete_0/cbank_1/v 1.27fF +C418 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/and_0/B 0.08fF +C419 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_0/Z4 0.65fF +C420 pd_0/DOWN pd_0/and_pd_0/Z1 0.07fF +C421 ro_div_new_0/divider_0/mc2 ro_div_new_0/divider_0/nor_1/A 0.04fF +C422 ro_div_new_0/divider_0/tspc_0/Z1 ro_div_new_0/divider_0/tspc_0/Z3 0.06fF +C423 divbuf_1/OUT3 divbuf_1/OUT 0.26fF +C424 divbuf_1/OUT4 divbuf_1/OUT5 20.26fF +C425 ro_div_new_0/divider_0/tspc_1/a_630_n680# ro_div_new_0/divider_0/tspc_1/Z4 0.12fF +C426 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z1 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z4 0.00fF +C427 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z3 ro_div_new_0/divider_0/prescaler_0/tspc_1/Q 0.21fF +C428 ro_div_new_0/divider_0/and_0/B ro_div_new_0/divider_0/and_0/Z1 0.07fF +C429 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z4 0.00fF +C430 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# 0.01fF +C431 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.09fF +C432 divbuf_7/OUT2 divbuf_7/OUT5 0.02fF +C433 divbuf_7/OUT3 divbuf_7/OUT4 5.16fF +C434 pll_full_0/pd_0/R pll_full_0/pd_0/DOWN 0.36fF +C435 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Z4 0.12fF +C436 divider_0/prescaler_0/tspc_1/Z1 divider_0/prescaler_0/tspc_1/Z4 0.00fF +C437 ro_complete_0/a5 ro_complete_0/cbank_0/switch_0/vin 0.09fF +C438 ro_div_new_0/ro_complete_0/cbank_2/switch_0/vin ro_div_new_0/ro_complete_0/cbank_2/v 1.44fF +C439 divbuf_1/a_492_n240# divbuf_1/IN 0.13fF +C440 ro_div_new_0/divider_0/nor_1/A ro_div_new_0/divider_0/tspc_0/Q 0.55fF +C441 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z4 ro_div_new_0/divider_0/clk 0.12fF +C442 pll_full_0/ro_complete_0/a5 pll_full_0/divider_0/clk 0.15fF +C443 divbuf_2/OUT2 divbuf_2/OUT5 0.02fF +C444 divbuf_2/OUT3 divbuf_2/OUT4 5.16fF +C445 divbuf_0/OUT divbuf_0/a_492_n240# 0.00fF +C446 ro_complete_0/cbank_1/switch_0/vin ro_complete_0/cbank_1/switch_1/vin 0.19fF +C447 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.15fF +C448 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/and_0/OUT 0.06fF +C449 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/Qbar1 0.38fF +C450 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z3 0.06fF +C451 ro_div_new_0/divider_0/prescaler_0/m1_2700_2190# ro_div_new_0/divider_0/nor_1/A 0.01fF +C452 ro_div_new_0/divider_0/nor_1/B ro_div_new_0/divider_0/tspc_1/Z2 0.30fF +C453 ro_div_new_0/divider_0/prescaler_0/tspc_1/a_630_n680# ro_div_new_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF +C454 ro_div_new_0/divider_0/tspc_2/a_630_n680# ro_div_new_0/divider_0/tspc_2/Z2 0.01fF +C455 ro_div_new_0/divider_0/prescaler_0/tspc_1/Q ro_div_new_0/divider_0/clk 0.60fF +C456 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.14fF +C457 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF +C458 divbuf_2/OUT2 divbuf_2/OUT 0.06fF +C459 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.16fF +C460 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/tspc_0/Z2 0.01fF +C461 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/tspc_2/D 0.32fF +C462 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/clk 0.01fF +C463 divbuf_5/OUT2 divbuf_5/OUT 0.06fF +C464 divbuf_5/OUT3 divbuf_5/OUT5 0.01fF +C465 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Z1 0.09fF +C466 divider_0/and_0/OUT divider_0/prescaler_0/tspc_0/Q 0.04fF +C467 divider_0/prescaler_0/tspc_1/Z3 divider_0/clk 0.45fF +C468 ro_div_new_0/ro_complete_0/cbank_2/switch_3/vin ro_div_new_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF +C469 io_clamp_low[1] io_analog[5] 0.53fF +C470 ro_div_new_0/divider_0/tspc_1/Q ro_div_new_0/divider_0/tspc_1/a_630_n680# 0.04fF +C471 ro_div_new_0/divider_0/nor_1/A ro_div_new_0/divider_0/tspc_0/Z2 0.23fF +C472 ro_div_new_0/ro_complete_0/cbank_1/switch_4/vin ro_div_new_0/divider_0/clk 1.30fF +C473 divbuf_1/a_492_n240# divbuf_1/OUT5 0.01fF +C474 ro_div_new_0/divider_0/and_0/out1 ro_div_new_0/divider_0/and_0/A 0.01fF +C475 pll_full_0/divbuf_1/OUT3 pll_full_0/divbuf_1/OUT5 0.01fF +C476 pll_full_0/divbuf_0/OUT3 pll_full_0/divbuf_0/OUT4 5.16fF +C477 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.12fF +C478 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 1.07fF +C479 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/nor_0/B 0.06fF +C480 pll_full_0/ro_complete_0/cbank_1/switch_4/vin pll_full_0/divider_0/clk 1.46fF +C481 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z4 0.00fF +C482 ro_div_new_0/ro_complete_0/cbank_0/switch_0/vin ro_div_new_0/ro_complete_0/cbank_0/switch_1/vin 0.19fF +C483 pd_0/tspc_r_1/Z4 pd_0/tspc_r_1/z5 0.04fF +C484 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Q 0.04fF +C485 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/OUT2 0.06fF +C486 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/a1 0.14fF +C487 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF +C488 pll_full_0/pd_0/UP pll_full_0/pd_0/and_pd_0/Out1 0.33fF +C489 divider_0/tspc_2/a_630_n680# divider_0/nor_0/B 0.35fF +C490 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z3 ro_div_new_0/divider_0/prescaler_0/tspc_1/Q 0.13fF +C491 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/nor_0/B 0.00fF +C492 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/nor_1/A 0.35fF +C493 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.05fF +C494 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.08fF +C495 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.04fF +C496 ro_div_new_0/divider_0/nor_0/Z1 ro_div_new_0/divider_0/nor_1/B 0.18fF +C497 divider_0/prescaler_0/m1_2700_2190# divider_0/and_0/OUT 0.14fF +C498 divider_0/prescaler_0/Out divider_0/tspc_0/Z2 0.11fF +C499 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z2 ro_div_new_0/divider_0/and_0/OUT 0.05fF +C500 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z4 ro_div_new_0/divider_0/clk 0.12fF +C501 pll_full_0/divbuf_1/OUT pll_full_0/divbuf_1/OUT3 0.26fF +C502 ro_complete_0/cbank_1/switch_2/vin ro_complete_0/cbank_1/switch_1/vin 0.20fF +C503 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_2/Z3 0.45fF +C504 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.11fF +C505 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/Out 0.08fF +C506 pd_0/tspc_r_0/Z2 pd_0/tspc_r_0/Z4 0.14fF +C507 ro_div_new_0/divider_0/mc2 ro_div_new_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.33fF +C508 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z2 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z3 0.16fF +C509 ro_div_new_0/ro_complete_0/cbank_2/switch_3/vin ro_div_new_0/ro_complete_0/a1 0.14fF +C510 pll_full_0/pd_0/tspc_r_1/Z4 pll_full_0/pd_0/tspc_r_1/z5 0.04fF +C511 divider_0/tspc_0/Z1 divider_0/tspc_0/Z2 1.07fF +C512 divider_0/prescaler_0/tspc_0/Z4 divider_0/clk 0.12fF +C513 ro_div_new_0/divider_0/nor_1/A ro_div_new_0/divider_0/tspc_1/Z2 0.15fF +C514 ro_div_new_0/divider_0/nor_1/B ro_div_new_0/divider_0/tspc_1/Z4 0.21fF +C515 ro_div_new_0/divider_0/prescaler_0/tspc_0/a_740_n680# ro_div_new_0/divider_0/prescaler_0/tspc_0/Q 0.20fF +C516 divbuf_0/OUT3 divbuf_0/OUT5 0.01fF +C517 pll_full_0/divbuf_1/OUT2 pll_full_0/divbuf_1/OUT3 1.37fF +C518 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.09fF +C519 divbuf_2/a_492_n240# divbuf_2/IN 0.13fF +C520 divbuf_6/a_492_n240# divbuf_6/OUT5 0.01fF +C521 ro_div_new_0/ro_complete_0/cbank_0/switch_0/vin ro_div_new_0/ro_complete_0/a4 0.12fF +C522 pd_0/R pd_0/and_pd_0/Out1 0.33fF +C523 pd_0/REF pd_0/tspc_r_1/Z4 0.02fF +C524 pd_0/UP pd_0/tspc_r_1/Qbar 0.21fF +C525 pll_full_0/pd_0/R pll_full_0/pd_0/DIV 0.51fF +C526 divider_0/mc2 divider_0/nor_1/A 0.04fF +C527 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z1 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z4 0.00fF +C528 pll_full_0/pd_0/tspc_r_1/Z4 pll_full_0/pd_0/tspc_r_1/Z2 0.14fF +C529 divider_0/nor_1/A divider_0/prescaler_0/Out 0.15fF +C530 divider_0/prescaler_0/tspc_2/Z3 divider_0/clk 0.64fF +C531 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z3 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z4 0.65fF +C532 divbuf_3/a_492_n240# divbuf_3/OUT 0.00fF +C533 divbuf_0/OUT2 divbuf_0/OUT5 0.02fF +C534 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Q 0.04fF +C535 divbuf_7/OUT3 divbuf_7/OUT 0.26fF +C536 divbuf_7/OUT4 divbuf_7/OUT5 20.26fF +C537 ro_div_new_0/ro_complete_0/cbank_1/switch_1/vin ro_div_new_0/ro_complete_0/cbank_1/switch_0/vin 0.19fF +C538 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/tspc_r_0/Z3 0.38fF +C539 divider_0/tspc_0/Z1 divider_0/nor_1/A 0.03fF +C540 divider_0/prescaler_0/tspc_1/Z3 divider_0/prescaler_0/tspc_1/Z4 0.65fF +C541 ro_div_new_0/ro_complete_0/a0 ro_div_new_0/ro_complete_0/cbank_2/switch_5/vin 0.09fF +C542 pll_full_0/pd_0/DOWN pll_full_0/pd_0/and_pd_0/Out1 0.12fF +C543 ro_div_new_0/divider_0/tspc_1/Z2 ro_div_new_0/divider_0/tspc_0/Q 0.14fF +C544 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/nor_1/B 0.18fF +C545 divbuf_2/OUT4 divbuf_2/OUT5 20.26fF +C546 ro_complete_0/a2 ro_complete_0/cbank_1/v 0.05fF +C547 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/clk 0.11fF +C548 pd_0/DIV pd_0/tspc_r_0/Z1 0.17fF +C549 pd_0/tspc_r_0/Qbar1 pd_0/DOWN 0.11fF +C550 ro_div_new_0/ro_complete_0/cbank_0/switch_3/vin ro_div_new_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF +C551 divider_0/tspc_0/Z4 divider_0/prescaler_0/Out 0.12fF +C552 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z4 0.00fF +C553 divider_0/prescaler_0/tspc_1/Z3 divider_0/prescaler_0/tspc_1/Q 0.21fF +C554 ro_complete_0/a5 ro_complete_0/cbank_2/switch_0/vin 0.09fF +C555 ro_div_new_0/divider_0/tspc_1/Z1 ro_div_new_0/divider_0/tspc_1/Z3 0.06fF +C556 ro_div_new_0/divider_0/nor_1/B ro_div_new_0/divider_0/tspc_1/Q 0.51fF +C557 pll_full_0/pd_0/tspc_r_1/Qbar pll_full_0/pd_0/and_pd_0/Z1 0.02fF +C558 divider_0/and_0/B divider_0/and_0/Z1 0.07fF +C559 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/IN 5.26fF +C560 ro_div_new_0/divider_0/and_0/OUT ro_div_new_0/divider_0/and_0/Z1 0.04fF +C561 ro_div_new_0/divider_0/tspc_2/a_630_n680# ro_div_new_0/divider_0/Out 0.04fF +C562 ro_div_new_0/divider_0/nor_0/B ro_div_new_0/divider_0/tspc_2/Z2 0.40fF +C563 ro_div_new_0/divider_0/prescaler_0/tspc_0/Q ro_div_new_0/divider_0/clk 0.05fF +C564 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/nor_1/B 0.35fF +C565 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.36fF +C566 divbuf_2/OUT4 divbuf_2/OUT 1.11fF +C567 divbuf_5/OUT4 divbuf_5/OUT 1.11fF +C568 pll_full_0/divider_0/prescaler_0/tspc_0/Q pll_full_0/divider_0/prescaler_0/tspc_2/D 0.04fF +C569 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/nand_1/z1 0.22fF +C570 divider_0/tspc_0/Z4 divider_0/tspc_0/Z1 0.00fF +C571 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_0/Z3 0.33fF +C572 pd_0/R pd_0/tspc_r_1/Z2 0.21fF +C573 ro_div_new_0/ro_complete_0/cbank_2/switch_1/vin ro_div_new_0/ro_complete_0/cbank_2/switch_0/vin 0.19fF +C574 divider_0/prescaler_0/tspc_1/Z4 divider_0/clk 0.12fF +C575 ro_div_new_0/divider_0/nor_1/A ro_div_new_0/divider_0/tspc_1/Z4 0.02fF +C576 pll_full_0/divbuf_0/OUT5 pll_full_0/divbuf_0/OUT4 20.26fF +C577 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_2/v 0.05fF +C578 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.16fF +C579 ro_complete_0/a0 ro_complete_0/cbank_2/switch_5/vin 0.09fF +C580 pll_full_0/divider_0/tspc_2/Z3 pll_full_0/divider_0/tspc_2/Z4 0.65fF +C581 pd_0/UP pd_0/and_pd_0/Z1 0.06fF +C582 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z2 0.01fF +C583 divider_0/prescaler_0/tspc_1/Q divider_0/clk 0.60fF +C584 ro_div_new_0/divider_0/nor_1/B ro_div_new_0/divider_0/and_0/B 0.31fF +C585 ro_div_new_0/divider_0/tspc_0/a_630_n680# ro_div_new_0/divider_0/tspc_0/Z4 0.12fF +C586 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z4 ro_div_new_0/divider_0/prescaler_0/tspc_1/Q 0.21fF +C587 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z1 ro_div_new_0/divider_0/prescaler_0/tspc_2/D 0.03fF +C588 ro_complete_0/cbank_2/switch_0/vin ro_complete_0/cbank_2/v 1.44fF +C589 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/prescaler_0/Out 0.12fF +C590 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.12fF +C591 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 1.07fF +C592 pll_full_0/pd_0/tspc_r_0/z5 pll_full_0/pd_0/tspc_r_1/z5 0.02fF +C593 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_0/D 0.16fF +C594 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_0/Q 0.05fF +C595 ro_div_new_0/divider_0/prescaler_0/m1_2700_2190# ro_div_new_0/divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF +C596 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z2 ro_div_new_0/divider_0/prescaler_0/tspc_0/D 0.09fF +C597 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_2/v 0.08fF +C598 divider_0/and_0/out1 divider_0/and_0/A 0.01fF +C599 ro_complete_0/a5 ro_complete_0/cbank_1/v 0.10fF +C600 ro_div_new_0/divider_0/tspc_1/Z4 ro_div_new_0/divider_0/tspc_0/Q 0.15fF +C601 pll_full_0/divbuf_1/OUT pll_full_0/divbuf_1/OUT5 43.38fF +C602 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/ro_complete_0/cbank_1/switch_4/vin 0.20fF +C603 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF +C604 pll_full_0/filter_0/a_4216_n5230# pll_full_0/divider_0/clk 1.58fF +C605 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/tspc_0/Z1 0.00fF +C606 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.33fF +C607 divbuf_2/OUT2 divbuf_2/a_492_n240# 0.42fF +C608 ro_complete_0/cbank_1/switch_0/vin ro_complete_0/cbank_1/v 1.45fF +C609 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_2/Z4 0.15fF +C610 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/divider_0/prescaler_0/Out 0.11fF +C611 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/clk 0.11fF +C612 divbuf_5/a_492_n240# divbuf_5/IN 0.13fF +C613 pll_full_0/pd_0/R pll_full_0/pd_0/and_pd_0/Out1 0.33fF +C614 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_1/Q 0.13fF +C615 ro_div_new_0/ro_complete_0/cbank_0/switch_3/vin ro_div_new_0/ro_complete_0/cbank_0/v 1.30fF +C616 ro_complete_0/a2 ro_complete_0/cbank_1/switch_3/vin 0.09fF +C617 pll_full_0/divbuf_1/OUT2 pll_full_0/divbuf_1/OUT5 0.02fF +C618 pll_full_0/ro_complete_0/cbank_0/switch_5/vin pll_full_0/ro_complete_0/a0 0.09fF +C619 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/tspc_1/Z3 0.05fF +C620 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF +C621 divbuf_6/OUT2 divbuf_6/OUT3 1.37fF +C622 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Z4 0.02fF +C623 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/z5 0.11fF +C624 divider_0/nor_1/A divider_0/tspc_0/Z2 0.23fF +C625 divider_0/prescaler_0/tspc_2/Z4 divider_0/clk 0.12fF +C626 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z3 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z4 0.65fF +C627 ro_div_new_0/divider_0/nor_1/B ro_div_new_0/divider_0/tspc_2/Z4 0.02fF +C628 ro_div_new_0/ro_complete_0/cbank_1/switch_5/vin ro_div_new_0/divider_0/clk 1.30fF +C629 pll_full_0/ro_complete_0/cbank_1/switch_5/vin pll_full_0/divider_0/clk 1.46fF +C630 divbuf_3/IN divbuf_3/OUT5 0.00fF +C631 ro_complete_0/cbank_1/v ro_complete_0/cbank_2/v 1.36fF +C632 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/clk 0.51fF +C633 divbuf_7/OUT5 divbuf_7/OUT 43.38fF +C634 pll_full_0/pd_0/tspc_r_0/Z2 pll_full_0/pd_0/tspc_r_0/Z3 0.25fF +C635 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/DOWN 0.11fF +C636 divider_0/nor_0/Z1 divider_0/nor_0/B 0.06fF +C637 pll_full_0/ro_complete_0/cbank_2/switch_0/vin pll_full_0/ro_complete_0/cbank_2/switch_1/vin 0.19fF +C638 ro_div_new_0/ro_complete_0/a0 ro_div_new_0/ro_complete_0/cbank_2/v 0.05fF +C639 ro_div_new_0/divider_0/nor_1/A ro_div_new_0/divider_0/and_0/B 0.08fF +C640 ro_div_new_0/divider_0/prescaler_0/tspc_1/Q ro_div_new_0/divider_0/prescaler_0/tspc_0/Q 0.19fF +C641 ro_div_new_0/divider_0/prescaler_0/tspc_2/a_740_n680# ro_div_new_0/divider_0/clk 0.14fF +C642 pll_full_0/divbuf_1/OUT pll_full_0/divbuf_1/OUT2 0.06fF +C643 divbuf_4/IN divbuf_4/OUT5 0.00fF +C644 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/Z2 0.25fF +C645 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/pd_0/tspc_r_1/z5 0.20fF +C646 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/Z1 0.17fF +C647 divider_0/nor_1/Z1 divider_0/and_0/B 0.18fF +C648 divider_0/nor_1/B divider_0/nor_0/B 0.47fF +C649 divider_0/tspc_0/Z4 divider_0/tspc_0/Z2 0.36fF +C650 divider_0/tspc_0/Q divider_0/tspc_0/Z3 0.05fF +C651 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_2/Z4 0.65fF +C652 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/clk 0.01fF +C653 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z1 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z3 0.06fF +C654 ro_div_new_0/divider_0/mc2 ro_div_new_0/divider_0/and_0/B 0.20fF +C655 ro_div_new_0/ro_complete_0/cbank_1/switch_0/vin ro_div_new_0/divider_0/clk 1.45fF +C656 ro_div_new_0/divider_0/tspc_2/Z1 ro_div_new_0/divider_0/tspc_2/Z3 0.06fF +C657 ro_div_new_0/divider_0/nor_0/B ro_div_new_0/divider_0/Out 0.22fF +C658 ro_div_new_0/divider_0/prescaler_0/tspc_2/D ro_div_new_0/divider_0/clk 0.29fF +C659 divbuf_0/a_492_n240# divbuf_0/OUT2 0.42fF +C660 ro_complete_0/cbank_1/switch_2/vin ro_complete_0/cbank_1/v 1.30fF +C661 pll_full_0/divider_0/prescaler_0/tspc_0/Q pll_full_0/divider_0/prescaler_0/nand_1/z1 0.01fF +C662 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/Out 0.05fF +C663 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/clk 0.11fF +C664 cp_0/out cp_0/a_1710_0# 0.84fF +C665 pd_0/REF pd_0/tspc_r_1/Z3 0.65fF +C666 divider_0/tspc_0/Q divider_0/nor_1/B 0.22fF +C667 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Z3 0.05fF +C668 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_0/Z4 0.08fF +C669 ro_div_new_0/ro_complete_0/a4 ro_div_new_0/ro_complete_0/cbank_2/v 0.05fF +C670 ro_div_new_0/ro_complete_0/cbank_2/switch_3/vin ro_div_new_0/ro_complete_0/cbank_2/switch_4/vin 0.20fF +C671 io_clamp_high[0] io_analog[4] 0.53fF +C672 ro_div_new_0/divider_0/tspc_1/Z2 ro_div_new_0/divider_0/tspc_1/Z4 0.36fF +C673 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z2 ro_div_new_0/divider_0/and_0/OUT 0.06fF +C674 ro_div_new_0/divider_0/prescaler_0/tspc_2/a_740_n680# ro_div_new_0/divider_0/prescaler_0/tspc_2/Z3 0.33fF +C675 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/cbank_0/switch_2/vin 0.20fF +C676 ro_div_new_0/divider_0/and_0/out1 ro_div_new_0/divider_0/and_0/Z1 0.36fF +C677 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/switch_4/vin 0.13fF +C678 ro_complete_0/a0 ro_complete_0/cbank_2/v 0.05fF +C679 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.36fF +C680 divbuf_7/a_492_n240# divbuf_7/OUT2 0.42fF +C681 ro_div_new_0/ro_complete_0/a4 ro_div_new_0/ro_complete_0/cbank_1/switch_1/vin 0.09fF +C682 divider_0/tspc_0/Z4 divider_0/nor_1/A 0.21fF +C683 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/Z3 0.33fF +C684 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF +C685 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Z4 0.20fF +C686 divider_0/and_0/OUT divider_0/and_0/Z1 0.04fF +C687 divider_0/tspc_2/a_630_n680# divider_0/Out 0.04fF +C688 divider_0/nor_0/B divider_0/tspc_2/Z2 0.40fF +C689 divider_0/prescaler_0/tspc_0/Q divider_0/clk 0.05fF +C690 ro_div_new_0/ro_complete_0/a3 ro_div_new_0/ro_complete_0/cbank_2/v 0.05fF +C691 ro_div_new_0/divider_0/tspc_1/Q ro_div_new_0/divider_0/tspc_2/Z1 0.01fF +C692 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z3 ro_div_new_0/divider_0/prescaler_0/tspc_2/D 0.05fF +C693 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/and_0/B 0.18fF +C694 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/tspc_0/Z2 0.36fF +C695 pll_full_0/divider_0/tspc_0/Q pll_full_0/divider_0/tspc_0/Z3 0.05fF +C696 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.06fF +C697 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.16fF +C698 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/clk 0.01fF +C699 ro_div_new_0/ro_complete_0/a2 ro_div_new_0/ro_complete_0/cbank_1/switch_3/vin 0.09fF +C700 pll_full_0/pd_0/tspc_r_0/z5 pll_full_0/pd_0/tspc_r_0/Z3 0.11fF +C701 divider_0/tspc_1/Z2 divider_0/nor_1/A 0.15fF +C702 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/nand_0/z1 0.07fF +C703 divider_0/mc2 divider_0/and_0/B 0.20fF +C704 pll_full_0/divider_0/tspc_0/Q pll_full_0/divider_0/nor_1/B 0.22fF +C705 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.08fF +C706 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 pll_full_0/divider_0/prescaler_0/Out 0.28fF +C707 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_0/Qbar1 0.01fF +C708 divider_0/nor_0/Z1 divider_0/nor_1/B 0.18fF +C709 ro_div_new_0/ro_complete_0/a3 ro_div_new_0/ro_complete_0/cbank_1/switch_2/vin 0.09fF +C710 divider_0/prescaler_0/tspc_2/Z4 divider_0/prescaler_0/tspc_1/Q 0.21fF +C711 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/D 0.03fF +C712 divider_0/prescaler_0/m1_2700_2190# divider_0/clk 0.01fF +C713 ro_div_new_0/divider_0/tspc_0/Z1 ro_div_new_0/divider_0/tspc_0/Z4 0.00fF +C714 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z4 ro_div_new_0/divider_0/prescaler_0/tspc_2/a_740_n680# 0.01fF +C715 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z4 ro_div_new_0/divider_0/prescaler_0/tspc_0/D 0.11fF +C716 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z2 ro_div_new_0/divider_0/clk 0.11fF +C717 ro_div_new_0/divider_0/nor_1/Z1 ro_div_new_0/divider_0/and_0/A 0.80fF +C718 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/a1 0.14fF +C719 ro_complete_0/cbank_2/switch_0/vin ro_complete_0/cbank_2/switch_1/vin 0.19fF +C720 ro_complete_0/a3 ro_complete_0/cbank_2/v 0.05fF +C721 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/nor_1/A 0.21fF +C722 divbuf_6/OUT2 divbuf_6/OUT5 0.02fF +C723 divbuf_6/OUT3 divbuf_6/OUT4 5.16fF +C724 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/B 0.01fF +C725 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/Out 0.91fF +C726 pd_0/UP pd_0/tspc_r_1/z5 0.03fF +C727 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/z5 0.11fF +C728 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/DIV 0.12fF +C729 divider_0/tspc_0/Q divider_0/tspc_1/Z3 0.45fF +C730 ro_div_new_0/ro_complete_0/cbank_1/switch_4/vin ro_div_new_0/ro_complete_0/cbank_1/switch_5/vin 0.20fF +C731 ro_div_new_0/divider_0/tspc_0/Z3 ro_div_new_0/divider_0/prescaler_0/Out 0.45fF +C732 ro_div_new_0/divider_0/prescaler_0/tspc_2/a_740_n680# ro_div_new_0/divider_0/prescaler_0/tspc_1/Q 0.15fF +C733 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z2 ro_div_new_0/divider_0/and_0/OUT 0.06fF +C734 divbuf_1/OUT2 divbuf_1/OUT5 0.02fF +C735 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/switch_2/vin 0.20fF +C736 divbuf_3/OUT2 divbuf_3/OUT 0.06fF +C737 divbuf_3/OUT3 divbuf_3/OUT5 0.01fF +C738 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF +C739 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_0/Z3 0.45fF +C740 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Z2 0.25fF +C741 divider_0/prescaler_0/tspc_0/Z2 divider_0/and_0/OUT 0.05fF +C742 ro_div_new_0/divider_0/prescaler_0/tspc_1/Q ro_div_new_0/divider_0/prescaler_0/tspc_2/D 0.32fF +C743 ro_div_new_0/divider_0/prescaler_0/tspc_2/a_630_n680# ro_div_new_0/divider_0/clk 0.01fF +C744 pll_full_0/divbuf_0/OUT3 pll_full_0/divbuf_0/OUT5 0.01fF +C745 ro_complete_0/a3 ro_complete_0/cbank_1/switch_2/vin 0.09fF +C746 divbuf_4/OUT2 divbuf_4/OUT 0.06fF +C747 divbuf_4/OUT3 divbuf_4/OUT5 0.01fF +C748 pll_full_0/divider_0/tspc_0/Z1 pll_full_0/divider_0/tspc_0/Z3 0.06fF +C749 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.06fF +C750 pd_0/tspc_r_0/Qbar1 pd_0/tspc_r_0/Qbar 0.01fF +C751 pd_0/tspc_r_0/Z3 pd_0/R 0.27fF +C752 ro_div_new_0/ro_complete_0/cbank_0/switch_4/vin ro_div_new_0/ro_complete_0/a0 0.13fF +C753 ro_div_new_0/ro_complete_0/cbank_1/switch_3/vin ro_div_new_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF +C754 divider_0/nor_1/A divider_0/tspc_1/Z4 0.02fF +C755 divider_0/nor_1/B divider_0/tspc_2/Z2 0.20fF +C756 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/clk 0.01fF +C757 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z1 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z4 0.00fF +C758 pll_full_0/cp_0/a_1710_0# pll_full_0/cp_0/down 0.32fF +C759 ro_div_new_0/divider_0/tspc_2/Z1 ro_div_new_0/divider_0/tspc_2/Z4 0.00fF +C760 pll_full_0/divider_0/tspc_0/Q pll_full_0/divider_0/tspc_1/Z3 0.45fF +C761 pll_full_0/ro_complete_0/a2 pll_full_0/divider_0/clk 0.11fF +C762 divbuf_1/OUT5 divbuf_1/OUT 43.38fF +C763 ro_complete_0/cbank_1/switch_4/vin ro_complete_0/cbank_1/switch_5/vin 0.20fF +C764 pll_full_0/divider_0/prescaler_0/tspc_2/D pll_full_0/divider_0/prescaler_0/nand_1/z1 0.21fF +C765 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Qbar1 0.12fF +C766 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Z4 0.12fF +C767 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/Z2 1.07fF +C768 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/Qbar1 0.38fF +C769 ro_div_new_0/ro_complete_0/cbank_0/switch_5/vin ro_div_new_0/ro_complete_0/cbank_0/v 1.30fF +C770 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF +C771 pll_full_0/pd_0/UP pll_full_0/pd_0/tspc_r_1/Qbar 0.21fF +C772 divider_0/tspc_0/a_630_n680# divider_0/prescaler_0/Out 0.01fF +C773 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/tspc_0/Q 0.19fF +C774 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/clk 0.14fF +C775 ro_div_new_0/divider_0/prescaler_0/tspc_2/a_630_n680# ro_div_new_0/divider_0/prescaler_0/tspc_2/Z3 0.05fF +C776 ro_div_new_0/divider_0/prescaler_0/tspc_2/a_740_n680# ro_div_new_0/divider_0/prescaler_0/tspc_2/Z4 0.08fF +C777 ro_div_new_0/ro_complete_0/a0 ro_div_new_0/divider_0/clk 0.05fF +C778 pll_full_0/ro_complete_0/a0 pll_full_0/divider_0/clk 0.01fF +C779 divider_0/tspc_1/Z1 divider_0/tspc_1/Z2 1.07fF +C780 divider_0/nor_1/B divider_0/tspc_1/Z3 0.38fF +C781 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Z3 0.05fF +C782 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/Z4 0.08fF +C783 pd_0/tspc_r_1/Qbar pd_0/and_pd_0/Z1 0.02fF +C784 ro_div_new_0/divider_0/mc2 ro_div_new_0/divider_0/and_0/OUT 0.05fF +C785 ro_div_new_0/divider_0/prescaler_0/tspc_0/a_740_n680# ro_div_new_0/divider_0/prescaler_0/tspc_0/Z4 0.08fF +C786 ro_div_new_0/divider_0/nor_0/Z1 ro_div_new_0/divider_0/and_0/B 0.78fF +C787 divider_0/tspc_2/Z1 divider_0/tspc_2/Z3 0.06fF +C788 divider_0/nor_0/B divider_0/Out 0.22fF +C789 divider_0/prescaler_0/tspc_2/D divider_0/clk 0.29fF +C790 divbuf_0/OUT3 divbuf_0/OUT 0.26fF +C791 ro_div_new_0/divider_0/tspc_1/Q ro_div_new_0/divider_0/tspc_2/Z3 0.45fF +C792 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z4 ro_div_new_0/divider_0/prescaler_0/tspc_2/D 0.11fF +C793 ro_complete_0/a2 ro_complete_0/cbank_2/switch_2/vin 0.14fF +C794 ro_complete_0/cbank_0/switch_2/vin ro_complete_0/a3 0.09fF +C795 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.36fF +C796 divbuf_4/a_492_n240# divbuf_4/OUT2 0.42fF +C797 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/pd_0/UP 0.11fF +C798 pll_full_0/pd_0/tspc_r_0/z5 pll_full_0/pd_0/DOWN 0.03fF +C799 divider_0/tspc_1/Z2 divider_0/tspc_1/Z4 0.36fF +C800 divider_0/prescaler_0/tspc_1/Z2 divider_0/and_0/OUT 0.06fF +C801 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/Z3 0.33fF +C802 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/Q 0.38fF +C803 ro_div_new_0/ro_complete_0/a4 ro_div_new_0/ro_complete_0/cbank_2/switch_1/vin 0.09fF +C804 ro_div_new_0/ro_complete_0/a2 ro_div_new_0/ro_complete_0/cbank_0/switch_3/vin 0.09fF +C805 ro_div_new_0/divider_0/tspc_0/Z3 ro_div_new_0/divider_0/nor_1/A 0.38fF +C806 ro_div_new_0/ro_complete_0/a4 ro_div_new_0/divider_0/clk 0.05fF +C807 pll_full_0/ro_complete_0/cbank_2/switch_0/vin pll_full_0/ro_complete_0/cbank_2/v 1.44fF +C808 divider_0/and_0/out1 divider_0/and_0/Z1 0.36fF +C809 divbuf_0/OUT divbuf_0/OUT2 0.06fF +C810 ro_complete_0/cbank_0/switch_5/vin ro_complete_0/cbank_0/v 1.30fF +C811 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z2 0.01fF +C812 divbuf_5/a_492_n240# divbuf_5/OUT5 0.01fF +C813 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_0/Z2 0.21fF +C814 divider_0/tspc_1/Q divider_0/tspc_2/Z1 0.01fF +C815 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_2/D 0.05fF +C816 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/clk 0.01fF +C817 divider_0/nor_1/B divider_0/and_0/A 0.26fF +C818 ro_div_new_0/ro_complete_0/a2 ro_div_new_0/ro_complete_0/cbank_2/switch_2/vin 0.14fF +C819 ro_div_new_0/ro_complete_0/a3 ro_div_new_0/ro_complete_0/cbank_2/switch_1/vin 0.13fF +C820 ro_div_new_0/ro_complete_0/cbank_0/switch_2/vin ro_div_new_0/ro_complete_0/cbank_0/v 1.30fF +C821 ro_div_new_0/divider_0/prescaler_0/m1_2700_2190# ro_div_new_0/divider_0/and_0/OUT 0.14fF +C822 ro_div_new_0/ro_complete_0/a3 ro_div_new_0/divider_0/clk 0.05fF +C823 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/switch_1/vin 0.13fF +C824 pll_full_0/ro_complete_0/a3 pll_full_0/divider_0/clk 0.11fF +C825 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z3 0.05fF +C826 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_2/Z1 0.03fF +C827 divbuf_6/OUT3 divbuf_6/OUT 0.26fF +C828 divbuf_6/OUT4 divbuf_6/OUT5 20.26fF +C829 pd_0/tspc_r_1/Z2 pd_0/tspc_r_1/Z4 0.14fF +C830 pll_full_0/pd_0/tspc_r_0/Z2 pll_full_0/pd_0/DIV 0.19fF +C831 divider_0/mc2 divider_0/and_0/OUT 0.05fF +C832 pll_full_0/pd_0/DOWN pll_full_0/pd_0/tspc_r_1/Qbar 0.02fF +C833 divider_0/nor_1/A divider_0/and_0/B 0.08fF +C834 ro_div_new_0/divider_0/tspc_0/Z3 ro_div_new_0/divider_0/tspc_0/Q 0.05fF +C835 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z4 ro_div_new_0/divider_0/clk 0.12fF +C836 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/switch_5/vin 0.09fF +C837 divbuf_3/OUT4 divbuf_3/OUT 1.11fF +C838 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/B 0.18fF +C839 pll_full_0/divider_0/tspc_0/Z2 pll_full_0/divider_0/tspc_0/Z3 0.16fF +C840 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Z3 0.65fF +C841 divider_0/tspc_1/Z1 divider_0/tspc_1/Z4 0.00fF +C842 divider_0/prescaler_0/tspc_1/Z4 divider_0/prescaler_0/tspc_2/a_740_n680# 0.01fF +C843 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/D 0.09fF +C844 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_0/Q 0.20fF +C845 filter_0/a_4216_n5230# filter_0/v 0.19fF +C846 ro_div_new_0/ro_complete_0/cbank_2/switch_2/vin ro_div_new_0/ro_complete_0/cbank_2/v 1.30fF +C847 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/switch_3/vin 0.09fF +C848 ro_div_new_0/divider_0/prescaler_0/tspc_0/Q ro_div_new_0/divider_0/prescaler_0/tspc_2/D 0.04fF +C849 ro_div_new_0/divider_0/prescaler_0/tspc_1/Q ro_div_new_0/divider_0/prescaler_0/nand_1/z1 0.22fF +C850 ro_complete_0/a3 ro_complete_0/cbank_2/switch_1/vin 0.13fF +C851 divbuf_4/OUT4 divbuf_4/OUT 1.11fF +C852 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.03fF +C853 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_2/a_630_n680# 0.01fF +C854 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/Out 0.11fF +C855 pd_0/DOWN pd_0/R 0.36fF +C856 pd_0/tspc_r_0/Z1 pd_0/tspc_r_0/Z2 0.71fF +C857 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/Z4 0.20fF +C858 pd_0/DIV pd_0/tspc_r_0/z5 0.04fF +C859 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_1/Q 0.15fF +C860 divider_0/prescaler_0/tspc_2/Z2 divider_0/and_0/OUT 0.06fF +C861 ro_div_new_0/divider_0/tspc_0/Z3 ro_div_new_0/divider_0/tspc_0/Z2 0.16fF +C862 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z2 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z3 0.16fF +C863 ro_div_new_0/ro_complete_0/cbank_1/switch_3/vin ro_div_new_0/divider_0/clk 1.30fF +C864 ro_div_new_0/divider_0/tspc_2/Z3 ro_div_new_0/divider_0/tspc_2/Z4 0.65fF +C865 ro_complete_0/cbank_1/switch_4/vin ro_complete_0/cbank_1/v 1.30fF +C866 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_0/Z3 0.38fF +C867 pd_0/tspc_r_0/Z4 pd_0/tspc_r_1/Z4 0.02fF +C868 pd_0/DOWN pd_0/and_pd_0/Out1 0.12fF +C869 pd_0/REF pd_0/tspc_r_1/Z1 0.17fF +C870 pd_0/tspc_r_1/Qbar1 pd_0/UP 0.11fF +C871 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/UP 0.03fF +C872 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/Z3 0.16fF +C873 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z3 ro_div_new_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.05fF +C874 pll_full_0/divbuf_0/a_492_n240# pll_full_0/divbuf_0/OUT5 0.01fF +C875 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/a4 0.09fF +C876 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/Z4 0.02fF +C877 divider_0/tspc_0/a_630_n680# divider_0/tspc_0/Z2 0.01fF +C878 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/tspc_2/D 0.32fF +C879 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/clk 0.01fF +C880 ro_div_new_0/divider_0/prescaler_0/tspc_2/a_630_n680# ro_div_new_0/divider_0/prescaler_0/tspc_2/Z4 0.12fF +C881 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z1 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z2 1.07fF +C882 divbuf_3/a_492_n240# divbuf_3/IN 0.13fF +C883 ro_complete_0/cbank_2/switch_2/vin ro_complete_0/cbank_2/v 1.30fF +C884 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# 0.01fF +C885 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Q 0.20fF +C886 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/nor_1/A 1.21fF +C887 divbuf_7/a_492_n240# divbuf_7/OUT 0.00fF +C888 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Z1 0.09fF +C889 pll_full_0/pd_0/tspc_r_0/z5 pll_full_0/pd_0/DIV 0.04fF +C890 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Z4 0.12fF +C891 divider_0/prescaler_0/tspc_1/Z1 divider_0/prescaler_0/tspc_1/Z2 1.07fF +C892 ro_div_new_0/ro_complete_0/a1 ro_div_new_0/ro_complete_0/cbank_2/v 0.05fF +C893 divider_0/tspc_2/Z1 divider_0/tspc_2/Z4 0.00fF +C894 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_1/switch_3/vin 0.09fF +C895 ro_div_new_0/divider_0/tspc_1/a_630_n680# ro_div_new_0/divider_0/nor_0/B 0.00fF +C896 ro_div_new_0/divider_0/tspc_1/Q ro_div_new_0/divider_0/tspc_2/Z4 0.15fF +C897 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z3 ro_div_new_0/divider_0/prescaler_0/Out 0.11fF +C898 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z2 ro_div_new_0/divider_0/clk 0.11fF +C899 ro_div_new_0/ro_complete_0/a2 ro_div_new_0/ro_complete_0/cbank_2/switch_3/vin 0.09fF +C900 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_1/Qbar 0.03fF +C901 divider_0/tspc_1/a_630_n680# divider_0/nor_0/B 0.00fF +C902 divider_0/tspc_0/a_630_n680# divider_0/nor_1/A 0.35fF +C903 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z3 0.05fF +C904 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/Z4 0.08fF +C905 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Q 0.04fF +C906 ro_div_new_0/divider_0/mc2 ro_div_new_0/divider_0/and_0/out1 0.06fF +C907 divbuf_5/OUT2 divbuf_5/OUT3 1.37fF +C908 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/Out 0.21fF +C909 divider_0/tspc_0/Q divider_0/tspc_1/a_630_n680# 0.01fF +C910 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_0/a_630_n680# 0.19fF +C911 pd_0/R pd_0/tspc_r_1/Z3 0.29fF +C912 pll_full_0/pd_0/REF pll_full_0/divbuf_1/a_492_n240# 0.13fF +C913 divider_0/tspc_1/Q divider_0/tspc_2/Z3 0.45fF +C914 divider_0/prescaler_0/tspc_2/Z4 divider_0/prescaler_0/tspc_2/D 0.11fF +C915 divider_0/prescaler_0/tspc_1/Z1 divider_0/prescaler_0/Out 0.08fF +C916 io_clamp_low[2] io_analog[6] 0.53fF +C917 ro_div_new_0/divider_0/prescaler_0/m1_2700_2190# ro_div_new_0/divider_0/prescaler_0/tspc_0/D 0.16fF +C918 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/v 0.05fF +C919 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/v 1.30fF +C920 ro_div_new_0/divider_0/prescaler_0/Out ro_div_new_0/divider_0/clk 0.51fF +C921 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_1/Z2 0.30fF +C922 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF +C923 ro_complete_0/a1 ro_complete_0/cbank_2/v 0.05fF +C924 divbuf_6/OUT5 divbuf_6/OUT 43.38fF +C925 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z4 0.12fF +C926 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z2 1.07fF +C927 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_2/Z3 0.38fF +C928 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_1/Qbar1 0.30fF +C929 divider_0/tspc_0/Z4 divider_0/tspc_0/a_630_n680# 0.12fF +C930 cp_0/a_1710_0# cp_0/down 0.32fF +C931 ro_div_new_0/ro_complete_0/cbank_2/switch_3/vin ro_div_new_0/ro_complete_0/cbank_2/v 1.30fF +C932 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/cbank_0/switch_1/vin 0.19fF +C933 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/v 0.05fF +C934 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/switch_4/vin 0.20fF +C935 pll_full_0/pd_0/tspc_r_0/Z2 pll_full_0/pd_0/tspc_r_0/Z1 0.71fF +C936 divider_0/mc2 divider_0/and_0/out1 0.06fF +C937 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Q 0.04fF +C938 ro_div_new_0/ro_complete_0/cbank_0/switch_0/vin ro_div_new_0/ro_complete_0/cbank_0/v 1.30fF +C939 ro_div_new_0/ro_complete_0/cbank_0/switch_4/vin ro_div_new_0/ro_complete_0/cbank_0/switch_3/vin 0.20fF +C940 cp_0/vbias cp_0/a_10_n50# 0.19fF +C941 ro_div_new_0/divider_0/nor_1/B ro_div_new_0/divider_0/tspc_1/Z1 0.03fF +C942 ro_div_new_0/ro_complete_0/cbank_2/switch_4/vin ro_div_new_0/ro_complete_0/cbank_2/switch_5/vin 0.20fF +C943 ro_div_new_0/divider_0/prescaler_0/tspc_0/Q ro_div_new_0/divider_0/prescaler_0/nand_1/z1 0.01fF +C944 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z3 ro_div_new_0/divider_0/prescaler_0/Out 0.05fF +C945 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z2 ro_div_new_0/divider_0/clk 0.11fF +C946 pll_full_0/divider_0/tspc_0/Q pll_full_0/divider_0/tspc_1/a_630_n680# 0.01fF +C947 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.19fF +C948 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/a0 0.13fF +C949 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/nor_0/B 0.22fF +C950 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/tspc_0/D 0.03fF +C951 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.09fF +C952 pd_0/tspc_r_0/Qbar1 pd_0/tspc_r_0/z5 0.20fF +C953 divider_0/prescaler_0/tspc_0/Z2 divider_0/clk 0.11fF +C954 ro_div_new_0/ro_complete_0/cbank_1/switch_3/vin ro_div_new_0/ro_complete_0/cbank_1/switch_4/vin 0.20fF +C955 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z2 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z4 0.36fF +C956 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_1/Z1 0.03fF +C957 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/tspc_0/a_630_n680# 0.12fF +C958 ro_complete_0/cbank_1/switch_1/vin ro_complete_0/cbank_1/v 1.30fF +C959 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/out1 0.31fF +C960 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/and_0/A 0.01fF +C961 divbuf_6/a_492_n240# divbuf_6/OUT2 0.42fF +C962 divider_0/tspc_1/a_630_n680# divider_0/nor_1/B 0.35fF +C963 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/Z4 0.36fF +C964 ro_div_new_0/ro_complete_0/cbank_0/switch_0/vin ro_div_new_0/ro_complete_0/a5 0.09fF +C965 pd_0/tspc_r_0/z5 pd_0/tspc_r_1/z5 0.02fF +C966 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/Z2 0.25fF +C967 pll_full_0/ro_complete_0/cbank_2/switch_0/vin pll_full_0/ro_complete_0/a4 0.12fF +C968 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF +C969 divider_0/prescaler_0/tspc_0/Q divider_0/prescaler_0/tspc_2/D 0.04fF +C970 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/nand_1/z1 0.22fF +C971 ro_div_new_0/ro_complete_0/cbank_2/switch_1/vin ro_div_new_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF +C972 divbuf_1/OUT3 divbuf_1/OUT5 0.01fF +C973 ro_div_new_0/divider_0/nor_1/B ro_div_new_0/divider_0/nor_0/B 0.47fF +C974 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z2 ro_div_new_0/divider_0/prescaler_0/tspc_1/Q 0.06fF +C975 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z2 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z3 0.16fF +C976 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/v 0.05fF +C977 pll_full_0/ro_complete_0/cbank_2/switch_2/vin pll_full_0/ro_complete_0/cbank_2/switch_1/vin 0.20fF +C978 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/nor_1/A 0.01fF +C979 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/tspc_1/Z3 0.16fF +C980 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_1/Z4 0.21fF +C981 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.15fF +C982 ro_complete_0/cbank_2/switch_4/vin ro_complete_0/cbank_2/switch_5/vin 0.20fF +C983 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/and_0/B 0.29fF +C984 divbuf_7/IN divbuf_7/OUT5 0.00fF +C985 pll_full_0/pd_0/tspc_r_0/Qbar pll_full_0/pd_0/DOWN 0.21fF +C986 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/tspc_1/Z3 0.16fF +C987 divider_0/tspc_2/Z3 divider_0/tspc_2/Z4 0.65fF +C988 cp_0/a_1710_0# cp_0/a_1710_n2840# 0.83fF +C989 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z4 ro_div_new_0/divider_0/prescaler_0/Out 0.28fF +C990 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.14fF +C991 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/a4 0.12fF +C992 divbuf_4/a_492_n240# divbuf_4/OUT 0.00fF +C993 pd_0/DIV pd_0/tspc_r_0/Qbar1 0.12fF +C994 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.09fF +C995 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/R 0.29fF +C996 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z4 0.12fF +C997 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z2 1.07fF +C998 ro_div_new_0/ro_complete_0/a4 ro_div_new_0/ro_complete_0/cbank_2/switch_0/vin 0.12fF +C999 ro_div_new_0/ro_complete_0/a2 ro_div_new_0/ro_complete_0/cbank_0/switch_2/vin 0.14fF +C1000 pll_full_0/pd_0/tspc_r_1/Qbar pll_full_0/pd_0/and_pd_0/Out1 0.05fF +C1001 ro_div_new_0/divider_0/prescaler_0/m1_2700_2190# ro_div_new_0/divider_0/prescaler_0/tspc_1/Z3 0.33fF +C1002 divbuf_0/OUT3 divbuf_0/OUT2 1.37fF +C1003 ro_div_new_0/divider_0/and_0/OUT ro_div_new_0/divider_0/and_0/B 0.01fF +C1004 ro_div_new_0/divider_0/prescaler_0/tspc_1/Q ro_div_new_0/divider_0/prescaler_0/Out 0.91fF +C1005 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.09fF +C1006 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/switch_2/vin 0.20fF +C1007 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.06fF +C1008 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/Out 0.04fF +C1009 divbuf_5/OUT2 divbuf_5/OUT5 0.02fF +C1010 divbuf_5/OUT3 divbuf_5/OUT4 5.16fF +C1011 pd_0/R pd_0/UP 0.45fF +C1012 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_0/switch_0/vin 0.09fF +C1013 divider_0/tspc_1/Q divider_0/tspc_2/Z4 0.15fF +C1014 divider_0/prescaler_0/tspc_1/Z3 divider_0/prescaler_0/Out 0.11fF +C1015 divider_0/prescaler_0/tspc_1/Z2 divider_0/clk 0.11fF +C1016 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/OUT4 1.11fF +C1017 ro_div_new_0/divider_0/tspc_1/Z3 ro_div_new_0/divider_0/tspc_1/a_630_n680# 0.05fF +C1018 ro_div_new_0/divider_0/prescaler_0/m1_2700_2190# ro_div_new_0/divider_0/prescaler_0/nand_0/z1 0.07fF +C1019 ro_div_new_0/divider_0/prescaler_0/tspc_2/a_740_n680# ro_div_new_0/divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF +C1020 ro_div_new_0/ro_complete_0/a1 ro_div_new_0/divider_0/clk 0.05fF +C1021 ro_div_new_0/divider_0/prescaler_0/Out ro_div_new_0/divider_0/tspc_0/Z4 0.12fF +C1022 pll_full_0/divbuf_1/OUT3 pll_full_0/divbuf_1/OUT4 5.16fF +C1023 pll_full_0/ro_complete_0/cbank_1/switch_4/vin pll_full_0/ro_complete_0/cbank_1/switch_5/vin 0.20fF +C1024 ro_complete_0/cbank_1/switch_5/vin ro_complete_0/cbank_1/v 1.30fF +C1025 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z3 0.06fF +C1026 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_1/Q 0.51fF +C1027 pll_full_0/ro_complete_0/a1 pll_full_0/divider_0/clk 0.11fF +C1028 pll_full_0/divider_0/tspc_2/Z2 pll_full_0/divider_0/tspc_2/Z3 0.16fF +C1029 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_2/Z4 0.22fF +C1030 pd_0/UP pd_0/and_pd_0/Out1 0.33fF +C1031 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Z3 0.05fF +C1032 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF +C1033 cp_0/a_1710_0# cp_0/a_10_n50# 0.04fF +C1034 ro_div_new_0/divider_0/prescaler_0/tspc_0/a_740_n680# ro_div_new_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.19fF +C1035 ro_div_new_0/ro_complete_0/a0 ro_div_new_0/ro_complete_0/cbank_1/switch_5/vin 0.09fF +C1036 ro_div_new_0/divider_0/tspc_1/Z1 ro_div_new_0/divider_0/tspc_0/Q 0.01fF +C1037 ro_div_new_0/divider_0/tspc_0/a_630_n680# ro_div_new_0/divider_0/prescaler_0/Out 0.01fF +C1038 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z2 ro_div_new_0/divider_0/prescaler_0/tspc_1/Q 0.06fF +C1039 ro_div_new_0/divider_0/prescaler_0/m1_2700_2190# ro_div_new_0/divider_0/clk 0.01fF +C1040 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/tspc_1/Z4 0.65fF +C1041 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z2 0.01fF +C1042 ro_div_new_0/divider_0/nor_1/B ro_div_new_0/divider_0/tspc_0/a_630_n680# 0.01fF +C1043 ro_div_new_0/divider_0/mc2 ro_div_new_0/divider_0/nor_0/B 0.15fF +C1044 ro_div_new_0/ro_complete_0/cbank_2/switch_4/vin ro_div_new_0/ro_complete_0/cbank_2/v 1.30fF +C1045 divider_0/prescaler_0/Out divider_0/clk 0.51fF +C1046 pll_full_0/ro_complete_0/cbank_0/switch_2/vin pll_full_0/ro_complete_0/a3 0.09fF +C1047 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/a2 0.09fF +C1048 ro_div_new_0/divider_0/prescaler_0/tspc_2/D ro_div_new_0/divider_0/prescaler_0/nand_1/z1 0.21fF +C1049 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/switch_2/vin 0.20fF +C1050 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/and_0/B 0.31fF +C1051 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_2/Z2 0.14fF +C1052 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/nand_0/z1 0.01fF +C1053 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z1 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z3 0.06fF +C1054 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF +C1055 pll_full_0/ro_complete_0/cbank_0/switch_5/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF +C1056 ro_complete_0/a4 ro_complete_0/cbank_2/v 0.05fF +C1057 ro_complete_0/a0 ro_complete_0/cbank_1/switch_5/vin 0.09fF +C1058 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/clk 0.05fF +C1059 pd_0/tspc_r_1/Qbar1 pd_0/tspc_r_1/Qbar 0.01fF +C1060 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/tspc_r_0/z5 0.20fF +C1061 ro_div_new_0/divider_0/nor_1/Z1 ro_div_new_0/divider_0/nor_1/B 0.06fF +C1062 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/ro_complete_0/cbank_1/switch_0/vin 0.19fF +C1063 divider_0/prescaler_0/tspc_0/Q divider_0/prescaler_0/nand_1/z1 0.01fF +C1064 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/Out 0.05fF +C1065 divider_0/prescaler_0/tspc_2/Z2 divider_0/clk 0.11fF +C1066 divbuf_1/OUT4 divbuf_1/OUT 1.11fF +C1067 ro_div_new_0/divider_0/nor_1/A ro_div_new_0/divider_0/prescaler_0/tspc_1/Q 0.03fF +C1068 ro_div_new_0/divider_0/nor_1/B ro_div_new_0/divider_0/tspc_2/Z2 0.20fF +C1069 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z2 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z4 0.36fF +C1070 ro_div_new_0/divider_0/prescaler_0/tspc_0/a_630_n680# ro_div_new_0/divider_0/clk 0.01fF +C1071 divbuf_3/a_492_n240# divbuf_3/OUT5 0.01fF +C1072 ro_complete_0/cbank_2/switch_4/vin ro_complete_0/cbank_2/v 1.30fF +C1073 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/tspc_1/Q 0.05fF +C1074 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.05fF +C1075 divbuf_7/OUT2 divbuf_7/OUT 0.06fF +C1076 divbuf_7/OUT3 divbuf_7/OUT5 0.01fF +C1077 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/tspc_1/Z4 0.36fF +C1078 divider_0/mc2 divider_0/nor_0/B 0.15fF +C1079 ro_div_new_0/ro_complete_0/cbank_0/v ro_div_new_0/ro_complete_0/cbank_2/v 0.04fF +C1080 divbuf_1/a_492_n240# divbuf_1/OUT2 0.42fF +C1081 ro_div_new_0/divider_0/nor_1/A ro_div_new_0/divider_0/tspc_0/Z4 0.21fF +C1082 divbuf_2/OUT3 divbuf_2/OUT5 0.01fF +C1083 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/a1 0.14fF +C1084 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_2/Z4 0.02fF +C1085 pd_0/tspc_r_0/Z3 pd_0/DOWN 0.03fF +C1086 pll_full_0/cp_0/upbar pll_full_0/cp_0/down 0.02fF +C1087 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/tspc_1/Q 0.06fF +C1088 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/Z3 0.16fF +C1089 ro_div_new_0/ro_complete_0/cbank_0/switch_4/vin ro_div_new_0/ro_complete_0/cbank_0/switch_5/vin 0.20fF +C1090 ro_div_new_0/divider_0/tspc_1/Z1 ro_div_new_0/divider_0/tspc_1/Z2 1.07fF +C1091 ro_div_new_0/divider_0/nor_1/B ro_div_new_0/divider_0/tspc_1/Z3 0.38fF +C1092 ro_div_new_0/divider_0/tspc_0/a_630_n680# ro_div_new_0/divider_0/nor_1/A 0.35fF +C1093 ro_div_new_0/divider_0/prescaler_0/tspc_1/a_630_n680# ro_div_new_0/divider_0/prescaler_0/tspc_1/Z3 0.05fF +C1094 ro_div_new_0/divider_0/prescaler_0/m1_2700_2190# ro_div_new_0/divider_0/prescaler_0/tspc_1/Z4 0.08fF +C1095 ro_div_new_0/divider_0/tspc_2/a_630_n680# ro_div_new_0/divider_0/tspc_2/Z3 0.05fF +C1096 ro_div_new_0/divider_0/nor_0/B ro_div_new_0/divider_0/tspc_2/Z1 0.03fF +C1097 pll_full_0/divbuf_1/a_492_n240# pll_full_0/divbuf_1/OUT5 0.01fF +C1098 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/a1 0.14fF +C1099 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.00fF +C1100 divbuf_2/OUT3 divbuf_2/OUT 0.26fF +C1101 divbuf_0/IN divbuf_0/OUT5 0.00fF +C1102 divbuf_5/OUT3 divbuf_5/OUT 0.26fF +C1103 divbuf_5/OUT4 divbuf_5/OUT5 20.26fF +C1104 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/tspc_0/Z3 0.05fF +C1105 io_clamp_low[2] io_clamp_high[2] 0.53fF +C1106 divider_0/nor_1/Z1 divider_0/nor_1/B 0.06fF +C1107 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/cbank_0/switch_0/vin 0.19fF +C1108 divider_0/prescaler_0/tspc_1/Z4 divider_0/prescaler_0/Out 0.28fF +C1109 ro_div_new_0/ro_complete_0/a5 ro_div_new_0/ro_complete_0/cbank_2/v 0.08fF +C1110 io_clamp_high[1] io_analog[5] 0.53fF +C1111 ro_div_new_0/divider_0/prescaler_0/m1_2700_2190# ro_div_new_0/divider_0/prescaler_0/tspc_1/Q 0.38fF +C1112 divbuf_1/a_492_n240# divbuf_1/OUT 0.00fF +C1113 ro_div_new_0/divider_0/and_0/out1 ro_div_new_0/divider_0/and_0/B 0.18fF +C1114 pll_full_0/divbuf_1/OUT4 pll_full_0/divbuf_1/OUT5 20.26fF +C1115 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_0/a_630_n680# 0.01fF +C1116 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.06fF +C1117 divbuf_0/OUT4 divbuf_0/OUT5 20.26fF +C1118 ro_complete_0/cbank_0/v ro_complete_0/cbank_2/v 0.04fF +C1119 pll_full_0/divider_0/tspc_2/Z2 pll_full_0/divider_0/tspc_2/Z4 0.36fF +C1120 pll_full_0/divider_0/tspc_2/Z3 pll_full_0/divbuf_0/IN 0.05fF +C1121 pll_full_0/pd_0/tspc_r_1/Z4 pll_full_0/pd_0/tspc_r_0/Z4 0.02fF +C1122 divider_0/and_0/OUT divider_0/and_0/B 0.01fF +C1123 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/Out 0.91fF +C1124 ro_div_new_0/divider_0/tspc_1/Q ro_div_new_0/divider_0/tspc_2/a_630_n680# 0.01fF +C1125 ro_div_new_0/divider_0/tspc_0/a_630_n680# ro_div_new_0/divider_0/tspc_0/Q 0.04fF +C1126 ro_div_new_0/divider_0/prescaler_0/tspc_1/a_630_n680# ro_div_new_0/divider_0/clk 0.01fF +C1127 ro_div_new_0/divider_0/nor_1/B ro_div_new_0/divider_0/and_0/A 0.26fF +C1128 pll_full_0/divbuf_1/OUT pll_full_0/divbuf_1/a_492_n240# 0.00fF +C1129 pll_full_0/divbuf_0/OUT2 pll_full_0/divbuf_0/OUT3 1.37fF +C1130 pll_full_0/ro_complete_0/cbank_2/switch_2/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF Xpd_0 VDD gnd pd_0/REF pd_0/DIV pd_0/UP pd_0/DOWN pd_0/R pd +Xro_div_new_0/ro_complete_0 ro_div_new_0/ro_complete_0/a0 ro_div_new_0/ro_complete_0/a1 ++ ro_div_new_0/ro_complete_0/a5 ro_div_new_0/ro_complete_0/a4 ro_div_new_0/ro_complete_0/a3 ++ ro_div_new_0/ro_complete_0/a2 ro_complete +Xro_div_new_0/divider_0 gnd vdd ro_div_new_0/divider_0/Out ro_div_new_0/divider_0/clk ++ ro_div_new_0/divider_0/mc2 divider Xcp_0 cp_0/vbias vdd gnd cp_0/out cp_0/down cp_0/upbar cp Xfilter_0 gnd filter_0/v filter Xro_complete_0 ro_complete_0/a0 ro_complete_0/a1 ro_complete_0/a5 ro_complete_0/a4 + ro_complete_0/a3 ro_complete_0/a2 ro_complete -Xro_div_0/ro_complete_0 ro_div_0/ro_complete_0/a0 ro_div_0/ro_complete_0/a1 ro_div_0/ro_complete_0/a5 -+ ro_div_0/ro_complete_0/a4 ro_div_0/ro_complete_0/a3 ro_div_0/ro_complete_0/a2 ro_complete -Xro_div_0/divbuf_0 VDD ro_div_0/divbuf_0/IN ro_div_0/divbuf_0/OUT ro_div_0/divbuf_0/OUT2 -+ ro_div_0/divbuf_0/OUT3 ro_div_0/divbuf_0/OUT4 ro_div_0/divbuf_0/OUT5 gnd divbuf -Xro_div_0/divider_0 gnd vdd ro_div_0/divbuf_0/IN ro_div_0/divider_0/clk gnd divider Xdivbuf_0 VDD divbuf_0/IN divbuf_0/OUT divbuf_0/OUT2 divbuf_0/OUT3 divbuf_0/OUT4 divbuf_0/OUT5 + gnd divbuf -Xpd_div_0 pd_div_0/div pd_div_0/bufin pd_div Xdivbuf_1 VDD divbuf_1/IN divbuf_1/OUT divbuf_1/OUT2 divbuf_1/OUT3 divbuf_1/OUT4 divbuf_1/OUT5 + gnd divbuf Xdivbuf_2 VDD divbuf_2/IN divbuf_2/OUT divbuf_2/OUT2 divbuf_2/OUT3 divbuf_2/OUT4 divbuf_2/OUT5 @@ -1559,1133 +1265,1047 @@ + gnd divbuf Xdivider_0 gnd vdd divider_0/Out divider_0/clk divider_0/mc2 divider Xpll_full_0 vdd pll_full -C1424 io_analog[4] vdd 25.05fF -C1425 io_analog[5] vdd 25.05fF -C1426 io_analog[6] vdd 25.05fF -C1427 io_in_3v3[0] vdd 0.61fF -C1428 io_oeb[26] vdd 0.61fF -C1429 io_in[0] vdd 0.61fF -C1430 io_out[26] vdd 0.61fF -C1431 io_out[0] vdd 0.61fF -C1432 io_in[26] vdd 0.61fF -C1433 io_oeb[0] vdd 0.61fF -C1434 io_in_3v3[26] vdd 0.61fF -C1435 io_in_3v3[1] vdd 0.61fF -C1436 io_oeb[25] vdd 0.61fF -C1437 io_in[1] vdd 0.61fF -C1438 io_out[25] vdd 0.61fF -C1439 io_out[1] vdd 0.61fF -C1440 io_in[25] vdd 0.61fF -C1441 io_oeb[1] vdd 0.61fF -C1442 io_in_3v3[25] vdd 0.61fF -C1443 io_in_3v3[2] vdd 0.61fF -C1444 io_oeb[24] vdd 0.61fF -C1445 io_in[2] vdd 0.61fF -C1446 io_out[24] vdd 0.61fF -C1447 io_out[2] vdd 0.61fF -C1448 io_in[24] vdd 0.61fF -C1449 io_oeb[2] vdd 0.61fF -C1450 io_in_3v3[24] vdd 0.61fF -C1451 io_in_3v3[3] vdd 0.61fF -C1452 gpio_noesd[17] vdd 0.61fF -C1453 io_in[3] vdd 0.61fF -C1454 gpio_analog[17] vdd 0.61fF -C1455 io_out[3] vdd 0.61fF -C1456 io_oeb[3] vdd 0.61fF -C1457 io_in_3v3[4] vdd 0.61fF -C1458 io_in[4] vdd 0.61fF -C1459 io_out[4] vdd 0.61fF -C1460 io_oeb[4] vdd 0.61fF -C1461 io_oeb[23] vdd 0.61fF -C1462 io_out[23] vdd 0.61fF -C1463 io_in[23] vdd 0.61fF -C1464 io_in_3v3[23] vdd 0.61fF -C1465 gpio_noesd[16] vdd 0.61fF -C1466 gpio_analog[16] vdd 0.61fF -C1467 io_in_3v3[5] vdd 0.61fF -C1468 io_in[5] vdd 0.61fF -C1469 io_out[5] vdd 0.61fF -C1470 io_oeb[5] vdd 0.61fF -C1471 io_oeb[22] vdd 0.61fF -C1472 io_out[22] vdd 0.61fF -C1473 io_in[22] vdd 0.61fF -C1474 io_in_3v3[22] vdd 0.61fF -C1475 gpio_noesd[15] vdd 0.61fF -C1476 gpio_analog[15] vdd 0.61fF -C1477 io_in_3v3[6] vdd 0.61fF -C1478 io_in[6] vdd 0.61fF -C1479 io_out[6] vdd 0.61fF -C1480 io_oeb[6] vdd 0.61fF -C1481 io_oeb[21] vdd 0.61fF -C1482 io_out[21] vdd 0.61fF -C1483 io_in[21] vdd 0.61fF -C1484 io_in_3v3[21] vdd 0.61fF -C1485 gpio_noesd[14] vdd 0.61fF -C1486 gpio_analog[14] vdd 0.61fF -C1487 vssa1 vdd 26.08fF -C1488 vssd2 vdd 13.04fF -C1489 vssd1 vdd 13.04fF -C1490 vdda2 vdd 13.04fF -C1491 vdda1 vdd 26.08fF -C1492 io_oeb[20] vdd 0.61fF -C1493 io_out[20] vdd 0.61fF -C1494 io_in[20] vdd 0.61fF -C1495 io_in_3v3[20] vdd 0.61fF -C1496 gpio_noesd[13] vdd 0.61fF -C1497 gpio_analog[13] vdd 0.61fF -C1498 gpio_analog[0] vdd 0.61fF -C1499 gpio_noesd[0] vdd 0.61fF -C1500 io_in_3v3[7] vdd 0.61fF -C1501 io_in[7] vdd 0.61fF -C1502 io_out[7] vdd 0.61fF -C1503 io_oeb[7] vdd 0.61fF -C1504 io_oeb[19] vdd 0.61fF -C1505 io_out[19] vdd 0.61fF -C1506 io_in[19] vdd 0.61fF -C1507 io_in_3v3[19] vdd 0.61fF -C1508 gpio_noesd[12] vdd 0.61fF -C1509 gpio_analog[12] vdd 0.61fF -C1510 gpio_analog[1] vdd 0.61fF -C1511 gpio_noesd[1] vdd 0.61fF -C1512 io_in_3v3[8] vdd 0.61fF -C1513 io_in[8] vdd 0.61fF -C1514 io_out[8] vdd 0.61fF -C1515 io_oeb[8] vdd 0.61fF -C1516 io_oeb[18] vdd 0.61fF -C1517 io_out[18] vdd 0.61fF -C1518 io_in[18] vdd 0.61fF -C1519 io_in_3v3[18] vdd 0.61fF -C1520 gpio_noesd[11] vdd 0.61fF -C1521 gpio_analog[11] vdd 0.61fF -C1522 gpio_analog[2] vdd 0.61fF -C1523 gpio_noesd[2] vdd 0.61fF -C1524 io_in_3v3[9] vdd 0.61fF -C1525 io_in[9] vdd 0.61fF -C1526 io_out[9] vdd 0.61fF -C1527 io_oeb[9] vdd 0.61fF -C1528 io_oeb[17] vdd 0.61fF -C1529 io_out[17] vdd 0.61fF -C1530 io_in[17] vdd 0.61fF -C1531 io_in_3v3[17] vdd 0.61fF -C1532 gpio_noesd[10] vdd 0.61fF -C1533 gpio_analog[10] vdd 0.61fF -C1534 gpio_analog[3] vdd 0.61fF -C1535 gpio_noesd[3] vdd 0.61fF -C1536 io_in_3v3[10] vdd 0.61fF -C1537 io_in[10] vdd 0.61fF -C1538 io_out[10] vdd 0.61fF -C1539 io_oeb[10] vdd 0.61fF -C1540 io_oeb[16] vdd 0.61fF -C1541 io_out[16] vdd 0.61fF -C1542 io_in[16] vdd 0.61fF -C1543 io_in_3v3[16] vdd 0.61fF -C1544 gpio_noesd[9] vdd 0.61fF -C1545 gpio_analog[9] vdd 0.61fF -C1546 gpio_analog[4] vdd 0.61fF -C1547 gpio_noesd[4] vdd 0.61fF -C1548 io_in_3v3[11] vdd 0.61fF -C1549 io_in[11] vdd 0.61fF -C1550 io_out[11] vdd 0.61fF -C1551 io_oeb[11] vdd 0.61fF -C1552 io_oeb[15] vdd 0.61fF -C1553 io_out[15] vdd 0.61fF -C1554 io_in[15] vdd 0.61fF -C1555 io_in_3v3[15] vdd 0.61fF -C1556 gpio_noesd[8] vdd 0.61fF -C1557 gpio_analog[8] vdd 0.61fF -C1558 gpio_analog[5] vdd 0.61fF -C1559 gpio_noesd[5] vdd 0.61fF -C1560 io_in_3v3[12] vdd 0.61fF -C1561 io_in[12] vdd 0.61fF -C1562 io_out[12] vdd 0.61fF -C1563 io_oeb[12] vdd 0.61fF -C1564 io_oeb[14] vdd 0.61fF -C1565 io_out[14] vdd 0.61fF -C1566 io_in[14] vdd 0.61fF -C1567 io_in_3v3[14] vdd 0.61fF -C1568 gpio_noesd[7] vdd 0.61fF -C1569 gpio_analog[7] vdd 0.61fF -C1570 vssa2 vdd 13.04fF -C1571 gpio_analog[6] vdd 0.61fF -C1572 gpio_noesd[6] vdd 0.61fF -C1573 io_in_3v3[13] vdd 0.61fF -C1574 io_in[13] vdd 0.61fF -C1575 io_out[13] vdd 0.61fF -C1576 io_oeb[13] vdd 0.61fF -C1577 vccd1 vdd 13.04fF -C1578 vccd2 vdd 13.04fF -C1579 io_analog[0] vdd 6.83fF -C1580 io_analog[10] vdd 6.83fF -C1581 io_analog[1] vdd 6.83fF -C1582 io_analog[2] vdd 6.83fF -C1583 io_analog[3] vdd 6.83fF -C1584 io_clamp_high[0] vdd 3.58fF -C1585 io_clamp_low[0] vdd 3.58fF -C1586 io_clamp_high[1] vdd 3.58fF -C1587 io_clamp_low[1] vdd 3.58fF -C1588 io_clamp_high[2] vdd 3.58fF -C1589 io_clamp_low[2] vdd 3.58fF -C1590 io_analog[7] vdd 6.83fF -C1591 io_analog[8] vdd 6.83fF -C1592 io_analog[9] vdd 6.83fF -C1593 user_irq[2] vdd 0.63fF -C1594 user_irq[1] vdd 0.63fF -C1595 user_irq[0] vdd 0.63fF -C1596 user_clock2 vdd 0.63fF -C1597 la_oenb[127] vdd 0.63fF -C1598 la_data_out[127] vdd 0.63fF -C1599 la_data_in[127] vdd 0.63fF -C1600 la_oenb[126] vdd 0.63fF -C1601 la_data_out[126] vdd 0.63fF -C1602 la_data_in[126] vdd 0.63fF -C1603 la_oenb[125] vdd 0.63fF -C1604 la_data_out[125] vdd 0.63fF -C1605 la_data_in[125] vdd 0.63fF -C1606 la_oenb[124] vdd 0.63fF -C1607 la_data_out[124] vdd 0.63fF -C1608 la_data_in[124] vdd 0.63fF -C1609 la_oenb[123] vdd 0.63fF -C1610 la_data_out[123] vdd 0.63fF -C1611 la_data_in[123] vdd 0.63fF -C1612 la_oenb[122] vdd 0.63fF -C1613 la_data_out[122] vdd 0.63fF -C1614 la_data_in[122] vdd 0.63fF -C1615 la_oenb[121] vdd 0.63fF -C1616 la_data_out[121] vdd 0.63fF -C1617 la_data_in[121] vdd 0.63fF -C1618 la_oenb[120] vdd 0.63fF -C1619 la_data_out[120] vdd 0.63fF -C1620 la_data_in[120] vdd 0.63fF -C1621 la_oenb[119] vdd 0.63fF -C1622 la_data_out[119] vdd 0.63fF -C1623 la_data_in[119] vdd 0.63fF -C1624 la_oenb[118] vdd 0.63fF -C1625 la_data_out[118] vdd 0.63fF -C1626 la_data_in[118] vdd 0.63fF -C1627 la_oenb[117] vdd 0.63fF -C1628 la_data_out[117] vdd 0.63fF -C1629 la_data_in[117] vdd 0.63fF -C1630 la_oenb[116] vdd 0.63fF -C1631 la_data_out[116] vdd 0.63fF -C1632 la_data_in[116] vdd 0.63fF -C1633 la_oenb[115] vdd 0.63fF -C1634 la_data_out[115] vdd 0.63fF -C1635 la_data_in[115] vdd 0.63fF -C1636 la_oenb[114] vdd 0.63fF -C1637 la_data_out[114] vdd 0.63fF -C1638 la_data_in[114] vdd 0.63fF -C1639 la_oenb[113] vdd 0.63fF -C1640 la_data_out[113] vdd 0.63fF -C1641 la_data_in[113] vdd 0.63fF -C1642 la_oenb[112] vdd 0.63fF -C1643 la_data_out[112] vdd 0.63fF -C1644 la_data_in[112] vdd 0.63fF -C1645 la_oenb[111] vdd 0.63fF -C1646 la_data_out[111] vdd 0.63fF -C1647 la_data_in[111] vdd 0.63fF -C1648 la_oenb[110] vdd 0.63fF -C1649 la_data_out[110] vdd 0.63fF -C1650 la_data_in[110] vdd 0.63fF -C1651 la_oenb[109] vdd 0.63fF -C1652 la_data_out[109] vdd 0.63fF -C1653 la_data_in[109] vdd 0.63fF -C1654 la_oenb[108] vdd 0.63fF -C1655 la_data_out[108] vdd 0.63fF -C1656 la_data_in[108] vdd 0.63fF -C1657 la_oenb[107] vdd 0.63fF -C1658 la_data_out[107] vdd 0.63fF -C1659 la_data_in[107] vdd 0.63fF -C1660 la_oenb[106] vdd 0.63fF -C1661 la_data_out[106] vdd 0.63fF -C1662 la_data_in[106] vdd 0.63fF -C1663 la_oenb[105] vdd 0.63fF -C1664 la_data_out[105] vdd 0.63fF -C1665 la_data_in[105] vdd 0.63fF -C1666 la_oenb[104] vdd 0.63fF -C1667 la_data_out[104] vdd 0.63fF -C1668 la_data_in[104] vdd 0.63fF -C1669 la_oenb[103] vdd 0.63fF -C1670 la_data_out[103] vdd 0.63fF -C1671 la_data_in[103] vdd 0.63fF -C1672 la_oenb[102] vdd 0.63fF -C1673 la_data_out[102] vdd 0.63fF -C1674 la_data_in[102] vdd 0.63fF -C1675 la_oenb[101] vdd 0.63fF -C1676 la_data_out[101] vdd 0.63fF -C1677 la_data_in[101] vdd 0.63fF -C1678 la_oenb[100] vdd 0.63fF -C1679 la_data_out[100] vdd 0.63fF -C1680 la_data_in[100] vdd 0.63fF -C1681 la_oenb[99] vdd 0.63fF -C1682 la_data_out[99] vdd 0.63fF -C1683 la_data_in[99] vdd 0.63fF -C1684 la_oenb[98] vdd 0.63fF -C1685 la_data_out[98] vdd 0.63fF -C1686 la_data_in[98] vdd 0.63fF -C1687 la_oenb[97] vdd 0.63fF -C1688 la_data_out[97] vdd 0.63fF -C1689 la_data_in[97] vdd 0.63fF -C1690 la_oenb[96] vdd 0.63fF -C1691 la_data_out[96] vdd 0.63fF -C1692 la_data_in[96] vdd 0.63fF -C1693 la_oenb[95] vdd 0.63fF -C1694 la_data_out[95] vdd 0.63fF -C1695 la_data_in[95] vdd 0.63fF -C1696 la_oenb[94] vdd 0.63fF -C1697 la_data_out[94] vdd 0.63fF -C1698 la_data_in[94] vdd 0.63fF -C1699 la_oenb[93] vdd 0.63fF -C1700 la_data_out[93] vdd 0.63fF -C1701 la_data_in[93] vdd 0.63fF -C1702 la_oenb[92] vdd 0.63fF -C1703 la_data_out[92] vdd 0.63fF -C1704 la_data_in[92] vdd 0.63fF -C1705 la_oenb[91] vdd 0.63fF -C1706 la_data_out[91] vdd 0.63fF -C1707 la_data_in[91] vdd 0.63fF -C1708 la_oenb[90] vdd 0.63fF -C1709 la_data_out[90] vdd 0.63fF -C1710 la_data_in[90] vdd 0.63fF -C1711 la_oenb[89] vdd 0.63fF -C1712 la_data_out[89] vdd 0.63fF -C1713 la_data_in[89] vdd 0.63fF -C1714 la_oenb[88] vdd 0.63fF -C1715 la_data_out[88] vdd 0.63fF -C1716 la_data_in[88] vdd 0.63fF -C1717 la_oenb[87] vdd 0.63fF -C1718 la_data_out[87] vdd 0.63fF -C1719 la_data_in[87] vdd 0.63fF -C1720 la_oenb[86] vdd 0.63fF -C1721 la_data_out[86] vdd 0.63fF -C1722 la_data_in[86] vdd 0.63fF -C1723 la_oenb[85] vdd 0.63fF -C1724 la_data_out[85] vdd 0.63fF -C1725 la_data_in[85] vdd 0.63fF -C1726 la_oenb[84] vdd 0.63fF -C1727 la_data_out[84] vdd 0.63fF -C1728 la_data_in[84] vdd 0.63fF -C1729 la_oenb[83] vdd 0.63fF -C1730 la_data_out[83] vdd 0.63fF -C1731 la_data_in[83] vdd 0.63fF -C1732 la_oenb[82] vdd 0.63fF -C1733 la_data_out[82] vdd 0.63fF -C1734 la_data_in[82] vdd 0.63fF -C1735 la_oenb[81] vdd 0.63fF -C1736 la_data_out[81] vdd 0.63fF -C1737 la_data_in[81] vdd 0.63fF -C1738 la_oenb[80] vdd 0.63fF -C1739 la_data_out[80] vdd 0.63fF -C1740 la_data_in[80] vdd 0.63fF -C1741 la_oenb[79] vdd 0.63fF -C1742 la_data_out[79] vdd 0.63fF -C1743 la_data_in[79] vdd 0.63fF -C1744 la_oenb[78] vdd 0.63fF -C1745 la_data_out[78] vdd 0.63fF -C1746 la_data_in[78] vdd 0.63fF -C1747 la_oenb[77] vdd 0.63fF -C1748 la_data_out[77] vdd 0.63fF -C1749 la_data_in[77] vdd 0.63fF -C1750 la_oenb[76] vdd 0.63fF -C1751 la_data_out[76] vdd 0.63fF -C1752 la_data_in[76] vdd 0.63fF -C1753 la_oenb[75] vdd 0.63fF -C1754 la_data_out[75] vdd 0.63fF -C1755 la_data_in[75] vdd 0.63fF -C1756 la_oenb[74] vdd 0.63fF -C1757 la_data_out[74] vdd 0.63fF -C1758 la_data_in[74] vdd 0.63fF -C1759 la_oenb[73] vdd 0.63fF -C1760 la_data_out[73] vdd 0.63fF -C1761 la_data_in[73] vdd 0.63fF -C1762 la_oenb[72] vdd 0.63fF -C1763 la_data_out[72] vdd 0.63fF -C1764 la_data_in[72] vdd 0.63fF -C1765 la_oenb[71] vdd 0.63fF -C1766 la_data_out[71] vdd 0.63fF -C1767 la_data_in[71] vdd 0.63fF -C1768 la_oenb[70] vdd 0.63fF -C1769 la_data_out[70] vdd 0.63fF -C1770 la_data_in[70] vdd 0.63fF -C1771 la_oenb[69] vdd 0.63fF -C1772 la_data_out[69] vdd 0.63fF -C1773 la_data_in[69] vdd 0.63fF -C1774 la_oenb[68] vdd 0.63fF -C1775 la_data_out[68] vdd 0.63fF -C1776 la_data_in[68] vdd 0.63fF -C1777 la_oenb[67] vdd 0.63fF -C1778 la_data_out[67] vdd 0.63fF -C1779 la_data_in[67] vdd 0.63fF -C1780 la_oenb[66] vdd 0.63fF -C1781 la_data_out[66] vdd 0.63fF -C1782 la_data_in[66] vdd 0.63fF -C1783 la_oenb[65] vdd 0.63fF -C1784 la_data_out[65] vdd 0.63fF -C1785 la_data_in[65] vdd 0.63fF -C1786 la_oenb[64] vdd 0.63fF -C1787 la_data_out[64] vdd 0.63fF -C1788 la_data_in[64] vdd 0.63fF -C1789 la_oenb[63] vdd 0.63fF -C1790 la_data_out[63] vdd 0.63fF -C1791 la_data_in[63] vdd 0.63fF -C1792 la_oenb[62] vdd 0.63fF -C1793 la_data_out[62] vdd 0.63fF -C1794 la_data_in[62] vdd 0.63fF -C1795 la_oenb[61] vdd 0.63fF -C1796 la_data_out[61] vdd 0.63fF -C1797 la_data_in[61] vdd 0.63fF -C1798 la_oenb[60] vdd 0.63fF -C1799 la_data_out[60] vdd 0.63fF -C1800 la_data_in[60] vdd 0.63fF -C1801 la_oenb[59] vdd 0.63fF -C1802 la_data_out[59] vdd 0.63fF -C1803 la_data_in[59] vdd 0.63fF -C1804 la_oenb[58] vdd 0.63fF -C1805 la_data_out[58] vdd 0.63fF -C1806 la_data_in[58] vdd 0.63fF -C1807 la_oenb[57] vdd 0.63fF -C1808 la_data_out[57] vdd 0.63fF -C1809 la_data_in[57] vdd 0.63fF -C1810 la_oenb[56] vdd 0.63fF -C1811 la_data_out[56] vdd 0.63fF -C1812 la_data_in[56] vdd 0.63fF -C1813 la_oenb[55] vdd 0.63fF -C1814 la_data_out[55] vdd 0.63fF -C1815 la_data_in[55] vdd 0.63fF -C1816 la_oenb[54] vdd 0.63fF -C1817 la_data_out[54] vdd 0.63fF -C1818 la_data_in[54] vdd 0.63fF -C1819 la_oenb[53] vdd 0.63fF -C1820 la_data_out[53] vdd 0.63fF -C1821 la_data_in[53] vdd 0.63fF -C1822 la_oenb[52] vdd 0.63fF -C1823 la_data_out[52] vdd 0.63fF -C1824 la_data_in[52] vdd 0.63fF -C1825 la_oenb[51] vdd 0.63fF -C1826 la_data_out[51] vdd 0.63fF -C1827 la_data_in[51] vdd 0.63fF -C1828 la_oenb[50] vdd 0.63fF -C1829 la_data_out[50] vdd 0.63fF -C1830 la_data_in[50] vdd 0.63fF -C1831 la_oenb[49] vdd 0.63fF -C1832 la_data_out[49] vdd 0.63fF -C1833 la_data_in[49] vdd 0.63fF -C1834 la_oenb[48] vdd 0.63fF -C1835 la_data_out[48] vdd 0.63fF -C1836 la_data_in[48] vdd 0.63fF -C1837 la_oenb[47] vdd 0.63fF -C1838 la_data_out[47] vdd 0.63fF -C1839 la_data_in[47] vdd 0.63fF -C1840 la_oenb[46] vdd 0.63fF -C1841 la_data_out[46] vdd 0.63fF -C1842 la_data_in[46] vdd 0.63fF -C1843 la_oenb[45] vdd 0.63fF -C1844 la_data_out[45] vdd 0.63fF -C1845 la_data_in[45] vdd 0.63fF -C1846 la_oenb[44] vdd 0.63fF -C1847 la_data_out[44] vdd 0.63fF -C1848 la_data_in[44] vdd 0.63fF -C1849 la_oenb[43] vdd 0.63fF -C1850 la_data_out[43] vdd 0.63fF -C1851 la_data_in[43] vdd 0.63fF -C1852 la_oenb[42] vdd 0.63fF -C1853 la_data_out[42] vdd 0.63fF -C1854 la_data_in[42] vdd 0.63fF -C1855 la_oenb[41] vdd 0.63fF -C1856 la_data_out[41] vdd 0.63fF -C1857 la_data_in[41] vdd 0.63fF -C1858 la_oenb[40] vdd 0.63fF -C1859 la_data_out[40] vdd 0.63fF -C1860 la_data_in[40] vdd 0.63fF -C1861 la_oenb[39] vdd 0.63fF -C1862 la_data_out[39] vdd 0.63fF -C1863 la_data_in[39] vdd 0.63fF -C1864 la_oenb[38] vdd 0.63fF -C1865 la_data_out[38] vdd 0.63fF -C1866 la_data_in[38] vdd 0.63fF -C1867 la_oenb[37] vdd 0.63fF -C1868 la_data_out[37] vdd 0.63fF -C1869 la_data_in[37] vdd 0.63fF -C1870 la_oenb[36] vdd 0.63fF -C1871 la_data_out[36] vdd 0.63fF -C1872 la_data_in[36] vdd 0.63fF -C1873 la_oenb[35] vdd 0.63fF -C1874 la_data_out[35] vdd 0.63fF -C1875 la_data_in[35] vdd 0.63fF -C1876 la_oenb[34] vdd 0.63fF -C1877 la_data_out[34] vdd 0.63fF -C1878 la_data_in[34] vdd 0.63fF -C1879 la_oenb[33] vdd 0.63fF -C1880 la_data_out[33] vdd 0.63fF -C1881 la_data_in[33] vdd 0.63fF -C1882 la_oenb[32] vdd 0.63fF -C1883 la_data_out[32] vdd 0.63fF -C1884 la_data_in[32] vdd 0.63fF -C1885 la_oenb[31] vdd 0.63fF -C1886 la_data_out[31] vdd 0.63fF -C1887 la_data_in[31] vdd 0.63fF -C1888 la_oenb[30] vdd 0.63fF -C1889 la_data_out[30] vdd 0.63fF -C1890 la_data_in[30] vdd 0.63fF -C1891 la_oenb[29] vdd 0.63fF -C1892 la_data_out[29] vdd 0.63fF -C1893 la_data_in[29] vdd 0.63fF -C1894 la_oenb[28] vdd 0.63fF -C1895 la_data_out[28] vdd 0.63fF -C1896 la_data_in[28] vdd 0.63fF -C1897 la_oenb[27] vdd 0.63fF -C1898 la_data_out[27] vdd 0.63fF -C1899 la_data_in[27] vdd 0.63fF -C1900 la_oenb[26] vdd 0.63fF -C1901 la_data_out[26] vdd 0.63fF -C1902 la_data_in[26] vdd 0.63fF -C1903 la_oenb[25] vdd 0.63fF -C1904 la_data_out[25] vdd 0.63fF -C1905 la_data_in[25] vdd 0.63fF -C1906 la_oenb[24] vdd 0.63fF -C1907 la_data_out[24] vdd 0.63fF -C1908 la_data_in[24] vdd 0.63fF -C1909 la_oenb[23] vdd 0.63fF -C1910 la_data_out[23] vdd 0.63fF -C1911 la_data_in[23] vdd 0.63fF -C1912 la_oenb[22] vdd 0.63fF -C1913 la_data_out[22] vdd 0.63fF -C1914 la_data_in[22] vdd 0.63fF -C1915 la_oenb[21] vdd 0.63fF -C1916 la_data_out[21] vdd 0.63fF -C1917 la_data_in[21] vdd 0.63fF -C1918 la_oenb[20] vdd 0.63fF -C1919 la_data_out[20] vdd 0.63fF -C1920 la_data_in[20] vdd 0.63fF -C1921 la_oenb[19] vdd 0.63fF -C1922 la_data_out[19] vdd 0.63fF -C1923 la_data_in[19] vdd 0.63fF -C1924 la_oenb[18] vdd 0.63fF -C1925 la_data_out[18] vdd 0.63fF -C1926 la_data_in[18] vdd 0.63fF -C1927 la_oenb[17] vdd 0.63fF -C1928 la_data_out[17] vdd 0.63fF -C1929 la_data_in[17] vdd 0.63fF -C1930 la_oenb[16] vdd 0.63fF -C1931 la_data_out[16] vdd 0.63fF -C1932 la_data_in[16] vdd 0.63fF -C1933 la_oenb[15] vdd 0.63fF -C1934 la_data_out[15] vdd 0.63fF -C1935 la_data_in[15] vdd 0.63fF -C1936 la_oenb[14] vdd 0.63fF -C1937 la_data_out[14] vdd 0.63fF -C1938 la_data_in[14] vdd 0.63fF -C1939 la_oenb[13] vdd 0.63fF -C1940 la_data_out[13] vdd 0.63fF -C1941 la_data_in[13] vdd 0.63fF -C1942 la_oenb[12] vdd 0.63fF -C1943 la_data_out[12] vdd 0.63fF -C1944 la_data_in[12] vdd 0.63fF -C1945 la_oenb[11] vdd 0.63fF -C1946 la_data_out[11] vdd 0.63fF -C1947 la_data_in[11] vdd 0.63fF -C1948 la_oenb[10] vdd 0.63fF -C1949 la_data_out[10] vdd 0.63fF -C1950 la_data_in[10] vdd 0.63fF -C1951 la_oenb[9] vdd 0.63fF -C1952 la_data_out[9] vdd 0.63fF -C1953 la_data_in[9] vdd 0.63fF -C1954 la_oenb[8] vdd 0.63fF -C1955 la_data_out[8] vdd 0.63fF -C1956 la_data_in[8] vdd 0.63fF -C1957 la_oenb[7] vdd 0.63fF -C1958 la_data_out[7] vdd 0.63fF -C1959 la_data_in[7] vdd 0.63fF -C1960 la_oenb[6] vdd 0.63fF -C1961 la_data_out[6] vdd 0.63fF -C1962 la_data_in[6] vdd 0.63fF -C1963 la_oenb[5] vdd 0.63fF -C1964 la_data_out[5] vdd 0.63fF -C1965 la_data_in[5] vdd 0.63fF -C1966 la_oenb[4] vdd 0.63fF -C1967 la_data_out[4] vdd 0.63fF -C1968 la_data_in[4] vdd 0.63fF -C1969 la_oenb[3] vdd 0.63fF -C1970 la_data_out[3] vdd 0.63fF -C1971 la_data_in[3] vdd 0.63fF -C1972 la_oenb[2] vdd 0.63fF -C1973 la_data_out[2] vdd 0.63fF -C1974 la_data_in[2] vdd 0.63fF -C1975 la_oenb[1] vdd 0.63fF -C1976 la_data_out[1] vdd 0.63fF -C1977 la_data_in[1] vdd 0.63fF -C1978 la_oenb[0] vdd 0.63fF -C1979 la_data_out[0] vdd 0.63fF -C1980 la_data_in[0] vdd 0.63fF -C1981 wbs_dat_o[31] vdd 0.63fF -C1982 wbs_dat_i[31] vdd 0.63fF -C1983 wbs_adr_i[31] vdd 0.63fF -C1984 wbs_dat_o[30] vdd 0.63fF -C1985 wbs_dat_i[30] vdd 0.63fF -C1986 wbs_adr_i[30] vdd 0.63fF -C1987 wbs_dat_o[29] vdd 0.63fF -C1988 wbs_dat_i[29] vdd 0.63fF -C1989 wbs_adr_i[29] vdd 0.63fF -C1990 wbs_dat_o[28] vdd 0.63fF -C1991 wbs_dat_i[28] vdd 0.63fF -C1992 wbs_adr_i[28] vdd 0.63fF -C1993 wbs_dat_o[27] vdd 0.63fF -C1994 wbs_dat_i[27] vdd 0.63fF -C1995 wbs_adr_i[27] vdd 0.63fF -C1996 wbs_dat_o[26] vdd 0.63fF -C1997 wbs_dat_i[26] vdd 0.63fF -C1998 wbs_adr_i[26] vdd 0.63fF -C1999 wbs_dat_o[25] vdd 0.63fF -C2000 wbs_dat_i[25] vdd 0.63fF -C2001 wbs_adr_i[25] vdd 0.63fF -C2002 wbs_dat_o[24] vdd 0.63fF -C2003 wbs_dat_i[24] vdd 0.63fF -C2004 wbs_adr_i[24] vdd 0.63fF -C2005 wbs_dat_o[23] vdd 0.63fF -C2006 wbs_dat_i[23] vdd 0.63fF -C2007 wbs_adr_i[23] vdd 0.63fF -C2008 wbs_dat_o[22] vdd 0.63fF -C2009 wbs_dat_i[22] vdd 0.63fF -C2010 wbs_adr_i[22] vdd 0.63fF -C2011 wbs_dat_o[21] vdd 0.63fF -C2012 wbs_dat_i[21] vdd 0.63fF -C2013 wbs_adr_i[21] vdd 0.63fF -C2014 wbs_dat_o[20] vdd 0.63fF -C2015 wbs_dat_i[20] vdd 0.63fF -C2016 wbs_adr_i[20] vdd 0.63fF -C2017 wbs_dat_o[19] vdd 0.63fF -C2018 wbs_dat_i[19] vdd 0.63fF -C2019 wbs_adr_i[19] vdd 0.63fF -C2020 wbs_dat_o[18] vdd 0.63fF -C2021 wbs_dat_i[18] vdd 0.63fF -C2022 wbs_adr_i[18] vdd 0.63fF -C2023 wbs_dat_o[17] vdd 0.63fF -C2024 wbs_dat_i[17] vdd 0.63fF -C2025 wbs_adr_i[17] vdd 0.63fF -C2026 wbs_dat_o[16] vdd 0.63fF -C2027 wbs_dat_i[16] vdd 0.63fF -C2028 wbs_adr_i[16] vdd 0.63fF -C2029 wbs_dat_o[15] vdd 0.63fF -C2030 wbs_dat_i[15] vdd 0.63fF -C2031 wbs_adr_i[15] vdd 0.63fF -C2032 wbs_dat_o[14] vdd 0.63fF -C2033 wbs_dat_i[14] vdd 0.63fF -C2034 wbs_adr_i[14] vdd 0.63fF -C2035 wbs_dat_o[13] vdd 0.63fF -C2036 wbs_dat_i[13] vdd 0.63fF -C2037 wbs_adr_i[13] vdd 0.63fF -C2038 wbs_dat_o[12] vdd 0.63fF -C2039 wbs_dat_i[12] vdd 0.63fF -C2040 wbs_adr_i[12] vdd 0.63fF -C2041 wbs_dat_o[11] vdd 0.63fF -C2042 wbs_dat_i[11] vdd 0.63fF -C2043 wbs_adr_i[11] vdd 0.63fF -C2044 wbs_dat_o[10] vdd 0.63fF -C2045 wbs_dat_i[10] vdd 0.63fF -C2046 wbs_adr_i[10] vdd 0.63fF -C2047 wbs_dat_o[9] vdd 0.63fF -C2048 wbs_dat_i[9] vdd 0.63fF -C2049 wbs_adr_i[9] vdd 0.63fF -C2050 wbs_dat_o[8] vdd 0.63fF -C2051 wbs_dat_i[8] vdd 0.63fF -C2052 wbs_adr_i[8] vdd 0.63fF -C2053 wbs_dat_o[7] vdd 0.63fF -C2054 wbs_dat_i[7] vdd 0.63fF -C2055 wbs_adr_i[7] vdd 0.63fF -C2056 wbs_dat_o[6] vdd 0.63fF -C2057 wbs_dat_i[6] vdd 0.63fF -C2058 wbs_adr_i[6] vdd 0.63fF -C2059 wbs_dat_o[5] vdd 0.63fF -C2060 wbs_dat_i[5] vdd 0.63fF -C2061 wbs_adr_i[5] vdd 0.63fF -C2062 wbs_dat_o[4] vdd 0.63fF -C2063 wbs_dat_i[4] vdd 0.63fF -C2064 wbs_adr_i[4] vdd 0.63fF -C2065 wbs_sel_i[3] vdd 0.63fF -C2066 wbs_dat_o[3] vdd 0.63fF -C2067 wbs_dat_i[3] vdd 0.63fF -C2068 wbs_adr_i[3] vdd 0.63fF -C2069 wbs_sel_i[2] vdd 0.63fF -C2070 wbs_dat_o[2] vdd 0.63fF -C2071 wbs_dat_i[2] vdd 0.63fF -C2072 wbs_adr_i[2] vdd 0.63fF -C2073 wbs_sel_i[1] vdd 0.63fF -C2074 wbs_dat_o[1] vdd 0.63fF -C2075 wbs_dat_i[1] vdd 0.63fF -C2076 wbs_adr_i[1] vdd 0.63fF -C2077 wbs_sel_i[0] vdd 0.63fF -C2078 wbs_dat_o[0] vdd 0.63fF -C2079 wbs_dat_i[0] vdd 0.63fF -C2080 wbs_adr_i[0] vdd 0.63fF -C2081 wbs_we_i vdd 0.63fF -C2082 wbs_stb_i vdd 0.63fF -C2083 wbs_cyc_i vdd 0.63fF -C2084 wbs_ack_o vdd 0.63fF -C2085 wb_rst_i vdd 0.63fF -C2086 wb_clk_i vdd 0.63fF -C2087 pll_full_0/divider_0/and_0/Z1 vdd 0.65fF -C2088 pll_full_0/divider_0/and_0/B vdd 2.45fF -C2089 pll_full_0/divider_0/and_0/A vdd 2.35fF -C2090 pll_full_0/divider_0/and_0/out1 vdd 2.99fF -C2091 pll_full_0/divider_0/tspc_2/Z4 vdd 0.86fF -C2092 pll_full_0/divbuf_0/IN vdd 9.95fF -C2093 pll_full_0/divider_0/tspc_2/Z3 vdd 2.26fF -C2094 pll_full_0/divider_0/tspc_2/Z2 vdd 1.46fF -C2095 pll_full_0/divider_0/tspc_2/Z1 vdd 0.99fF -C2096 pll_full_0/divider_0/nor_0/B vdd 6.48fF -C2097 pll_full_0/divider_0/tspc_2/a_630_n680# vdd 1.14fF **FLOATING -C2098 pll_full_0/divider_0/tspc_1/Z4 vdd 0.86fF -C2099 pll_full_0/divider_0/tspc_1/Q vdd 3.12fF -C2100 pll_full_0/divider_0/tspc_1/Z3 vdd 2.26fF -C2101 pll_full_0/divider_0/tspc_1/Z2 vdd 1.46fF -C2102 pll_full_0/divider_0/tspc_1/Z1 vdd 0.99fF -C2103 pll_full_0/divider_0/nor_1/B vdd 7.12fF -C2104 pll_full_0/divider_0/tspc_1/a_630_n680# vdd 1.15fF **FLOATING -C2105 pll_full_0/divider_0/tspc_0/Z4 vdd 0.86fF -C2106 pll_full_0/divider_0/tspc_0/Q vdd 3.14fF -C2107 pll_full_0/divider_0/tspc_0/Z3 vdd 2.26fF -C2108 pll_full_0/divider_0/tspc_0/Z2 vdd 1.46fF -C2109 pll_full_0/divider_0/tspc_0/Z1 vdd 0.99fF -C2110 pll_full_0/divider_0/nor_1/A vdd 7.08fF -C2111 pll_full_0/divider_0/tspc_0/a_630_n680# vdd 1.15fF **FLOATING -C2112 pll_full_0/divider_0/clk vdd 31.85fF -C2113 pll_full_0/divider_0/prescaler_0/Out vdd 4.59fF -C2114 pll_full_0/divider_0/prescaler_0/nand_1/z1 vdd 0.36fF -C2115 pll_full_0/divider_0/prescaler_0/tspc_2/D vdd 2.64fF -C2116 pll_full_0/divider_0/prescaler_0/tspc_0/Q vdd 3.64fF -C2117 pll_full_0/divider_0/prescaler_0/tspc_1/Q vdd 3.61fF -C2118 pll_full_0/divider_0/prescaler_0/nand_0/z1 vdd 0.36fF -C2119 pll_full_0/divider_0/prescaler_0/tspc_0/D vdd 3.12fF -C2120 pll_full_0/divider_0/and_0/OUT vdd 5.67fF -C2121 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 vdd 0.86fF -C2122 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 vdd 2.26fF -C2123 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 vdd 1.46fF -C2124 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 vdd 0.99fF -C2125 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# vdd 1.16fF **FLOATING -C2126 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# vdd 2.11fF **FLOATING -C2127 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 vdd 0.86fF -C2128 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 vdd 2.26fF -C2129 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 vdd 1.48fF -C2130 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 vdd 0.99fF -C2131 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# vdd 1.14fF **FLOATING -C2132 pll_full_0/divider_0/prescaler_0/m1_2700_2190# vdd 4.22fF **FLOATING -C2133 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 vdd 0.86fF -C2134 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 vdd 2.26fF -C2135 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 vdd 1.19fF -C2136 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 vdd 0.99fF -C2137 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# vdd 1.47fF **FLOATING -C2138 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# vdd 2.11fF **FLOATING -C2139 pll_full_0/divider_0/nor_1/Z1 vdd 1.34fF -C2140 pll_full_0/divider_0/nor_0/Z1 vdd 1.34fF -C2141 pll_full_0/divbuf_1/OUT vdd 363.82fF -C2142 pll_full_0/divbuf_1/OUT5 vdd 350.37fF -C2143 pll_full_0/divbuf_1/OUT4 vdd 133.72fF -C2144 pll_full_0/divbuf_1/OUT3 vdd 34.03fF -C2145 pll_full_0/divbuf_1/OUT2 vdd 8.71fF -C2146 pll_full_0/divbuf_1/a_492_n240# vdd 2.46fF **FLOATING -C2147 pll_full_0/divbuf_0/OUT5 vdd 350.37fF -C2148 pll_full_0/divbuf_0/OUT4 vdd 133.72fF -C2149 pll_full_0/divbuf_0/OUT3 vdd 34.03fF -C2150 pll_full_0/divbuf_0/OUT2 vdd 8.71fF -C2151 pll_full_0/divbuf_0/a_492_n240# vdd 2.46fF **FLOATING -C2152 pll_full_0/ro_complete_0/cbank_2/v vdd 17.88fF -C2153 pll_full_0/ro_complete_0/cbank_2/switch_5/vin vdd 0.78fF -C2154 pll_full_0/ro_complete_0/cbank_2/switch_4/vin vdd 1.50fF -C2155 pll_full_0/ro_complete_0/cbank_2/switch_2/vin vdd 1.30fF -C2156 pll_full_0/ro_complete_0/cbank_2/switch_3/vin vdd 0.56fF -C2157 pll_full_0/ro_complete_0/cbank_2/switch_1/vin vdd 1.14fF -C2158 pll_full_0/ro_complete_0/cbank_2/switch_0/vin vdd 1.02fF -C2159 pll_full_0/ro_complete_0/cbank_1/switch_5/vin vdd 0.78fF -C2160 pll_full_0/ro_complete_0/a0 vdd 7.88fF -C2161 pll_full_0/ro_complete_0/cbank_1/switch_4/vin vdd 1.50fF -C2162 pll_full_0/ro_complete_0/a1 vdd 5.39fF -C2163 pll_full_0/ro_complete_0/cbank_1/switch_2/vin vdd 1.30fF -C2164 pll_full_0/ro_complete_0/a3 vdd 6.85fF -C2165 pll_full_0/ro_complete_0/cbank_1/switch_3/vin vdd 0.56fF -C2166 pll_full_0/ro_complete_0/a2 vdd 5.48fF -C2167 pll_full_0/ro_complete_0/cbank_1/switch_1/vin vdd 1.14fF -C2168 pll_full_0/ro_complete_0/a4 vdd 5.36fF -C2169 pll_full_0/ro_complete_0/cbank_1/switch_0/vin vdd 1.02fF -C2170 pll_full_0/ro_complete_0/a5 vdd 5.19fF -C2171 pll_full_0/ro_complete_0/cbank_0/v vdd 15.02fF -C2172 pll_full_0/ro_complete_0/cbank_0/switch_5/vin vdd 0.78fF -C2173 pll_full_0/ro_complete_0/cbank_0/switch_4/vin vdd 1.50fF -C2174 pll_full_0/ro_complete_0/cbank_0/switch_2/vin vdd 1.30fF -C2175 pll_full_0/ro_complete_0/cbank_0/switch_3/vin vdd 0.56fF -C2176 pll_full_0/ro_complete_0/cbank_0/switch_1/vin vdd 1.14fF -C2177 pll_full_0/ro_complete_0/cbank_0/switch_0/vin vdd 1.02fF -C2178 pll_full_0/ro_complete_0/ro_var_extend_0/vcont vdd 0.27fF -C2179 pll_full_0/filter_0/a_4216_n5230# vdd 419.25fF **FLOATING -C2180 pll_full_0/filter_0/a_4216_n2998# vdd 1.39fF **FLOATING -C2181 pll_full_0/cp_0/down vdd 1.54fF -C2182 pll_full_0/cp_0/upbar vdd 1.79fF -C2183 pll_full_0/cp_0/a_7110_n2840# vdd 0.17fF **FLOATING -C2184 pll_full_0/cp_0/a_3060_n2840# vdd 1.71fF **FLOATING -C2185 pll_full_0/cp_0/a_7110_0# vdd 0.17fF **FLOATING -C2186 pll_full_0/cp_0/a_6370_0# vdd 0.40fF **FLOATING -C2187 pll_full_0/cp_0/a_3060_0# vdd 2.49fF **FLOATING -C2188 pll_full_0/cp_0/a_1710_0# vdd 7.47fF **FLOATING -C2189 pll_full_0/pd_0/and_pd_0/Z1 vdd 0.39fF -C2190 pll_full_0/pd_0/and_pd_0/Out1 vdd 2.22fF -C2191 pll_full_0/pd_0/tspc_r_1/z5 vdd 1.10fF -C2192 pll_full_0/pd_0/tspc_r_1/Z4 vdd 1.07fF -C2193 pll_full_0/pd_0/tspc_r_1/Qbar vdd 0.88fF -C2194 pll_full_0/pd_0/tspc_r_1/Z2 vdd 1.22fF -C2195 pll_full_0/pd_0/tspc_r_1/Z1 vdd 0.67fF -C2196 pll_full_0/pd_0/UP vdd 6.61fF -C2197 pll_full_0/pd_0/tspc_r_1/Qbar1 vdd 1.34fF -C2198 pll_full_0/pd_0/tspc_r_1/Z3 vdd 2.12fF -C2199 pll_full_0/pd_0/REF vdd 6.44fF -C2200 pll_full_0/pd_0/tspc_r_0/z5 vdd 1.10fF -C2201 pll_full_0/pd_0/tspc_r_0/Z4 vdd 1.07fF -C2202 pll_full_0/pd_0/R vdd 3.05fF -C2203 pll_full_0/pd_0/tspc_r_0/Qbar vdd 0.79fF -C2204 pll_full_0/pd_0/tspc_r_0/Z2 vdd 1.22fF -C2205 pll_full_0/pd_0/tspc_r_0/Z1 vdd 0.67fF -C2206 pll_full_0/pd_0/DOWN vdd 7.24fF -C2207 pll_full_0/pd_0/tspc_r_0/Qbar1 vdd 1.34fF -C2208 pll_full_0/pd_0/tspc_r_0/Z3 vdd 2.12fF -C2209 pll_full_0/pd_0/DIV vdd 371.87fF -C2210 divider_0/and_0/Z1 vdd 0.74fF -C2211 divider_0/and_0/B vdd 2.25fF -C2212 divider_0/and_0/A vdd 2.19fF -C2213 divider_0/and_0/out1 vdd 2.93fF -C2214 divider_0/tspc_2/Z4 vdd 0.86fF -C2215 divider_0/Out vdd 1.60fF -C2216 divider_0/tspc_2/Z3 vdd 2.26fF -C2217 divider_0/tspc_2/Z2 vdd 1.46fF -C2218 divider_0/tspc_2/Z1 vdd 0.99fF -C2219 divider_0/nor_0/B vdd 6.33fF -C2220 divider_0/tspc_2/a_630_n680# vdd 1.14fF **FLOATING -C2221 divider_0/tspc_1/Z4 vdd 0.86fF -C2222 divider_0/tspc_1/Q vdd 3.12fF -C2223 divider_0/tspc_1/Z3 vdd 2.26fF -C2224 divider_0/tspc_1/Z2 vdd 1.46fF -C2225 divider_0/tspc_1/Z1 vdd 0.99fF -C2226 divider_0/nor_1/B vdd 7.05fF -C2227 divider_0/tspc_1/a_630_n680# vdd 1.15fF **FLOATING -C2228 divider_0/tspc_0/Z4 vdd 0.86fF -C2229 divider_0/tspc_0/Q vdd 3.14fF -C2230 divider_0/tspc_0/Z3 vdd 2.26fF -C2231 divider_0/tspc_0/Z2 vdd 1.46fF -C2232 divider_0/tspc_0/Z1 vdd 0.99fF -C2233 divider_0/nor_1/A vdd 7.04fF -C2234 divider_0/tspc_0/a_630_n680# vdd 1.15fF **FLOATING -C2235 divider_0/clk vdd 5.63fF -C2236 divider_0/prescaler_0/Out vdd 4.59fF -C2237 divider_0/prescaler_0/nand_1/z1 vdd 0.36fF -C2238 divider_0/prescaler_0/tspc_2/D vdd 2.64fF -C2239 divider_0/prescaler_0/tspc_0/Q vdd 3.64fF -C2240 divider_0/prescaler_0/tspc_1/Q vdd 3.61fF -C2241 divider_0/prescaler_0/nand_0/z1 vdd 0.36fF -C2242 divider_0/prescaler_0/tspc_0/D vdd 3.12fF -C2243 divider_0/and_0/OUT vdd 5.62fF -C2244 divider_0/prescaler_0/tspc_2/Z4 vdd 0.86fF -C2245 divider_0/prescaler_0/tspc_2/Z3 vdd 2.26fF -C2246 divider_0/prescaler_0/tspc_2/Z2 vdd 1.46fF -C2247 divider_0/prescaler_0/tspc_2/Z1 vdd 0.99fF -C2248 divider_0/prescaler_0/tspc_2/a_630_n680# vdd 1.16fF **FLOATING -C2249 divider_0/prescaler_0/tspc_2/a_740_n680# vdd 2.11fF **FLOATING -C2250 divider_0/prescaler_0/tspc_1/Z4 vdd 0.86fF -C2251 divider_0/prescaler_0/tspc_1/Z3 vdd 2.26fF -C2252 divider_0/prescaler_0/tspc_1/Z2 vdd 1.48fF -C2253 divider_0/prescaler_0/tspc_1/Z1 vdd 0.99fF -C2254 divider_0/prescaler_0/tspc_1/a_630_n680# vdd 1.14fF **FLOATING -C2255 divider_0/prescaler_0/m1_2700_2190# vdd 4.22fF **FLOATING -C2256 divider_0/prescaler_0/tspc_0/Z4 vdd 0.86fF -C2257 divider_0/prescaler_0/tspc_0/Z3 vdd 2.26fF -C2258 divider_0/prescaler_0/tspc_0/Z2 vdd 1.46fF -C2259 divider_0/prescaler_0/tspc_0/Z1 vdd 0.99fF -C2260 divider_0/prescaler_0/tspc_0/a_630_n680# vdd 1.14fF **FLOATING -C2261 divider_0/prescaler_0/tspc_0/a_740_n680# vdd 2.11fF **FLOATING -C2262 divider_0/nor_1/Z1 vdd 1.34fF -C2263 divider_0/nor_0/Z1 vdd 1.34fF -C2264 divider_0/mc2 vdd 5.29fF -C2265 divbuf_7/OUT vdd 363.82fF -C2266 divbuf_7/OUT5 vdd 350.37fF -C2267 divbuf_7/OUT4 vdd 133.72fF -C2268 divbuf_7/OUT3 vdd 34.03fF -C2269 divbuf_7/OUT2 vdd 8.71fF -C2270 divbuf_7/IN vdd 0.89fF -C2271 divbuf_7/a_492_n240# vdd 2.46fF **FLOATING -C2272 divbuf_6/OUT vdd 363.82fF -C2273 divbuf_6/OUT5 vdd 350.37fF -C2274 divbuf_6/OUT4 vdd 133.72fF -C2275 divbuf_6/OUT3 vdd 34.03fF -C2276 divbuf_6/OUT2 vdd 8.71fF -C2277 divbuf_6/IN vdd 0.89fF -C2278 divbuf_6/a_492_n240# vdd 2.46fF **FLOATING -C2279 divbuf_5/OUT vdd 363.82fF -C2280 divbuf_5/OUT5 vdd 350.37fF -C2281 divbuf_5/OUT4 vdd 133.72fF -C2282 divbuf_5/OUT3 vdd 34.03fF -C2283 divbuf_5/OUT2 vdd 8.71fF -C2284 divbuf_5/IN vdd 0.89fF -C2285 divbuf_5/a_492_n240# vdd 2.46fF **FLOATING -C2286 divbuf_4/OUT vdd 363.82fF -C2287 divbuf_4/OUT5 vdd 350.37fF -C2288 divbuf_4/OUT4 vdd 133.72fF -C2289 divbuf_4/OUT3 vdd 34.03fF -C2290 divbuf_4/OUT2 vdd 8.71fF -C2291 divbuf_4/IN vdd 0.89fF -C2292 divbuf_4/a_492_n240# vdd 2.46fF **FLOATING -C2293 divbuf_3/OUT vdd 363.82fF -C2294 divbuf_3/OUT5 vdd 350.37fF -C2295 divbuf_3/OUT4 vdd 133.72fF -C2296 divbuf_3/OUT3 vdd 34.03fF -C2297 divbuf_3/OUT2 vdd 8.71fF -C2298 divbuf_3/IN vdd 0.89fF -C2299 divbuf_3/a_492_n240# vdd 2.46fF **FLOATING -C2300 divbuf_2/OUT vdd 363.82fF -C2301 divbuf_2/OUT5 vdd 350.37fF -C2302 divbuf_2/OUT4 vdd 133.72fF -C2303 divbuf_2/OUT3 vdd 34.03fF -C2304 divbuf_2/OUT2 vdd 8.71fF -C2305 divbuf_2/IN vdd 0.89fF -C2306 divbuf_2/a_492_n240# vdd 2.46fF **FLOATING -C2307 divbuf_1/OUT vdd 363.82fF -C2308 divbuf_1/OUT5 vdd 350.37fF -C2309 divbuf_1/OUT4 vdd 133.72fF -C2310 divbuf_1/OUT3 vdd 34.03fF -C2311 divbuf_1/OUT2 vdd 8.71fF -C2312 divbuf_1/IN vdd 0.89fF -C2313 divbuf_1/a_492_n240# vdd 2.46fF **FLOATING -C2314 pd_div_0/divider_0/and_0/Z1 vdd 0.74fF -C2315 pd_div_0/divider_0/and_0/B vdd 2.25fF -C2316 pd_div_0/divider_0/and_0/A vdd 2.19fF -C2317 pd_div_0/divider_0/and_0/out1 vdd 2.93fF -C2318 pd_div_0/divider_0/tspc_2/Z4 vdd 0.86fF -C2319 pd_div_0/bufin vdd 9.36fF -C2320 pd_div_0/divider_0/tspc_2/Z3 vdd 2.26fF -C2321 pd_div_0/divider_0/tspc_2/Z2 vdd 1.46fF -C2322 pd_div_0/divider_0/tspc_2/Z1 vdd 0.99fF -C2323 pd_div_0/divider_0/nor_0/B vdd 6.33fF -C2324 pd_div_0/divider_0/tspc_2/a_630_n680# vdd 1.14fF **FLOATING -C2325 pd_div_0/divider_0/tspc_1/Z4 vdd 0.86fF -C2326 pd_div_0/divider_0/tspc_1/Q vdd 3.12fF -C2327 pd_div_0/divider_0/tspc_1/Z3 vdd 2.26fF -C2328 pd_div_0/divider_0/tspc_1/Z2 vdd 1.46fF -C2329 pd_div_0/divider_0/tspc_1/Z1 vdd 0.99fF -C2330 pd_div_0/divider_0/nor_1/B vdd 7.05fF -C2331 pd_div_0/divider_0/tspc_1/a_630_n680# vdd 1.15fF **FLOATING -C2332 pd_div_0/divider_0/tspc_0/Z4 vdd 0.86fF -C2333 pd_div_0/divider_0/tspc_0/Q vdd 3.14fF -C2334 pd_div_0/divider_0/tspc_0/Z3 vdd 2.26fF -C2335 pd_div_0/divider_0/tspc_0/Z2 vdd 1.46fF -C2336 pd_div_0/divider_0/tspc_0/Z1 vdd 0.99fF -C2337 pd_div_0/divider_0/nor_1/A vdd 7.04fF -C2338 pd_div_0/divider_0/tspc_0/a_630_n680# vdd 1.15fF **FLOATING -C2339 pd_div_0/divider_0/clk vdd 5.70fF -C2340 pd_div_0/divider_0/prescaler_0/Out vdd 4.59fF -C2341 pd_div_0/divider_0/prescaler_0/nand_1/z1 vdd 0.36fF -C2342 pd_div_0/divider_0/prescaler_0/tspc_2/D vdd 2.64fF -C2343 pd_div_0/divider_0/prescaler_0/tspc_0/Q vdd 3.64fF -C2344 pd_div_0/divider_0/prescaler_0/tspc_1/Q vdd 3.61fF -C2345 pd_div_0/divider_0/prescaler_0/nand_0/z1 vdd 0.36fF -C2346 pd_div_0/divider_0/prescaler_0/tspc_0/D vdd 3.12fF -C2347 pd_div_0/divider_0/and_0/OUT vdd 5.62fF -C2348 pd_div_0/divider_0/prescaler_0/tspc_2/Z4 vdd 0.86fF -C2349 pd_div_0/divider_0/prescaler_0/tspc_2/Z3 vdd 2.26fF -C2350 pd_div_0/divider_0/prescaler_0/tspc_2/Z2 vdd 1.46fF -C2351 pd_div_0/divider_0/prescaler_0/tspc_2/Z1 vdd 0.99fF -C2352 pd_div_0/divider_0/prescaler_0/tspc_2/a_630_n680# vdd 1.16fF **FLOATING -C2353 pd_div_0/divider_0/prescaler_0/tspc_2/a_740_n680# vdd 2.11fF **FLOATING -C2354 pd_div_0/divider_0/prescaler_0/tspc_1/Z4 vdd 0.86fF -C2355 pd_div_0/divider_0/prescaler_0/tspc_1/Z3 vdd 2.26fF -C2356 pd_div_0/divider_0/prescaler_0/tspc_1/Z2 vdd 1.48fF -C2357 pd_div_0/divider_0/prescaler_0/tspc_1/Z1 vdd 0.99fF -C2358 pd_div_0/divider_0/prescaler_0/tspc_1/a_630_n680# vdd 1.14fF **FLOATING -C2359 pd_div_0/divider_0/prescaler_0/m1_2700_2190# vdd 4.22fF **FLOATING -C2360 pd_div_0/divider_0/prescaler_0/tspc_0/Z4 vdd 0.86fF -C2361 pd_div_0/divider_0/prescaler_0/tspc_0/Z3 vdd 2.26fF -C2362 pd_div_0/divider_0/prescaler_0/tspc_0/Z2 vdd 1.46fF -C2363 pd_div_0/divider_0/prescaler_0/tspc_0/Z1 vdd 0.99fF -C2364 pd_div_0/divider_0/prescaler_0/tspc_0/a_630_n680# vdd 1.14fF **FLOATING -C2365 pd_div_0/divider_0/prescaler_0/tspc_0/a_740_n680# vdd 2.11fF **FLOATING -C2366 pd_div_0/divider_0/nor_1/Z1 vdd 1.34fF -C2367 pd_div_0/divider_0/nor_0/Z1 vdd 1.34fF -C2368 pd_div_0/divider_0/mc2 vdd 5.29fF -C2369 pd_div_0/divbuf_0/OUT5 vdd 350.37fF -C2370 pd_div_0/divbuf_0/OUT4 vdd 133.72fF -C2371 pd_div_0/divbuf_0/OUT3 vdd 34.03fF -C2372 pd_div_0/divbuf_0/OUT2 vdd 8.71fF -C2373 pd_div_0/divbuf_0/a_492_n240# vdd 2.46fF **FLOATING -C2374 pd_div_0/pd_0/and_pd_0/Z1 vdd 0.39fF -C2375 pd_div_0/pd_0/and_pd_0/Out1 vdd 2.22fF -C2376 pd_div_0/pd_0/tspc_r_1/z5 vdd 1.10fF -C2377 pd_div_0/pd_0/tspc_r_1/Z4 vdd 1.07fF -C2378 pd_div_0/pd_0/tspc_r_1/Qbar vdd 0.88fF -C2379 pd_div_0/pd_0/tspc_r_1/Z2 vdd 1.22fF -C2380 pd_div_0/pd_0/tspc_r_1/Z1 vdd 0.67fF -C2381 pd_div_0/pd_0/UP vdd 2.30fF -C2382 pd_div_0/pd_0/tspc_r_1/Qbar1 vdd 1.34fF -C2383 pd_div_0/pd_0/tspc_r_1/Z3 vdd 2.12fF -C2384 pd_div_0/pd_0/REF vdd 1.86fF -C2385 pd_div_0/pd_0/tspc_r_0/z5 vdd 1.10fF -C2386 pd_div_0/pd_0/tspc_r_0/Z4 vdd 1.07fF -C2387 pd_div_0/pd_0/R vdd 3.05fF -C2388 pd_div_0/pd_0/tspc_r_0/Qbar vdd 0.79fF -C2389 pd_div_0/pd_0/tspc_r_0/Z2 vdd 1.22fF -C2390 pd_div_0/pd_0/tspc_r_0/Z1 vdd 0.67fF -C2391 pd_div_0/pd_0/DOWN vdd 3.17fF -C2392 pd_div_0/pd_0/tspc_r_0/Qbar1 vdd 1.34fF -C2393 pd_div_0/pd_0/tspc_r_0/Z3 vdd 2.12fF -C2394 pd_div_0/div vdd 368.60fF -C2395 divbuf_0/OUT vdd 363.82fF -C2396 divbuf_0/OUT5 vdd 350.37fF -C2397 divbuf_0/OUT4 vdd 133.72fF -C2398 divbuf_0/OUT3 vdd 34.03fF -C2399 divbuf_0/OUT2 vdd 8.71fF -C2400 divbuf_0/IN vdd 0.89fF -C2401 divbuf_0/a_492_n240# vdd 2.46fF **FLOATING -C2402 ro_div_0/divider_0/and_0/Z1 vdd 0.65fF -C2403 ro_div_0/divider_0/and_0/B vdd 2.45fF -C2404 ro_div_0/divider_0/and_0/A vdd 2.35fF -C2405 ro_div_0/divider_0/and_0/out1 vdd 2.99fF -C2406 ro_div_0/divider_0/tspc_2/Z4 vdd 0.86fF -C2407 ro_div_0/divbuf_0/IN vdd 9.54fF -C2408 ro_div_0/divider_0/tspc_2/Z3 vdd 2.26fF -C2409 ro_div_0/divider_0/tspc_2/Z2 vdd 1.46fF -C2410 ro_div_0/divider_0/tspc_2/Z1 vdd 0.99fF -C2411 ro_div_0/divider_0/nor_0/B vdd 6.48fF -C2412 ro_div_0/divider_0/tspc_2/a_630_n680# vdd 1.14fF **FLOATING -C2413 ro_div_0/divider_0/tspc_1/Z4 vdd 0.86fF -C2414 ro_div_0/divider_0/tspc_1/Q vdd 3.12fF -C2415 ro_div_0/divider_0/tspc_1/Z3 vdd 2.26fF -C2416 ro_div_0/divider_0/tspc_1/Z2 vdd 1.46fF -C2417 ro_div_0/divider_0/tspc_1/Z1 vdd 0.99fF -C2418 ro_div_0/divider_0/nor_1/B vdd 7.12fF -C2419 ro_div_0/divider_0/tspc_1/a_630_n680# vdd 1.15fF **FLOATING -C2420 ro_div_0/divider_0/tspc_0/Z4 vdd 0.86fF -C2421 ro_div_0/divider_0/tspc_0/Q vdd 3.14fF -C2422 ro_div_0/divider_0/tspc_0/Z3 vdd 2.26fF -C2423 ro_div_0/divider_0/tspc_0/Z2 vdd 1.46fF -C2424 ro_div_0/divider_0/tspc_0/Z1 vdd 0.99fF -C2425 ro_div_0/divider_0/nor_1/A vdd 7.08fF -C2426 ro_div_0/divider_0/tspc_0/a_630_n680# vdd 1.15fF **FLOATING -C2427 ro_div_0/divider_0/clk vdd 23.42fF -C2428 ro_div_0/divider_0/prescaler_0/Out vdd 4.59fF -C2429 ro_div_0/divider_0/prescaler_0/nand_1/z1 vdd 0.36fF -C2430 ro_div_0/divider_0/prescaler_0/tspc_2/D vdd 2.64fF -C2431 ro_div_0/divider_0/prescaler_0/tspc_0/Q vdd 3.64fF -C2432 ro_div_0/divider_0/prescaler_0/tspc_1/Q vdd 3.61fF -C2433 ro_div_0/divider_0/prescaler_0/nand_0/z1 vdd 0.36fF -C2434 ro_div_0/divider_0/prescaler_0/tspc_0/D vdd 3.12fF -C2435 ro_div_0/divider_0/and_0/OUT vdd 5.67fF -C2436 ro_div_0/divider_0/prescaler_0/tspc_2/Z4 vdd 0.86fF -C2437 ro_div_0/divider_0/prescaler_0/tspc_2/Z3 vdd 2.26fF -C2438 ro_div_0/divider_0/prescaler_0/tspc_2/Z2 vdd 1.46fF -C2439 ro_div_0/divider_0/prescaler_0/tspc_2/Z1 vdd 0.99fF -C2440 ro_div_0/divider_0/prescaler_0/tspc_2/a_630_n680# vdd 1.16fF **FLOATING -C2441 ro_div_0/divider_0/prescaler_0/tspc_2/a_740_n680# vdd 2.11fF **FLOATING -C2442 ro_div_0/divider_0/prescaler_0/tspc_1/Z4 vdd 0.86fF -C2443 ro_div_0/divider_0/prescaler_0/tspc_1/Z3 vdd 2.26fF -C2444 ro_div_0/divider_0/prescaler_0/tspc_1/Z2 vdd 1.48fF -C2445 ro_div_0/divider_0/prescaler_0/tspc_1/Z1 vdd 0.99fF -C2446 ro_div_0/divider_0/prescaler_0/tspc_1/a_630_n680# vdd 1.14fF **FLOATING -C2447 ro_div_0/divider_0/prescaler_0/m1_2700_2190# vdd 4.22fF **FLOATING -C2448 ro_div_0/divider_0/prescaler_0/tspc_0/Z4 vdd 0.86fF -C2449 ro_div_0/divider_0/prescaler_0/tspc_0/Z3 vdd 2.26fF -C2450 ro_div_0/divider_0/prescaler_0/tspc_0/Z2 vdd 1.19fF -C2451 ro_div_0/divider_0/prescaler_0/tspc_0/Z1 vdd 0.99fF -C2452 ro_div_0/divider_0/prescaler_0/tspc_0/a_630_n680# vdd 1.47fF **FLOATING -C2453 ro_div_0/divider_0/prescaler_0/tspc_0/a_740_n680# vdd 2.11fF **FLOATING -C2454 ro_div_0/divider_0/nor_1/Z1 vdd 1.34fF -C2455 ro_div_0/divider_0/nor_0/Z1 vdd 1.34fF -C2456 ro_div_0/divbuf_0/OUT vdd 363.89fF -C2457 ro_div_0/divbuf_0/OUT5 vdd 350.37fF -C2458 ro_div_0/divbuf_0/OUT4 vdd 133.72fF -C2459 ro_div_0/divbuf_0/OUT3 vdd 34.03fF -C2460 ro_div_0/divbuf_0/OUT2 vdd 8.71fF -C2461 ro_div_0/divbuf_0/a_492_n240# vdd 2.46fF **FLOATING -C2462 ro_div_0/ro_complete_0/cbank_2/v vdd 17.84fF -C2463 ro_div_0/ro_complete_0/cbank_2/switch_5/vin vdd 0.78fF -C2464 ro_div_0/ro_complete_0/cbank_2/switch_4/vin vdd 1.50fF -C2465 ro_div_0/ro_complete_0/cbank_2/switch_2/vin vdd 1.30fF -C2466 ro_div_0/ro_complete_0/cbank_2/switch_3/vin vdd 0.56fF -C2467 ro_div_0/ro_complete_0/cbank_2/switch_1/vin vdd 1.14fF -C2468 ro_div_0/ro_complete_0/cbank_2/switch_0/vin vdd 1.02fF -C2469 ro_div_0/ro_complete_0/cbank_1/switch_5/vin vdd 0.78fF -C2470 ro_div_0/ro_complete_0/a0 vdd 7.88fF -C2471 ro_div_0/ro_complete_0/cbank_1/switch_4/vin vdd 1.50fF -C2472 ro_div_0/ro_complete_0/a1 vdd 5.39fF -C2473 ro_div_0/ro_complete_0/cbank_1/switch_2/vin vdd 1.30fF -C2474 ro_div_0/ro_complete_0/a3 vdd 6.85fF -C2475 ro_div_0/ro_complete_0/cbank_1/switch_3/vin vdd 0.56fF -C2476 ro_div_0/ro_complete_0/a2 vdd 5.48fF -C2477 ro_div_0/ro_complete_0/cbank_1/switch_1/vin vdd 1.14fF -C2478 ro_div_0/ro_complete_0/a4 vdd 5.36fF -C2479 ro_div_0/ro_complete_0/cbank_1/switch_0/vin vdd 1.02fF -C2480 ro_div_0/ro_complete_0/a5 vdd 5.19fF -C2481 ro_div_0/ro_complete_0/cbank_0/v vdd 14.98fF -C2482 ro_div_0/ro_complete_0/cbank_0/switch_5/vin vdd 0.78fF -C2483 ro_div_0/ro_complete_0/cbank_0/switch_4/vin vdd 1.50fF -C2484 ro_div_0/ro_complete_0/cbank_0/switch_2/vin vdd 1.30fF -C2485 ro_div_0/ro_complete_0/cbank_0/switch_3/vin vdd 0.56fF -C2486 ro_div_0/ro_complete_0/cbank_0/switch_1/vin vdd 1.14fF -C2487 ro_div_0/ro_complete_0/cbank_0/switch_0/vin vdd 1.02fF -C2488 ro_div_0/ro_complete_0/ro_var_extend_0/vcont vdd 0.27fF -C2489 ro_complete_0/cbank_2/v vdd 17.84fF -C2490 ro_complete_0/cbank_2/switch_5/vin vdd 0.78fF -C2491 ro_complete_0/cbank_2/switch_4/vin vdd 1.50fF -C2492 ro_complete_0/cbank_2/switch_2/vin vdd 1.30fF -C2493 ro_complete_0/cbank_2/switch_3/vin vdd 0.56fF -C2494 ro_complete_0/cbank_2/switch_1/vin vdd 1.14fF -C2495 ro_complete_0/cbank_2/switch_0/vin vdd 1.02fF -C2496 ro_complete_0/cbank_1/v vdd 16.34fF -C2497 ro_complete_0/cbank_1/switch_5/vin vdd 0.78fF -C2498 ro_complete_0/a0 vdd 7.88fF -C2499 ro_complete_0/cbank_1/switch_4/vin vdd 1.50fF -C2500 ro_complete_0/a1 vdd 5.39fF -C2501 ro_complete_0/cbank_1/switch_2/vin vdd 1.30fF -C2502 ro_complete_0/a3 vdd 6.85fF -C2503 ro_complete_0/cbank_1/switch_3/vin vdd 0.56fF -C2504 ro_complete_0/a2 vdd 5.48fF -C2505 ro_complete_0/cbank_1/switch_1/vin vdd 1.14fF -C2506 ro_complete_0/a4 vdd 5.36fF -C2507 ro_complete_0/cbank_1/switch_0/vin vdd 1.02fF -C2508 ro_complete_0/a5 vdd 5.19fF -C2509 ro_complete_0/cbank_0/v vdd 14.98fF -C2510 ro_complete_0/cbank_0/switch_5/vin vdd 0.78fF -C2511 ro_complete_0/cbank_0/switch_4/vin vdd 1.50fF -C2512 ro_complete_0/cbank_0/switch_2/vin vdd 1.30fF -C2513 ro_complete_0/cbank_0/switch_3/vin vdd 0.56fF -C2514 ro_complete_0/cbank_0/switch_1/vin vdd 1.14fF -C2515 ro_complete_0/cbank_0/switch_0/vin vdd 1.02fF -C2516 ro_complete_0/ro_var_extend_0/vcont vdd 0.27fF -C2517 filter_0/v vdd 85.69fF -C2518 filter_0/a_4216_n5230# vdd 418.47fF **FLOATING -C2519 filter_0/a_4216_n2998# vdd 1.03fF **FLOATING -C2520 cp_0/down vdd 1.54fF -C2521 cp_0/vbias vdd 2.41fF -C2522 cp_0/out vdd 5.26fF -C2523 cp_0/upbar vdd 1.50fF -C2524 cp_0/a_7110_n2840# vdd 0.17fF **FLOATING -C2525 cp_0/a_3060_n2840# vdd 1.71fF **FLOATING -C2526 cp_0/a_7110_0# vdd 0.17fF **FLOATING -C2527 cp_0/a_6370_0# vdd 0.40fF **FLOATING -C2528 cp_0/a_3060_0# vdd 1.65fF **FLOATING -C2529 cp_0/a_1710_0# vdd 5.76fF **FLOATING -C2530 cp_0/a_1710_n2840# vdd 4.89fF **FLOATING -C2531 cp_0/a_10_n50# vdd 2.96fF **FLOATING -C2532 pd_0/and_pd_0/Z1 vdd 0.39fF -C2533 pd_0/and_pd_0/Out1 vdd 2.22fF -C2534 pd_0/tspc_r_1/z5 vdd 1.10fF -C2535 pd_0/tspc_r_1/Z4 vdd 1.07fF -C2536 pd_0/tspc_r_1/Qbar vdd 0.88fF -C2537 pd_0/tspc_r_1/Z2 vdd 1.22fF -C2538 pd_0/tspc_r_1/Z1 vdd 0.67fF -C2539 pd_0/UP vdd 2.21fF -C2540 pd_0/tspc_r_1/Qbar1 vdd 1.34fF -C2541 pd_0/tspc_r_1/Z3 vdd 2.12fF -C2542 pd_0/REF vdd 1.80fF -C2543 pd_0/tspc_r_0/z5 vdd 1.10fF -C2544 pd_0/tspc_r_0/Z4 vdd 1.07fF -C2545 pd_0/R vdd 3.05fF -C2546 pd_0/tspc_r_0/Qbar vdd 0.79fF -C2547 pd_0/tspc_r_0/Z2 vdd 1.22fF -C2548 pd_0/tspc_r_0/Z1 vdd 0.67fF -C2549 pd_0/DOWN vdd 3.08fF -C2550 pd_0/tspc_r_0/Qbar1 vdd 1.34fF -C2551 pd_0/tspc_r_0/Z3 vdd 2.12fF -C2552 pd_0/DIV vdd 1.82fF +C1131 io_analog[4] vdd 25.05fF +C1132 io_analog[5] vdd 25.05fF +C1133 io_analog[6] vdd 25.05fF +C1134 io_in_3v3[0] vdd 0.61fF +C1135 io_oeb[26] vdd 0.61fF +C1136 io_in[0] vdd 0.61fF +C1137 io_out[26] vdd 0.61fF +C1138 io_out[0] vdd 0.61fF +C1139 io_in[26] vdd 0.61fF +C1140 io_oeb[0] vdd 0.61fF +C1141 io_in_3v3[26] vdd 0.61fF +C1142 io_in_3v3[1] vdd 0.61fF +C1143 io_oeb[25] vdd 0.61fF +C1144 io_in[1] vdd 0.61fF +C1145 io_out[25] vdd 0.61fF +C1146 io_out[1] vdd 0.61fF +C1147 io_in[25] vdd 0.61fF +C1148 io_oeb[1] vdd 0.61fF +C1149 io_in_3v3[25] vdd 0.61fF +C1150 io_in_3v3[2] vdd 0.61fF +C1151 io_oeb[24] vdd 0.61fF +C1152 io_in[2] vdd 0.61fF +C1153 io_out[24] vdd 0.61fF +C1154 io_out[2] vdd 0.61fF +C1155 io_in[24] vdd 0.61fF +C1156 io_oeb[2] vdd 0.61fF +C1157 io_in_3v3[24] vdd 0.61fF +C1158 io_in_3v3[3] vdd 0.61fF +C1159 gpio_noesd[17] vdd 0.61fF +C1160 io_in[3] vdd 0.61fF +C1161 gpio_analog[17] vdd 0.61fF +C1162 io_out[3] vdd 0.61fF +C1163 io_oeb[3] vdd 0.61fF +C1164 io_in_3v3[4] vdd 0.61fF +C1165 io_in[4] vdd 0.61fF +C1166 io_out[4] vdd 0.61fF +C1167 io_oeb[4] vdd 0.61fF +C1168 io_oeb[23] vdd 0.61fF +C1169 io_out[23] vdd 0.61fF +C1170 io_in[23] vdd 0.61fF +C1171 io_in_3v3[23] vdd 0.61fF +C1172 gpio_noesd[16] vdd 0.61fF +C1173 gpio_analog[16] vdd 0.61fF +C1174 io_in_3v3[5] vdd 0.61fF +C1175 io_in[5] vdd 0.61fF +C1176 io_out[5] vdd 0.61fF +C1177 io_oeb[5] vdd 0.61fF +C1178 io_oeb[22] vdd 0.61fF +C1179 io_out[22] vdd 0.61fF +C1180 io_in[22] vdd 0.61fF +C1181 io_in_3v3[22] vdd 0.61fF +C1182 gpio_noesd[15] vdd 0.61fF +C1183 gpio_analog[15] vdd 0.61fF +C1184 io_in_3v3[6] vdd 0.61fF +C1185 io_in[6] vdd 0.61fF +C1186 io_out[6] vdd 0.61fF +C1187 io_oeb[6] vdd 0.61fF +C1188 io_oeb[21] vdd 0.61fF +C1189 io_out[21] vdd 0.61fF +C1190 io_in[21] vdd 0.61fF +C1191 io_in_3v3[21] vdd 0.61fF +C1192 gpio_noesd[14] vdd 0.61fF +C1193 gpio_analog[14] vdd 0.61fF +C1194 vssa1 vdd 26.08fF +C1195 vssd2 vdd 13.04fF +C1196 vssd1 vdd 13.04fF +C1197 vdda2 vdd 13.04fF +C1198 vdda1 vdd 26.08fF +C1199 io_oeb[20] vdd 0.61fF +C1200 io_out[20] vdd 0.61fF +C1201 io_in[20] vdd 0.61fF +C1202 io_in_3v3[20] vdd 0.61fF +C1203 gpio_noesd[13] vdd 0.61fF +C1204 gpio_analog[13] vdd 0.61fF +C1205 gpio_analog[0] vdd 0.61fF +C1206 gpio_noesd[0] vdd 0.61fF +C1207 io_in_3v3[7] vdd 0.61fF +C1208 io_in[7] vdd 0.61fF +C1209 io_out[7] vdd 0.61fF +C1210 io_oeb[7] vdd 0.61fF +C1211 io_oeb[19] vdd 0.61fF +C1212 io_out[19] vdd 0.61fF +C1213 io_in[19] vdd 0.61fF +C1214 io_in_3v3[19] vdd 0.61fF +C1215 gpio_noesd[12] vdd 0.61fF +C1216 gpio_analog[12] vdd 0.61fF +C1217 gpio_analog[1] vdd 0.61fF +C1218 gpio_noesd[1] vdd 0.61fF +C1219 io_in_3v3[8] vdd 0.61fF +C1220 io_in[8] vdd 0.61fF +C1221 io_out[8] vdd 0.61fF +C1222 io_oeb[8] vdd 0.61fF +C1223 io_oeb[18] vdd 0.61fF +C1224 io_out[18] vdd 0.61fF +C1225 io_in[18] vdd 0.61fF +C1226 io_in_3v3[18] vdd 0.61fF +C1227 gpio_noesd[11] vdd 0.61fF +C1228 gpio_analog[11] vdd 0.61fF +C1229 gpio_analog[2] vdd 0.61fF +C1230 gpio_noesd[2] vdd 0.61fF +C1231 io_in_3v3[9] vdd 0.61fF +C1232 io_in[9] vdd 0.61fF +C1233 io_out[9] vdd 0.61fF +C1234 io_oeb[9] vdd 0.61fF +C1235 io_oeb[17] vdd 0.61fF +C1236 io_out[17] vdd 0.61fF +C1237 io_in[17] vdd 0.61fF +C1238 io_in_3v3[17] vdd 0.61fF +C1239 gpio_noesd[10] vdd 0.61fF +C1240 gpio_analog[10] vdd 0.61fF +C1241 gpio_analog[3] vdd 0.61fF +C1242 gpio_noesd[3] vdd 0.61fF +C1243 io_in_3v3[10] vdd 0.61fF +C1244 io_in[10] vdd 0.61fF +C1245 io_out[10] vdd 0.61fF +C1246 io_oeb[10] vdd 0.61fF +C1247 io_oeb[16] vdd 0.61fF +C1248 io_out[16] vdd 0.61fF +C1249 io_in[16] vdd 0.61fF +C1250 io_in_3v3[16] vdd 0.61fF +C1251 gpio_noesd[9] vdd 0.61fF +C1252 gpio_analog[9] vdd 0.61fF +C1253 gpio_analog[4] vdd 0.61fF +C1254 gpio_noesd[4] vdd 0.61fF +C1255 io_in_3v3[11] vdd 0.61fF +C1256 io_in[11] vdd 0.61fF +C1257 io_out[11] vdd 0.61fF +C1258 io_oeb[11] vdd 0.61fF +C1259 io_oeb[15] vdd 0.61fF +C1260 io_out[15] vdd 0.61fF +C1261 io_in[15] vdd 0.61fF +C1262 io_in_3v3[15] vdd 0.61fF +C1263 gpio_noesd[8] vdd 0.61fF +C1264 gpio_analog[8] vdd 0.61fF +C1265 gpio_analog[5] vdd 0.61fF +C1266 gpio_noesd[5] vdd 0.61fF +C1267 io_in_3v3[12] vdd 0.61fF +C1268 io_in[12] vdd 0.61fF +C1269 io_out[12] vdd 0.61fF +C1270 io_oeb[12] vdd 0.61fF +C1271 io_oeb[14] vdd 0.61fF +C1272 io_out[14] vdd 0.61fF +C1273 io_in[14] vdd 0.61fF +C1274 io_in_3v3[14] vdd 0.61fF +C1275 gpio_noesd[7] vdd 0.61fF +C1276 gpio_analog[7] vdd 0.61fF +C1277 vssa2 vdd 13.04fF +C1278 gpio_analog[6] vdd 0.61fF +C1279 gpio_noesd[6] vdd 0.61fF +C1280 io_in_3v3[13] vdd 0.61fF +C1281 io_in[13] vdd 0.61fF +C1282 io_out[13] vdd 0.61fF +C1283 io_oeb[13] vdd 0.61fF +C1284 vccd1 vdd 13.04fF +C1285 vccd2 vdd 13.04fF +C1286 io_analog[0] vdd 6.83fF +C1287 io_analog[10] vdd 6.83fF +C1288 io_analog[1] vdd 6.83fF +C1289 io_analog[2] vdd 6.83fF +C1290 io_analog[3] vdd 6.83fF +C1291 io_clamp_high[0] vdd 3.58fF +C1292 io_clamp_low[0] vdd 3.58fF +C1293 io_clamp_high[1] vdd 3.58fF +C1294 io_clamp_low[1] vdd 3.58fF +C1295 io_clamp_high[2] vdd 3.58fF +C1296 io_clamp_low[2] vdd 3.58fF +C1297 io_analog[7] vdd 6.83fF +C1298 io_analog[8] vdd 6.83fF +C1299 io_analog[9] vdd 6.83fF +C1300 user_irq[2] vdd 0.63fF +C1301 user_irq[1] vdd 0.63fF +C1302 user_irq[0] vdd 0.63fF +C1303 user_clock2 vdd 0.63fF +C1304 la_oenb[127] vdd 0.63fF +C1305 la_data_out[127] vdd 0.63fF +C1306 la_data_in[127] vdd 0.63fF +C1307 la_oenb[126] vdd 0.63fF +C1308 la_data_out[126] vdd 0.63fF +C1309 la_data_in[126] vdd 0.63fF +C1310 la_oenb[125] vdd 0.63fF +C1311 la_data_out[125] vdd 0.63fF +C1312 la_data_in[125] vdd 0.63fF +C1313 la_oenb[124] vdd 0.63fF +C1314 la_data_out[124] vdd 0.63fF +C1315 la_data_in[124] vdd 0.63fF +C1316 la_oenb[123] vdd 0.63fF +C1317 la_data_out[123] vdd 0.63fF +C1318 la_data_in[123] vdd 0.63fF +C1319 la_oenb[122] vdd 0.63fF +C1320 la_data_out[122] vdd 0.63fF +C1321 la_data_in[122] vdd 0.63fF +C1322 la_oenb[121] vdd 0.63fF +C1323 la_data_out[121] vdd 0.63fF +C1324 la_data_in[121] vdd 0.63fF +C1325 la_oenb[120] vdd 0.63fF +C1326 la_data_out[120] vdd 0.63fF +C1327 la_data_in[120] vdd 0.63fF +C1328 la_oenb[119] vdd 0.63fF +C1329 la_data_out[119] vdd 0.63fF +C1330 la_data_in[119] vdd 0.63fF +C1331 la_oenb[118] vdd 0.63fF +C1332 la_data_out[118] vdd 0.63fF +C1333 la_data_in[118] vdd 0.63fF +C1334 la_oenb[117] vdd 0.63fF +C1335 la_data_out[117] vdd 0.63fF +C1336 la_data_in[117] vdd 0.63fF +C1337 la_oenb[116] vdd 0.63fF +C1338 la_data_out[116] vdd 0.63fF +C1339 la_data_in[116] vdd 0.63fF +C1340 la_oenb[115] vdd 0.63fF +C1341 la_data_out[115] vdd 0.63fF +C1342 la_data_in[115] vdd 0.63fF +C1343 la_oenb[114] vdd 0.63fF +C1344 la_data_out[114] vdd 0.63fF +C1345 la_data_in[114] vdd 0.63fF +C1346 la_oenb[113] vdd 0.63fF +C1347 la_data_out[113] vdd 0.63fF +C1348 la_data_in[113] vdd 0.63fF +C1349 la_oenb[112] vdd 0.63fF +C1350 la_data_out[112] vdd 0.63fF +C1351 la_data_in[112] vdd 0.63fF +C1352 la_oenb[111] vdd 0.63fF +C1353 la_data_out[111] vdd 0.63fF +C1354 la_data_in[111] vdd 0.63fF +C1355 la_oenb[110] vdd 0.63fF +C1356 la_data_out[110] vdd 0.63fF +C1357 la_data_in[110] vdd 0.63fF +C1358 la_oenb[109] vdd 0.63fF +C1359 la_data_out[109] vdd 0.63fF +C1360 la_data_in[109] vdd 0.63fF +C1361 la_oenb[108] vdd 0.63fF +C1362 la_data_out[108] vdd 0.63fF +C1363 la_data_in[108] vdd 0.63fF +C1364 la_oenb[107] vdd 0.63fF +C1365 la_data_out[107] vdd 0.63fF +C1366 la_data_in[107] vdd 0.63fF +C1367 la_oenb[106] vdd 0.63fF +C1368 la_data_out[106] vdd 0.63fF +C1369 la_data_in[106] vdd 0.63fF +C1370 la_oenb[105] vdd 0.63fF +C1371 la_data_out[105] vdd 0.63fF +C1372 la_data_in[105] vdd 0.63fF +C1373 la_oenb[104] vdd 0.63fF +C1374 la_data_out[104] vdd 0.63fF +C1375 la_data_in[104] vdd 0.63fF +C1376 la_oenb[103] vdd 0.63fF +C1377 la_data_out[103] vdd 0.63fF +C1378 la_data_in[103] vdd 0.63fF +C1379 la_oenb[102] vdd 0.63fF +C1380 la_data_out[102] vdd 0.63fF +C1381 la_data_in[102] vdd 0.63fF +C1382 la_oenb[101] vdd 0.63fF +C1383 la_data_out[101] vdd 0.63fF +C1384 la_data_in[101] vdd 0.63fF +C1385 la_oenb[100] vdd 0.63fF +C1386 la_data_out[100] vdd 0.63fF +C1387 la_data_in[100] vdd 0.63fF +C1388 la_oenb[99] vdd 0.63fF +C1389 la_data_out[99] vdd 0.63fF +C1390 la_data_in[99] vdd 0.63fF +C1391 la_oenb[98] vdd 0.63fF +C1392 la_data_out[98] vdd 0.63fF +C1393 la_data_in[98] vdd 0.63fF +C1394 la_oenb[97] vdd 0.63fF +C1395 la_data_out[97] vdd 0.63fF +C1396 la_data_in[97] vdd 0.63fF +C1397 la_oenb[96] vdd 0.63fF +C1398 la_data_out[96] vdd 0.63fF +C1399 la_data_in[96] vdd 0.63fF +C1400 la_oenb[95] vdd 0.63fF +C1401 la_data_out[95] vdd 0.63fF +C1402 la_data_in[95] vdd 0.63fF +C1403 la_oenb[94] vdd 0.63fF +C1404 la_data_out[94] vdd 0.63fF +C1405 la_data_in[94] vdd 0.63fF +C1406 la_oenb[93] vdd 0.63fF +C1407 la_data_out[93] vdd 0.63fF +C1408 la_data_in[93] vdd 0.63fF +C1409 la_oenb[92] vdd 0.63fF +C1410 la_data_out[92] vdd 0.63fF +C1411 la_data_in[92] vdd 0.63fF +C1412 la_oenb[91] vdd 0.63fF +C1413 la_data_out[91] vdd 0.63fF +C1414 la_data_in[91] vdd 0.63fF +C1415 la_oenb[90] vdd 0.63fF +C1416 la_data_out[90] vdd 0.63fF +C1417 la_data_in[90] vdd 0.63fF +C1418 la_oenb[89] vdd 0.63fF +C1419 la_data_out[89] vdd 0.63fF +C1420 la_data_in[89] vdd 0.63fF +C1421 la_oenb[88] vdd 0.63fF +C1422 la_data_out[88] vdd 0.63fF +C1423 la_data_in[88] vdd 0.63fF +C1424 la_oenb[87] vdd 0.63fF +C1425 la_data_out[87] vdd 0.63fF +C1426 la_data_in[87] vdd 0.63fF +C1427 la_oenb[86] vdd 0.63fF +C1428 la_data_out[86] vdd 0.63fF +C1429 la_data_in[86] vdd 0.63fF +C1430 la_oenb[85] vdd 0.63fF +C1431 la_data_out[85] vdd 0.63fF +C1432 la_data_in[85] vdd 0.63fF +C1433 la_oenb[84] vdd 0.63fF +C1434 la_data_out[84] vdd 0.63fF +C1435 la_data_in[84] vdd 0.63fF +C1436 la_oenb[83] vdd 0.63fF +C1437 la_data_out[83] vdd 0.63fF +C1438 la_data_in[83] vdd 0.63fF +C1439 la_oenb[82] vdd 0.63fF +C1440 la_data_out[82] vdd 0.63fF +C1441 la_data_in[82] vdd 0.63fF +C1442 la_oenb[81] vdd 0.63fF +C1443 la_data_out[81] vdd 0.63fF +C1444 la_data_in[81] vdd 0.63fF +C1445 la_oenb[80] vdd 0.63fF +C1446 la_data_out[80] vdd 0.63fF +C1447 la_data_in[80] vdd 0.63fF +C1448 la_oenb[79] vdd 0.63fF +C1449 la_data_out[79] vdd 0.63fF +C1450 la_data_in[79] vdd 0.63fF +C1451 la_oenb[78] vdd 0.63fF +C1452 la_data_out[78] vdd 0.63fF +C1453 la_data_in[78] vdd 0.63fF +C1454 la_oenb[77] vdd 0.63fF +C1455 la_data_out[77] vdd 0.63fF +C1456 la_data_in[77] vdd 0.63fF +C1457 la_oenb[76] vdd 0.63fF +C1458 la_data_out[76] vdd 0.63fF +C1459 la_data_in[76] vdd 0.63fF +C1460 la_oenb[75] vdd 0.63fF +C1461 la_data_out[75] vdd 0.63fF +C1462 la_data_in[75] vdd 0.63fF +C1463 la_oenb[74] vdd 0.63fF +C1464 la_data_out[74] vdd 0.63fF +C1465 la_data_in[74] vdd 0.63fF +C1466 la_oenb[73] vdd 0.63fF +C1467 la_data_out[73] vdd 0.63fF +C1468 la_data_in[73] vdd 0.63fF +C1469 la_oenb[72] vdd 0.63fF +C1470 la_data_out[72] vdd 0.63fF +C1471 la_data_in[72] vdd 0.63fF +C1472 la_oenb[71] vdd 0.63fF +C1473 la_data_out[71] vdd 0.63fF +C1474 la_data_in[71] vdd 0.63fF +C1475 la_oenb[70] vdd 0.63fF +C1476 la_data_out[70] vdd 0.63fF +C1477 la_data_in[70] vdd 0.63fF +C1478 la_oenb[69] vdd 0.63fF +C1479 la_data_out[69] vdd 0.63fF +C1480 la_data_in[69] vdd 0.63fF +C1481 la_oenb[68] vdd 0.63fF +C1482 la_data_out[68] vdd 0.63fF +C1483 la_data_in[68] vdd 0.63fF +C1484 la_oenb[67] vdd 0.63fF +C1485 la_data_out[67] vdd 0.63fF +C1486 la_data_in[67] vdd 0.63fF +C1487 la_oenb[66] vdd 0.63fF +C1488 la_data_out[66] vdd 0.63fF +C1489 la_data_in[66] vdd 0.63fF +C1490 la_oenb[65] vdd 0.63fF +C1491 la_data_out[65] vdd 0.63fF +C1492 la_data_in[65] vdd 0.63fF +C1493 la_oenb[64] vdd 0.63fF +C1494 la_data_out[64] vdd 0.63fF +C1495 la_data_in[64] vdd 0.63fF +C1496 la_oenb[63] vdd 0.63fF +C1497 la_data_out[63] vdd 0.63fF +C1498 la_data_in[63] vdd 0.63fF +C1499 la_oenb[62] vdd 0.63fF +C1500 la_data_out[62] vdd 0.63fF +C1501 la_data_in[62] vdd 0.63fF +C1502 la_oenb[61] vdd 0.63fF +C1503 la_data_out[61] vdd 0.63fF +C1504 la_data_in[61] vdd 0.63fF +C1505 la_oenb[60] vdd 0.63fF +C1506 la_data_out[60] vdd 0.63fF +C1507 la_data_in[60] vdd 0.63fF +C1508 la_oenb[59] vdd 0.63fF +C1509 la_data_out[59] vdd 0.63fF +C1510 la_data_in[59] vdd 0.63fF +C1511 la_oenb[58] vdd 0.63fF +C1512 la_data_out[58] vdd 0.63fF +C1513 la_data_in[58] vdd 0.63fF +C1514 la_oenb[57] vdd 0.63fF +C1515 la_data_out[57] vdd 0.63fF +C1516 la_data_in[57] vdd 0.63fF +C1517 la_oenb[56] vdd 0.63fF +C1518 la_data_out[56] vdd 0.63fF +C1519 la_data_in[56] vdd 0.63fF +C1520 la_oenb[55] vdd 0.63fF +C1521 la_data_out[55] vdd 0.63fF +C1522 la_data_in[55] vdd 0.63fF +C1523 la_oenb[54] vdd 0.63fF +C1524 la_data_out[54] vdd 0.63fF +C1525 la_data_in[54] vdd 0.63fF +C1526 la_oenb[53] vdd 0.63fF +C1527 la_data_out[53] vdd 0.63fF +C1528 la_data_in[53] vdd 0.63fF +C1529 la_oenb[52] vdd 0.63fF +C1530 la_data_out[52] vdd 0.63fF +C1531 la_data_in[52] vdd 0.63fF +C1532 la_oenb[51] vdd 0.63fF +C1533 la_data_out[51] vdd 0.63fF +C1534 la_data_in[51] vdd 0.63fF +C1535 la_oenb[50] vdd 0.63fF +C1536 la_data_out[50] vdd 0.63fF +C1537 la_data_in[50] vdd 0.63fF +C1538 la_oenb[49] vdd 0.63fF +C1539 la_data_out[49] vdd 0.63fF +C1540 la_data_in[49] vdd 0.63fF +C1541 la_oenb[48] vdd 0.63fF +C1542 la_data_out[48] vdd 0.63fF +C1543 la_data_in[48] vdd 0.63fF +C1544 la_oenb[47] vdd 0.63fF +C1545 la_data_out[47] vdd 0.63fF +C1546 la_data_in[47] vdd 0.63fF +C1547 la_oenb[46] vdd 0.63fF +C1548 la_data_out[46] vdd 0.63fF +C1549 la_data_in[46] vdd 0.63fF +C1550 la_oenb[45] vdd 0.63fF +C1551 la_data_out[45] vdd 0.63fF +C1552 la_data_in[45] vdd 0.63fF +C1553 la_oenb[44] vdd 0.63fF +C1554 la_data_out[44] vdd 0.63fF +C1555 la_data_in[44] vdd 0.63fF +C1556 la_oenb[43] vdd 0.63fF +C1557 la_data_out[43] vdd 0.63fF +C1558 la_data_in[43] vdd 0.63fF +C1559 la_oenb[42] vdd 0.63fF +C1560 la_data_out[42] vdd 0.63fF +C1561 la_data_in[42] vdd 0.63fF +C1562 la_oenb[41] vdd 0.63fF +C1563 la_data_out[41] vdd 0.63fF +C1564 la_data_in[41] vdd 0.63fF +C1565 la_oenb[40] vdd 0.63fF +C1566 la_data_out[40] vdd 0.63fF +C1567 la_data_in[40] vdd 0.63fF +C1568 la_oenb[39] vdd 0.63fF +C1569 la_data_out[39] vdd 0.63fF +C1570 la_data_in[39] vdd 0.63fF +C1571 la_oenb[38] vdd 0.63fF +C1572 la_data_out[38] vdd 0.63fF +C1573 la_data_in[38] vdd 0.63fF +C1574 la_oenb[37] vdd 0.63fF +C1575 la_data_out[37] vdd 0.63fF +C1576 la_data_in[37] vdd 0.63fF +C1577 la_oenb[36] vdd 0.63fF +C1578 la_data_out[36] vdd 0.63fF +C1579 la_data_in[36] vdd 0.63fF +C1580 la_oenb[35] vdd 0.63fF +C1581 la_data_out[35] vdd 0.63fF +C1582 la_data_in[35] vdd 0.63fF +C1583 la_oenb[34] vdd 0.63fF +C1584 la_data_out[34] vdd 0.63fF +C1585 la_data_in[34] vdd 0.63fF +C1586 la_oenb[33] vdd 0.63fF +C1587 la_data_out[33] vdd 0.63fF +C1588 la_data_in[33] vdd 0.63fF +C1589 la_oenb[32] vdd 0.63fF +C1590 la_data_out[32] vdd 0.63fF +C1591 la_data_in[32] vdd 0.63fF +C1592 la_oenb[31] vdd 0.63fF +C1593 la_data_out[31] vdd 0.63fF +C1594 la_data_in[31] vdd 0.63fF +C1595 la_oenb[30] vdd 0.63fF +C1596 la_data_out[30] vdd 0.63fF +C1597 la_data_in[30] vdd 0.63fF +C1598 la_oenb[29] vdd 0.63fF +C1599 la_data_out[29] vdd 0.63fF +C1600 la_data_in[29] vdd 0.63fF +C1601 la_oenb[28] vdd 0.63fF +C1602 la_data_out[28] vdd 0.63fF +C1603 la_data_in[28] vdd 0.63fF +C1604 la_oenb[27] vdd 0.63fF +C1605 la_data_out[27] vdd 0.63fF +C1606 la_data_in[27] vdd 0.63fF +C1607 la_oenb[26] vdd 0.63fF +C1608 la_data_out[26] vdd 0.63fF +C1609 la_data_in[26] vdd 0.63fF +C1610 la_oenb[25] vdd 0.63fF +C1611 la_data_out[25] vdd 0.63fF +C1612 la_data_in[25] vdd 0.63fF +C1613 la_oenb[24] vdd 0.63fF +C1614 la_data_out[24] vdd 0.63fF +C1615 la_data_in[24] vdd 0.63fF +C1616 la_oenb[23] vdd 0.63fF +C1617 la_data_out[23] vdd 0.63fF +C1618 la_data_in[23] vdd 0.63fF +C1619 la_oenb[22] vdd 0.63fF +C1620 la_data_out[22] vdd 0.63fF +C1621 la_data_in[22] vdd 0.63fF +C1622 la_oenb[21] vdd 0.63fF +C1623 la_data_out[21] vdd 0.63fF +C1624 la_data_in[21] vdd 0.63fF +C1625 la_oenb[20] vdd 0.63fF +C1626 la_data_out[20] vdd 0.63fF +C1627 la_data_in[20] vdd 0.63fF +C1628 la_oenb[19] vdd 0.63fF +C1629 la_data_out[19] vdd 0.63fF +C1630 la_data_in[19] vdd 0.63fF +C1631 la_oenb[18] vdd 0.63fF +C1632 la_data_out[18] vdd 0.63fF +C1633 la_data_in[18] vdd 0.63fF +C1634 la_oenb[17] vdd 0.63fF +C1635 la_data_out[17] vdd 0.63fF +C1636 la_data_in[17] vdd 0.63fF +C1637 la_oenb[16] vdd 0.63fF +C1638 la_data_out[16] vdd 0.63fF +C1639 la_data_in[16] vdd 0.63fF +C1640 la_oenb[15] vdd 0.63fF +C1641 la_data_out[15] vdd 0.63fF +C1642 la_data_in[15] vdd 0.63fF +C1643 la_oenb[14] vdd 0.63fF +C1644 la_data_out[14] vdd 0.63fF +C1645 la_data_in[14] vdd 0.63fF +C1646 la_oenb[13] vdd 0.63fF +C1647 la_data_out[13] vdd 0.63fF +C1648 la_data_in[13] vdd 0.63fF +C1649 la_oenb[12] vdd 0.63fF +C1650 la_data_out[12] vdd 0.63fF +C1651 la_data_in[12] vdd 0.63fF +C1652 la_oenb[11] vdd 0.63fF +C1653 la_data_out[11] vdd 0.63fF +C1654 la_data_in[11] vdd 0.63fF +C1655 la_oenb[10] vdd 0.63fF +C1656 la_data_out[10] vdd 0.63fF +C1657 la_data_in[10] vdd 0.63fF +C1658 la_oenb[9] vdd 0.63fF +C1659 la_data_out[9] vdd 0.63fF +C1660 la_data_in[9] vdd 0.63fF +C1661 la_oenb[8] vdd 0.63fF +C1662 la_data_out[8] vdd 0.63fF +C1663 la_data_in[8] vdd 0.63fF +C1664 la_oenb[7] vdd 0.63fF +C1665 la_data_out[7] vdd 0.63fF +C1666 la_data_in[7] vdd 0.63fF +C1667 la_oenb[6] vdd 0.63fF +C1668 la_data_out[6] vdd 0.63fF +C1669 la_data_in[6] vdd 0.63fF +C1670 la_oenb[5] vdd 0.63fF +C1671 la_data_out[5] vdd 0.63fF +C1672 la_data_in[5] vdd 0.63fF +C1673 la_oenb[4] vdd 0.63fF +C1674 la_data_out[4] vdd 0.63fF +C1675 la_data_in[4] vdd 0.63fF +C1676 la_oenb[3] vdd 0.63fF +C1677 la_data_out[3] vdd 0.63fF +C1678 la_data_in[3] vdd 0.63fF +C1679 la_oenb[2] vdd 0.63fF +C1680 la_data_out[2] vdd 0.63fF +C1681 la_data_in[2] vdd 0.63fF +C1682 la_oenb[1] vdd 0.63fF +C1683 la_data_out[1] vdd 0.63fF +C1684 la_data_in[1] vdd 0.63fF +C1685 la_oenb[0] vdd 0.63fF +C1686 la_data_out[0] vdd 0.63fF +C1687 la_data_in[0] vdd 0.63fF +C1688 wbs_dat_o[31] vdd 0.63fF +C1689 wbs_dat_i[31] vdd 0.63fF +C1690 wbs_adr_i[31] vdd 0.63fF +C1691 wbs_dat_o[30] vdd 0.63fF +C1692 wbs_dat_i[30] vdd 0.63fF +C1693 wbs_adr_i[30] vdd 0.63fF +C1694 wbs_dat_o[29] vdd 0.63fF +C1695 wbs_dat_i[29] vdd 0.63fF +C1696 wbs_adr_i[29] vdd 0.63fF +C1697 wbs_dat_o[28] vdd 0.63fF +C1698 wbs_dat_i[28] vdd 0.63fF +C1699 wbs_adr_i[28] vdd 0.63fF +C1700 wbs_dat_o[27] vdd 0.63fF +C1701 wbs_dat_i[27] vdd 0.63fF +C1702 wbs_adr_i[27] vdd 0.63fF +C1703 wbs_dat_o[26] vdd 0.63fF +C1704 wbs_dat_i[26] vdd 0.63fF +C1705 wbs_adr_i[26] vdd 0.63fF +C1706 wbs_dat_o[25] vdd 0.63fF +C1707 wbs_dat_i[25] vdd 0.63fF +C1708 wbs_adr_i[25] vdd 0.63fF +C1709 wbs_dat_o[24] vdd 0.63fF +C1710 wbs_dat_i[24] vdd 0.63fF +C1711 wbs_adr_i[24] vdd 0.63fF +C1712 wbs_dat_o[23] vdd 0.63fF +C1713 wbs_dat_i[23] vdd 0.63fF +C1714 wbs_adr_i[23] vdd 0.63fF +C1715 wbs_dat_o[22] vdd 0.63fF +C1716 wbs_dat_i[22] vdd 0.63fF +C1717 wbs_adr_i[22] vdd 0.63fF +C1718 wbs_dat_o[21] vdd 0.63fF +C1719 wbs_dat_i[21] vdd 0.63fF +C1720 wbs_adr_i[21] vdd 0.63fF +C1721 wbs_dat_o[20] vdd 0.63fF +C1722 wbs_dat_i[20] vdd 0.63fF +C1723 wbs_adr_i[20] vdd 0.63fF +C1724 wbs_dat_o[19] vdd 0.63fF +C1725 wbs_dat_i[19] vdd 0.63fF +C1726 wbs_adr_i[19] vdd 0.63fF +C1727 wbs_dat_o[18] vdd 0.63fF +C1728 wbs_dat_i[18] vdd 0.63fF +C1729 wbs_adr_i[18] vdd 0.63fF +C1730 wbs_dat_o[17] vdd 0.63fF +C1731 wbs_dat_i[17] vdd 0.63fF +C1732 wbs_adr_i[17] vdd 0.63fF +C1733 wbs_dat_o[16] vdd 0.63fF +C1734 wbs_dat_i[16] vdd 0.63fF +C1735 wbs_adr_i[16] vdd 0.63fF +C1736 wbs_dat_o[15] vdd 0.63fF +C1737 wbs_dat_i[15] vdd 0.63fF +C1738 wbs_adr_i[15] vdd 0.63fF +C1739 wbs_dat_o[14] vdd 0.63fF +C1740 wbs_dat_i[14] vdd 0.63fF +C1741 wbs_adr_i[14] vdd 0.63fF +C1742 wbs_dat_o[13] vdd 0.63fF +C1743 wbs_dat_i[13] vdd 0.63fF +C1744 wbs_adr_i[13] vdd 0.63fF +C1745 wbs_dat_o[12] vdd 0.63fF +C1746 wbs_dat_i[12] vdd 0.63fF +C1747 wbs_adr_i[12] vdd 0.63fF +C1748 wbs_dat_o[11] vdd 0.63fF +C1749 wbs_dat_i[11] vdd 0.63fF +C1750 wbs_adr_i[11] vdd 0.63fF +C1751 wbs_dat_o[10] vdd 0.63fF +C1752 wbs_dat_i[10] vdd 0.63fF +C1753 wbs_adr_i[10] vdd 0.63fF +C1754 wbs_dat_o[9] vdd 0.63fF +C1755 wbs_dat_i[9] vdd 0.63fF +C1756 wbs_adr_i[9] vdd 0.63fF +C1757 wbs_dat_o[8] vdd 0.63fF +C1758 wbs_dat_i[8] vdd 0.63fF +C1759 wbs_adr_i[8] vdd 0.63fF +C1760 wbs_dat_o[7] vdd 0.63fF +C1761 wbs_dat_i[7] vdd 0.63fF +C1762 wbs_adr_i[7] vdd 0.63fF +C1763 wbs_dat_o[6] vdd 0.63fF +C1764 wbs_dat_i[6] vdd 0.63fF +C1765 wbs_adr_i[6] vdd 0.63fF +C1766 wbs_dat_o[5] vdd 0.63fF +C1767 wbs_dat_i[5] vdd 0.63fF +C1768 wbs_adr_i[5] vdd 0.63fF +C1769 wbs_dat_o[4] vdd 0.63fF +C1770 wbs_dat_i[4] vdd 0.63fF +C1771 wbs_adr_i[4] vdd 0.63fF +C1772 wbs_sel_i[3] vdd 0.63fF +C1773 wbs_dat_o[3] vdd 0.63fF +C1774 wbs_dat_i[3] vdd 0.63fF +C1775 wbs_adr_i[3] vdd 0.63fF +C1776 wbs_sel_i[2] vdd 0.63fF +C1777 wbs_dat_o[2] vdd 0.63fF +C1778 wbs_dat_i[2] vdd 0.63fF +C1779 wbs_adr_i[2] vdd 0.63fF +C1780 wbs_sel_i[1] vdd 0.63fF +C1781 wbs_dat_o[1] vdd 0.63fF +C1782 wbs_dat_i[1] vdd 0.63fF +C1783 wbs_adr_i[1] vdd 0.63fF +C1784 wbs_sel_i[0] vdd 0.63fF +C1785 wbs_dat_o[0] vdd 0.63fF +C1786 wbs_dat_i[0] vdd 0.63fF +C1787 wbs_adr_i[0] vdd 0.63fF +C1788 wbs_we_i vdd 0.63fF +C1789 wbs_stb_i vdd 0.63fF +C1790 wbs_cyc_i vdd 0.63fF +C1791 wbs_ack_o vdd 0.63fF +C1792 wb_rst_i vdd 0.63fF +C1793 wb_clk_i vdd 0.63fF +C1794 pll_full_0/divider_0/and_0/Z1 vdd 0.65fF +C1795 pll_full_0/divider_0/and_0/B vdd 2.45fF +C1796 pll_full_0/divider_0/and_0/A vdd 2.35fF +C1797 pll_full_0/divider_0/and_0/out1 vdd 2.99fF +C1798 pll_full_0/divider_0/tspc_2/Z4 vdd 0.86fF +C1799 pll_full_0/divbuf_0/IN vdd 9.95fF +C1800 pll_full_0/divider_0/tspc_2/Z3 vdd 2.26fF +C1801 pll_full_0/divider_0/tspc_2/Z2 vdd 1.46fF +C1802 pll_full_0/divider_0/tspc_2/Z1 vdd 0.99fF +C1803 pll_full_0/divider_0/nor_0/B vdd 6.48fF +C1804 pll_full_0/divider_0/tspc_2/a_630_n680# vdd 1.14fF **FLOATING +C1805 pll_full_0/divider_0/tspc_1/Z4 vdd 0.86fF +C1806 pll_full_0/divider_0/tspc_1/Q vdd 3.12fF +C1807 pll_full_0/divider_0/tspc_1/Z3 vdd 2.26fF +C1808 pll_full_0/divider_0/tspc_1/Z2 vdd 1.46fF +C1809 pll_full_0/divider_0/tspc_1/Z1 vdd 0.99fF +C1810 pll_full_0/divider_0/nor_1/B vdd 7.12fF +C1811 pll_full_0/divider_0/tspc_1/a_630_n680# vdd 1.15fF **FLOATING +C1812 pll_full_0/divider_0/tspc_0/Z4 vdd 0.86fF +C1813 pll_full_0/divider_0/tspc_0/Q vdd 3.14fF +C1814 pll_full_0/divider_0/tspc_0/Z3 vdd 2.26fF +C1815 pll_full_0/divider_0/tspc_0/Z2 vdd 1.46fF +C1816 pll_full_0/divider_0/tspc_0/Z1 vdd 0.99fF +C1817 pll_full_0/divider_0/nor_1/A vdd 7.08fF +C1818 pll_full_0/divider_0/tspc_0/a_630_n680# vdd 1.15fF **FLOATING +C1819 pll_full_0/divider_0/clk vdd 31.85fF +C1820 pll_full_0/divider_0/prescaler_0/Out vdd 4.59fF +C1821 pll_full_0/divider_0/prescaler_0/nand_1/z1 vdd 0.36fF +C1822 pll_full_0/divider_0/prescaler_0/tspc_2/D vdd 2.64fF +C1823 pll_full_0/divider_0/prescaler_0/tspc_0/Q vdd 3.64fF +C1824 pll_full_0/divider_0/prescaler_0/tspc_1/Q vdd 3.61fF +C1825 pll_full_0/divider_0/prescaler_0/nand_0/z1 vdd 0.36fF +C1826 pll_full_0/divider_0/prescaler_0/tspc_0/D vdd 3.12fF +C1827 pll_full_0/divider_0/and_0/OUT vdd 5.67fF +C1828 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 vdd 0.86fF +C1829 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 vdd 2.26fF +C1830 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 vdd 1.46fF +C1831 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 vdd 0.99fF +C1832 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# vdd 1.16fF **FLOATING +C1833 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# vdd 2.11fF **FLOATING +C1834 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 vdd 0.86fF +C1835 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 vdd 2.26fF +C1836 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 vdd 1.48fF +C1837 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 vdd 0.99fF +C1838 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# vdd 1.14fF **FLOATING +C1839 pll_full_0/divider_0/prescaler_0/m1_2700_2190# vdd 4.22fF **FLOATING +C1840 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 vdd 0.86fF +C1841 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 vdd 2.26fF +C1842 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 vdd 1.19fF +C1843 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 vdd 0.99fF +C1844 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# vdd 1.47fF **FLOATING +C1845 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# vdd 2.11fF **FLOATING +C1846 pll_full_0/divider_0/nor_1/Z1 vdd 1.34fF +C1847 pll_full_0/divider_0/nor_0/Z1 vdd 1.34fF +C1848 pll_full_0/divbuf_1/OUT vdd 363.82fF +C1849 pll_full_0/divbuf_1/OUT5 vdd 350.37fF +C1850 pll_full_0/divbuf_1/OUT4 vdd 133.72fF +C1851 pll_full_0/divbuf_1/OUT3 vdd 34.03fF +C1852 pll_full_0/divbuf_1/OUT2 vdd 8.71fF +C1853 pll_full_0/divbuf_1/a_492_n240# vdd 2.46fF **FLOATING +C1854 pll_full_0/divbuf_0/OUT5 vdd 350.37fF +C1855 pll_full_0/divbuf_0/OUT4 vdd 133.72fF +C1856 pll_full_0/divbuf_0/OUT3 vdd 34.03fF +C1857 pll_full_0/divbuf_0/OUT2 vdd 8.71fF +C1858 pll_full_0/divbuf_0/a_492_n240# vdd 2.46fF **FLOATING +C1859 pll_full_0/ro_complete_0/cbank_2/v vdd 17.88fF +C1860 pll_full_0/ro_complete_0/cbank_2/switch_5/vin vdd 0.78fF +C1861 pll_full_0/ro_complete_0/cbank_2/switch_4/vin vdd 1.50fF +C1862 pll_full_0/ro_complete_0/cbank_2/switch_2/vin vdd 1.30fF +C1863 pll_full_0/ro_complete_0/cbank_2/switch_3/vin vdd 0.56fF +C1864 pll_full_0/ro_complete_0/cbank_2/switch_1/vin vdd 1.14fF +C1865 pll_full_0/ro_complete_0/cbank_2/switch_0/vin vdd 1.02fF +C1866 pll_full_0/ro_complete_0/cbank_1/switch_5/vin vdd 0.78fF +C1867 pll_full_0/ro_complete_0/a0 vdd 7.88fF +C1868 pll_full_0/ro_complete_0/cbank_1/switch_4/vin vdd 1.50fF +C1869 pll_full_0/ro_complete_0/a1 vdd 5.39fF +C1870 pll_full_0/ro_complete_0/cbank_1/switch_2/vin vdd 1.30fF +C1871 pll_full_0/ro_complete_0/a3 vdd 6.85fF +C1872 pll_full_0/ro_complete_0/cbank_1/switch_3/vin vdd 0.56fF +C1873 pll_full_0/ro_complete_0/a2 vdd 5.48fF +C1874 pll_full_0/ro_complete_0/cbank_1/switch_1/vin vdd 1.14fF +C1875 pll_full_0/ro_complete_0/a4 vdd 5.36fF +C1876 pll_full_0/ro_complete_0/cbank_1/switch_0/vin vdd 1.02fF +C1877 pll_full_0/ro_complete_0/a5 vdd 5.19fF +C1878 pll_full_0/ro_complete_0/cbank_0/v vdd 15.02fF +C1879 pll_full_0/ro_complete_0/cbank_0/switch_5/vin vdd 0.78fF +C1880 pll_full_0/ro_complete_0/cbank_0/switch_4/vin vdd 1.50fF +C1881 pll_full_0/ro_complete_0/cbank_0/switch_2/vin vdd 1.30fF +C1882 pll_full_0/ro_complete_0/cbank_0/switch_3/vin vdd 0.56fF +C1883 pll_full_0/ro_complete_0/cbank_0/switch_1/vin vdd 1.14fF +C1884 pll_full_0/ro_complete_0/cbank_0/switch_0/vin vdd 1.02fF +C1885 pll_full_0/ro_complete_0/ro_var_extend_0/vcont vdd 0.27fF +C1886 pll_full_0/filter_0/a_4216_n5230# vdd 419.25fF **FLOATING +C1887 pll_full_0/filter_0/a_4216_n2998# vdd 1.39fF **FLOATING +C1888 pll_full_0/cp_0/down vdd 1.54fF +C1889 pll_full_0/cp_0/upbar vdd 1.79fF +C1890 pll_full_0/cp_0/a_7110_n2840# vdd 0.17fF **FLOATING +C1891 pll_full_0/cp_0/a_3060_n2840# vdd 1.71fF **FLOATING +C1892 pll_full_0/cp_0/a_7110_0# vdd 0.17fF **FLOATING +C1893 pll_full_0/cp_0/a_6370_0# vdd 0.40fF **FLOATING +C1894 pll_full_0/cp_0/a_3060_0# vdd 2.49fF **FLOATING +C1895 pll_full_0/cp_0/a_1710_0# vdd 7.47fF **FLOATING +C1896 pll_full_0/pd_0/and_pd_0/Z1 vdd 0.39fF +C1897 pll_full_0/pd_0/and_pd_0/Out1 vdd 2.22fF +C1898 pll_full_0/pd_0/tspc_r_1/z5 vdd 1.10fF +C1899 pll_full_0/pd_0/tspc_r_1/Z4 vdd 1.07fF +C1900 pll_full_0/pd_0/tspc_r_1/Qbar vdd 0.88fF +C1901 pll_full_0/pd_0/tspc_r_1/Z2 vdd 1.22fF +C1902 pll_full_0/pd_0/tspc_r_1/Z1 vdd 0.67fF +C1903 pll_full_0/pd_0/UP vdd 6.61fF +C1904 pll_full_0/pd_0/tspc_r_1/Qbar1 vdd 1.34fF +C1905 pll_full_0/pd_0/tspc_r_1/Z3 vdd 2.12fF +C1906 pll_full_0/pd_0/REF vdd 6.44fF +C1907 pll_full_0/pd_0/tspc_r_0/z5 vdd 1.10fF +C1908 pll_full_0/pd_0/tspc_r_0/Z4 vdd 1.07fF +C1909 pll_full_0/pd_0/R vdd 3.05fF +C1910 pll_full_0/pd_0/tspc_r_0/Qbar vdd 0.79fF +C1911 pll_full_0/pd_0/tspc_r_0/Z2 vdd 1.22fF +C1912 pll_full_0/pd_0/tspc_r_0/Z1 vdd 0.67fF +C1913 pll_full_0/pd_0/DOWN vdd 7.24fF +C1914 pll_full_0/pd_0/tspc_r_0/Qbar1 vdd 1.34fF +C1915 pll_full_0/pd_0/tspc_r_0/Z3 vdd 2.12fF +C1916 pll_full_0/pd_0/DIV vdd 371.87fF +C1917 divider_0/and_0/Z1 vdd 0.74fF +C1918 divider_0/and_0/B vdd 2.25fF +C1919 divider_0/and_0/A vdd 2.19fF +C1920 divider_0/and_0/out1 vdd 2.93fF +C1921 divider_0/tspc_2/Z4 vdd 0.86fF +C1922 divider_0/Out vdd 1.60fF +C1923 divider_0/tspc_2/Z3 vdd 2.26fF +C1924 divider_0/tspc_2/Z2 vdd 1.46fF +C1925 divider_0/tspc_2/Z1 vdd 0.99fF +C1926 divider_0/nor_0/B vdd 6.33fF +C1927 divider_0/tspc_2/a_630_n680# vdd 1.14fF **FLOATING +C1928 divider_0/tspc_1/Z4 vdd 0.86fF +C1929 divider_0/tspc_1/Q vdd 3.12fF +C1930 divider_0/tspc_1/Z3 vdd 2.26fF +C1931 divider_0/tspc_1/Z2 vdd 1.46fF +C1932 divider_0/tspc_1/Z1 vdd 0.99fF +C1933 divider_0/nor_1/B vdd 7.05fF +C1934 divider_0/tspc_1/a_630_n680# vdd 1.15fF **FLOATING +C1935 divider_0/tspc_0/Z4 vdd 0.86fF +C1936 divider_0/tspc_0/Q vdd 3.14fF +C1937 divider_0/tspc_0/Z3 vdd 2.26fF +C1938 divider_0/tspc_0/Z2 vdd 1.46fF +C1939 divider_0/tspc_0/Z1 vdd 0.99fF +C1940 divider_0/nor_1/A vdd 7.04fF +C1941 divider_0/tspc_0/a_630_n680# vdd 1.15fF **FLOATING +C1942 divider_0/clk vdd 5.63fF +C1943 divider_0/prescaler_0/Out vdd 4.59fF +C1944 divider_0/prescaler_0/nand_1/z1 vdd 0.36fF +C1945 divider_0/prescaler_0/tspc_2/D vdd 2.64fF +C1946 divider_0/prescaler_0/tspc_0/Q vdd 3.64fF +C1947 divider_0/prescaler_0/tspc_1/Q vdd 3.61fF +C1948 divider_0/prescaler_0/nand_0/z1 vdd 0.36fF +C1949 divider_0/prescaler_0/tspc_0/D vdd 3.12fF +C1950 divider_0/and_0/OUT vdd 5.62fF +C1951 divider_0/prescaler_0/tspc_2/Z4 vdd 0.86fF +C1952 divider_0/prescaler_0/tspc_2/Z3 vdd 2.26fF +C1953 divider_0/prescaler_0/tspc_2/Z2 vdd 1.46fF +C1954 divider_0/prescaler_0/tspc_2/Z1 vdd 0.99fF +C1955 divider_0/prescaler_0/tspc_2/a_630_n680# vdd 1.16fF **FLOATING +C1956 divider_0/prescaler_0/tspc_2/a_740_n680# vdd 2.11fF **FLOATING +C1957 divider_0/prescaler_0/tspc_1/Z4 vdd 0.86fF +C1958 divider_0/prescaler_0/tspc_1/Z3 vdd 2.26fF +C1959 divider_0/prescaler_0/tspc_1/Z2 vdd 1.48fF +C1960 divider_0/prescaler_0/tspc_1/Z1 vdd 0.99fF +C1961 divider_0/prescaler_0/tspc_1/a_630_n680# vdd 1.14fF **FLOATING +C1962 divider_0/prescaler_0/m1_2700_2190# vdd 4.22fF **FLOATING +C1963 divider_0/prescaler_0/tspc_0/Z4 vdd 0.86fF +C1964 divider_0/prescaler_0/tspc_0/Z3 vdd 2.26fF +C1965 divider_0/prescaler_0/tspc_0/Z2 vdd 1.46fF +C1966 divider_0/prescaler_0/tspc_0/Z1 vdd 0.99fF +C1967 divider_0/prescaler_0/tspc_0/a_630_n680# vdd 1.14fF **FLOATING +C1968 divider_0/prescaler_0/tspc_0/a_740_n680# vdd 2.11fF **FLOATING +C1969 divider_0/nor_1/Z1 vdd 1.34fF +C1970 divider_0/nor_0/Z1 vdd 1.34fF +C1971 divider_0/mc2 vdd 5.29fF +C1972 divbuf_7/OUT vdd 363.82fF +C1973 divbuf_7/OUT5 vdd 350.37fF +C1974 divbuf_7/OUT4 vdd 133.72fF +C1975 divbuf_7/OUT3 vdd 34.03fF +C1976 divbuf_7/OUT2 vdd 8.71fF +C1977 divbuf_7/IN vdd 0.89fF +C1978 divbuf_7/a_492_n240# vdd 2.46fF **FLOATING +C1979 divbuf_6/OUT vdd 363.82fF +C1980 divbuf_6/OUT5 vdd 350.37fF +C1981 divbuf_6/OUT4 vdd 133.72fF +C1982 divbuf_6/OUT3 vdd 34.03fF +C1983 divbuf_6/OUT2 vdd 8.71fF +C1984 divbuf_6/IN vdd 0.89fF +C1985 divbuf_6/a_492_n240# vdd 2.46fF **FLOATING +C1986 divbuf_5/OUT vdd 363.82fF +C1987 divbuf_5/OUT5 vdd 350.37fF +C1988 divbuf_5/OUT4 vdd 133.72fF +C1989 divbuf_5/OUT3 vdd 34.03fF +C1990 divbuf_5/OUT2 vdd 8.71fF +C1991 divbuf_5/IN vdd 0.89fF +C1992 divbuf_5/a_492_n240# vdd 2.46fF **FLOATING +C1993 divbuf_4/OUT vdd 363.82fF +C1994 divbuf_4/OUT5 vdd 350.37fF +C1995 divbuf_4/OUT4 vdd 133.72fF +C1996 divbuf_4/OUT3 vdd 34.03fF +C1997 divbuf_4/OUT2 vdd 8.71fF +C1998 divbuf_4/IN vdd 0.89fF +C1999 divbuf_4/a_492_n240# vdd 2.46fF **FLOATING +C2000 divbuf_3/OUT vdd 363.82fF +C2001 divbuf_3/OUT5 vdd 350.37fF +C2002 divbuf_3/OUT4 vdd 133.72fF +C2003 divbuf_3/OUT3 vdd 34.03fF +C2004 divbuf_3/OUT2 vdd 8.71fF +C2005 divbuf_3/IN vdd 0.89fF +C2006 divbuf_3/a_492_n240# vdd 2.46fF **FLOATING +C2007 divbuf_2/OUT vdd 363.82fF +C2008 divbuf_2/OUT5 vdd 350.37fF +C2009 divbuf_2/OUT4 vdd 133.72fF +C2010 divbuf_2/OUT3 vdd 34.03fF +C2011 divbuf_2/OUT2 vdd 8.71fF +C2012 divbuf_2/IN vdd 0.89fF +C2013 divbuf_2/a_492_n240# vdd 2.46fF **FLOATING +C2014 divbuf_1/OUT vdd 363.82fF +C2015 divbuf_1/OUT5 vdd 350.37fF +C2016 divbuf_1/OUT4 vdd 133.72fF +C2017 divbuf_1/OUT3 vdd 34.03fF +C2018 divbuf_1/OUT2 vdd 8.71fF +C2019 divbuf_1/IN vdd 0.89fF +C2020 divbuf_1/a_492_n240# vdd 2.46fF **FLOATING +C2021 divbuf_0/OUT vdd 363.82fF +C2022 divbuf_0/OUT5 vdd 350.37fF +C2023 divbuf_0/OUT4 vdd 133.72fF +C2024 divbuf_0/OUT3 vdd 34.03fF +C2025 divbuf_0/OUT2 vdd 8.71fF +C2026 divbuf_0/IN vdd 0.89fF +C2027 divbuf_0/a_492_n240# vdd 2.46fF **FLOATING +C2028 ro_complete_0/cbank_2/v vdd 17.84fF +C2029 ro_complete_0/cbank_2/switch_5/vin vdd 0.78fF +C2030 ro_complete_0/cbank_2/switch_4/vin vdd 1.50fF +C2031 ro_complete_0/cbank_2/switch_2/vin vdd 1.30fF +C2032 ro_complete_0/cbank_2/switch_3/vin vdd 0.56fF +C2033 ro_complete_0/cbank_2/switch_1/vin vdd 1.14fF +C2034 ro_complete_0/cbank_2/switch_0/vin vdd 1.02fF +C2035 ro_complete_0/cbank_1/v vdd 16.34fF +C2036 ro_complete_0/cbank_1/switch_5/vin vdd 0.78fF +C2037 ro_complete_0/a0 vdd 7.88fF +C2038 ro_complete_0/cbank_1/switch_4/vin vdd 1.50fF +C2039 ro_complete_0/a1 vdd 5.39fF +C2040 ro_complete_0/cbank_1/switch_2/vin vdd 1.30fF +C2041 ro_complete_0/a3 vdd 6.85fF +C2042 ro_complete_0/cbank_1/switch_3/vin vdd 0.56fF +C2043 ro_complete_0/a2 vdd 5.48fF +C2044 ro_complete_0/cbank_1/switch_1/vin vdd 1.14fF +C2045 ro_complete_0/a4 vdd 5.36fF +C2046 ro_complete_0/cbank_1/switch_0/vin vdd 1.02fF +C2047 ro_complete_0/a5 vdd 5.19fF +C2048 ro_complete_0/cbank_0/v vdd 14.98fF +C2049 ro_complete_0/cbank_0/switch_5/vin vdd 0.78fF +C2050 ro_complete_0/cbank_0/switch_4/vin vdd 1.50fF +C2051 ro_complete_0/cbank_0/switch_2/vin vdd 1.30fF +C2052 ro_complete_0/cbank_0/switch_3/vin vdd 0.56fF +C2053 ro_complete_0/cbank_0/switch_1/vin vdd 1.14fF +C2054 ro_complete_0/cbank_0/switch_0/vin vdd 1.02fF +C2055 ro_complete_0/ro_var_extend_0/vcont vdd 0.27fF +C2056 filter_0/v vdd 85.69fF +C2057 filter_0/a_4216_n5230# vdd 418.47fF **FLOATING +C2058 filter_0/a_4216_n2998# vdd 1.03fF **FLOATING +C2059 cp_0/down vdd 1.54fF +C2060 cp_0/vbias vdd 2.41fF +C2061 cp_0/out vdd 5.26fF +C2062 cp_0/upbar vdd 1.50fF +C2063 cp_0/a_7110_n2840# vdd 0.17fF **FLOATING +C2064 cp_0/a_3060_n2840# vdd 1.71fF **FLOATING +C2065 cp_0/a_7110_0# vdd 0.17fF **FLOATING +C2066 cp_0/a_6370_0# vdd 0.40fF **FLOATING +C2067 cp_0/a_3060_0# vdd 1.65fF **FLOATING +C2068 cp_0/a_1710_0# vdd 5.76fF **FLOATING +C2069 cp_0/a_1710_n2840# vdd 4.89fF **FLOATING +C2070 cp_0/a_10_n50# vdd 2.96fF **FLOATING +C2071 ro_div_new_0/divider_0/and_0/Z1 vdd 0.74fF +C2072 ro_div_new_0/divider_0/and_0/B vdd 2.25fF +C2073 ro_div_new_0/divider_0/and_0/A vdd 2.19fF +C2074 ro_div_new_0/divider_0/and_0/out1 vdd 2.93fF +C2075 ro_div_new_0/divider_0/tspc_2/Z4 vdd 0.86fF +C2076 ro_div_new_0/divider_0/Out vdd 1.60fF +C2077 ro_div_new_0/divider_0/tspc_2/Z3 vdd 2.26fF +C2078 ro_div_new_0/divider_0/tspc_2/Z2 vdd 1.46fF +C2079 ro_div_new_0/divider_0/tspc_2/Z1 vdd 0.99fF +C2080 ro_div_new_0/divider_0/nor_0/B vdd 6.33fF +C2081 ro_div_new_0/divider_0/tspc_2/a_630_n680# vdd 1.14fF **FLOATING +C2082 ro_div_new_0/divider_0/tspc_1/Z4 vdd 0.86fF +C2083 ro_div_new_0/divider_0/tspc_1/Q vdd 3.12fF +C2084 ro_div_new_0/divider_0/tspc_1/Z3 vdd 2.26fF +C2085 ro_div_new_0/divider_0/tspc_1/Z2 vdd 1.46fF +C2086 ro_div_new_0/divider_0/tspc_1/Z1 vdd 0.99fF +C2087 ro_div_new_0/divider_0/nor_1/B vdd 7.05fF +C2088 ro_div_new_0/divider_0/tspc_1/a_630_n680# vdd 1.15fF **FLOATING +C2089 ro_div_new_0/divider_0/tspc_0/Z4 vdd 0.86fF +C2090 ro_div_new_0/divider_0/tspc_0/Q vdd 3.14fF +C2091 ro_div_new_0/divider_0/tspc_0/Z3 vdd 2.26fF +C2092 ro_div_new_0/divider_0/tspc_0/Z2 vdd 1.46fF +C2093 ro_div_new_0/divider_0/tspc_0/Z1 vdd 0.99fF +C2094 ro_div_new_0/divider_0/nor_1/A vdd 7.04fF +C2095 ro_div_new_0/divider_0/tspc_0/a_630_n680# vdd 1.15fF **FLOATING +C2096 ro_div_new_0/divider_0/clk vdd 23.62fF +C2097 ro_div_new_0/divider_0/prescaler_0/Out vdd 4.59fF +C2098 ro_div_new_0/divider_0/prescaler_0/nand_1/z1 vdd 0.36fF +C2099 ro_div_new_0/divider_0/prescaler_0/tspc_2/D vdd 2.64fF +C2100 ro_div_new_0/divider_0/prescaler_0/tspc_0/Q vdd 3.64fF +C2101 ro_div_new_0/divider_0/prescaler_0/tspc_1/Q vdd 3.61fF +C2102 ro_div_new_0/divider_0/prescaler_0/nand_0/z1 vdd 0.36fF +C2103 ro_div_new_0/divider_0/prescaler_0/tspc_0/D vdd 3.12fF +C2104 ro_div_new_0/divider_0/and_0/OUT vdd 5.62fF +C2105 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z4 vdd 0.86fF +C2106 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z3 vdd 2.26fF +C2107 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z2 vdd 1.46fF +C2108 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z1 vdd 0.99fF +C2109 ro_div_new_0/divider_0/prescaler_0/tspc_2/a_630_n680# vdd 1.16fF **FLOATING +C2110 ro_div_new_0/divider_0/prescaler_0/tspc_2/a_740_n680# vdd 2.11fF **FLOATING +C2111 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z4 vdd 0.86fF +C2112 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z3 vdd 2.26fF +C2113 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z2 vdd 1.48fF +C2114 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z1 vdd 0.99fF +C2115 ro_div_new_0/divider_0/prescaler_0/tspc_1/a_630_n680# vdd 1.14fF **FLOATING +C2116 ro_div_new_0/divider_0/prescaler_0/m1_2700_2190# vdd 4.22fF **FLOATING +C2117 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z4 vdd 0.86fF +C2118 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z3 vdd 2.26fF +C2119 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z2 vdd 1.46fF +C2120 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z1 vdd 0.99fF +C2121 ro_div_new_0/divider_0/prescaler_0/tspc_0/a_630_n680# vdd 1.14fF **FLOATING +C2122 ro_div_new_0/divider_0/prescaler_0/tspc_0/a_740_n680# vdd 2.11fF **FLOATING +C2123 ro_div_new_0/divider_0/nor_1/Z1 vdd 1.34fF +C2124 ro_div_new_0/divider_0/nor_0/Z1 vdd 1.34fF +C2125 ro_div_new_0/divider_0/mc2 vdd 5.29fF +C2126 ro_div_new_0/ro_complete_0/cbank_2/v vdd 17.84fF +C2127 ro_div_new_0/ro_complete_0/cbank_2/switch_5/vin vdd 0.78fF +C2128 ro_div_new_0/ro_complete_0/cbank_2/switch_4/vin vdd 1.50fF +C2129 ro_div_new_0/ro_complete_0/cbank_2/switch_2/vin vdd 1.30fF +C2130 ro_div_new_0/ro_complete_0/cbank_2/switch_3/vin vdd 0.56fF +C2131 ro_div_new_0/ro_complete_0/cbank_2/switch_1/vin vdd 1.14fF +C2132 ro_div_new_0/ro_complete_0/cbank_2/switch_0/vin vdd 1.02fF +C2133 ro_div_new_0/ro_complete_0/cbank_1/switch_5/vin vdd 0.78fF +C2134 ro_div_new_0/ro_complete_0/a0 vdd 7.88fF +C2135 ro_div_new_0/ro_complete_0/cbank_1/switch_4/vin vdd 1.50fF +C2136 ro_div_new_0/ro_complete_0/a1 vdd 5.39fF +C2137 ro_div_new_0/ro_complete_0/cbank_1/switch_2/vin vdd 1.30fF +C2138 ro_div_new_0/ro_complete_0/a3 vdd 6.85fF +C2139 ro_div_new_0/ro_complete_0/cbank_1/switch_3/vin vdd 0.56fF +C2140 ro_div_new_0/ro_complete_0/a2 vdd 5.48fF +C2141 ro_div_new_0/ro_complete_0/cbank_1/switch_1/vin vdd 1.14fF +C2142 ro_div_new_0/ro_complete_0/a4 vdd 5.36fF +C2143 ro_div_new_0/ro_complete_0/cbank_1/switch_0/vin vdd 1.02fF +C2144 ro_div_new_0/ro_complete_0/a5 vdd 5.19fF +C2145 ro_div_new_0/ro_complete_0/cbank_0/v vdd 14.98fF +C2146 ro_div_new_0/ro_complete_0/cbank_0/switch_5/vin vdd 0.78fF +C2147 ro_div_new_0/ro_complete_0/cbank_0/switch_4/vin vdd 1.50fF +C2148 ro_div_new_0/ro_complete_0/cbank_0/switch_2/vin vdd 1.30fF +C2149 ro_div_new_0/ro_complete_0/cbank_0/switch_3/vin vdd 0.56fF +C2150 ro_div_new_0/ro_complete_0/cbank_0/switch_1/vin vdd 1.14fF +C2151 ro_div_new_0/ro_complete_0/cbank_0/switch_0/vin vdd 1.02fF +C2152 ro_div_new_0/ro_complete_0/ro_var_extend_0/vcont vdd 0.27fF +C2153 pd_0/and_pd_0/Z1 vdd 0.39fF +C2154 pd_0/and_pd_0/Out1 vdd 2.22fF +C2155 pd_0/tspc_r_1/z5 vdd 1.10fF +C2156 pd_0/tspc_r_1/Z4 vdd 1.07fF +C2157 pd_0/tspc_r_1/Qbar vdd 0.88fF +C2158 pd_0/tspc_r_1/Z2 vdd 1.22fF +C2159 pd_0/tspc_r_1/Z1 vdd 0.67fF +C2160 pd_0/UP vdd 2.21fF +C2161 pd_0/tspc_r_1/Qbar1 vdd 1.34fF +C2162 pd_0/tspc_r_1/Z3 vdd 2.12fF +C2163 pd_0/REF vdd 1.80fF +C2164 pd_0/tspc_r_0/z5 vdd 1.10fF +C2165 pd_0/tspc_r_0/Z4 vdd 1.07fF +C2166 pd_0/R vdd 3.05fF +C2167 pd_0/tspc_r_0/Qbar vdd 0.79fF +C2168 pd_0/tspc_r_0/Z2 vdd 1.22fF +C2169 pd_0/tspc_r_0/Z1 vdd 0.67fF +C2170 pd_0/DOWN vdd 3.08fF +C2171 pd_0/tspc_r_0/Qbar1 vdd 1.34fF +C2172 pd_0/tspc_r_0/Z3 vdd 2.12fF +C2173 pd_0/DIV vdd 1.82fF .ends