| * SPICE3 file created from user_analog_project_wrapper.ext - technology: sky130A |
| |
| .subckt user_analog_project_wrapper gpio_analog[0] gpio_analog[10] gpio_analog[11] |
| + gpio_analog[12] gpio_analog[13] gpio_analog[14] gpio_analog[15] gpio_analog[16] |
| + gpio_analog[17] gpio_analog[1] gpio_analog[2] gpio_analog[3] gpio_analog[4] gpio_analog[5] |
| + gpio_analog[6] gpio_analog[7] gpio_analog[8] gpio_analog[9] gpio_noesd[0] gpio_noesd[10] |
| + gpio_noesd[11] gpio_noesd[12] gpio_noesd[13] gpio_noesd[14] gpio_noesd[15] gpio_noesd[16] |
| + gpio_noesd[17] gpio_noesd[1] gpio_noesd[2] gpio_noesd[3] gpio_noesd[4] gpio_noesd[5] |
| + gpio_noesd[6] gpio_noesd[7] gpio_noesd[8] gpio_noesd[9] io_analog[0] io_analog[10] |
| + io_analog[1] io_analog[2] io_analog[3] io_analog[4] io_analog[5] io_analog[6] io_analog[7] |
| + io_analog[8] io_analog[9] io_clamp_high[0] io_clamp_high[1] io_clamp_high[2] io_clamp_low[0] |
| + io_clamp_low[1] io_clamp_low[2] io_in[0] io_in[10] io_in[11] io_in[12] io_in[13] |
| + io_in[14] io_in[15] io_in[16] io_in[17] io_in[18] io_in[19] io_in[1] io_in[20] io_in[21] |
| + io_in[22] io_in[23] io_in[24] io_in[25] io_in[26] io_in[2] io_in[3] io_in[4] io_in[5] |
| + io_in[6] io_in[7] io_in[8] io_in[9] io_in_3v3[0] io_in_3v3[10] io_in_3v3[11] io_in_3v3[12] |
| + io_in_3v3[13] io_in_3v3[14] io_in_3v3[15] io_in_3v3[16] io_in_3v3[17] io_in_3v3[18] |
| + io_in_3v3[19] io_in_3v3[1] io_in_3v3[20] io_in_3v3[21] io_in_3v3[22] io_in_3v3[23] |
| + io_in_3v3[24] io_in_3v3[25] io_in_3v3[26] io_in_3v3[2] io_in_3v3[3] io_in_3v3[4] |
| + io_in_3v3[5] io_in_3v3[6] io_in_3v3[7] io_in_3v3[8] io_in_3v3[9] io_oeb[0] io_oeb[10] |
| + io_oeb[11] io_oeb[12] io_oeb[13] io_oeb[14] io_oeb[15] io_oeb[16] io_oeb[17] io_oeb[18] |
| + io_oeb[19] io_oeb[1] io_oeb[20] io_oeb[21] io_oeb[22] io_oeb[23] io_oeb[24] io_oeb[25] |
| + io_oeb[26] io_oeb[2] io_oeb[3] io_oeb[4] io_oeb[5] io_oeb[6] io_oeb[7] io_oeb[8] |
| + io_oeb[9] io_out[0] io_out[10] io_out[11] io_out[12] io_out[13] io_out[14] io_out[15] |
| + io_out[16] io_out[17] io_out[18] io_out[19] io_out[1] io_out[20] io_out[21] io_out[22] |
| + io_out[23] io_out[24] io_out[25] io_out[26] io_out[2] io_out[3] io_out[4] io_out[5] |
| + io_out[6] io_out[7] io_out[8] io_out[9] la_data_in[0] la_data_in[100] la_data_in[101] |
| + la_data_in[102] la_data_in[103] la_data_in[104] la_data_in[105] la_data_in[106] |
| + la_data_in[107] la_data_in[108] la_data_in[109] la_data_in[10] la_data_in[110] la_data_in[111] |
| + la_data_in[112] la_data_in[113] la_data_in[114] la_data_in[115] la_data_in[116] |
| + la_data_in[117] la_data_in[118] la_data_in[119] la_data_in[11] la_data_in[120] la_data_in[121] |
| + la_data_in[122] la_data_in[123] la_data_in[124] la_data_in[125] la_data_in[126] |
| + la_data_in[127] la_data_in[12] la_data_in[13] la_data_in[14] la_data_in[15] la_data_in[16] |
| + la_data_in[17] la_data_in[18] la_data_in[19] la_data_in[1] la_data_in[20] la_data_in[21] |
| + la_data_in[22] la_data_in[23] la_data_in[24] la_data_in[25] la_data_in[26] la_data_in[27] |
| + la_data_in[28] la_data_in[29] la_data_in[2] la_data_in[30] la_data_in[31] la_data_in[32] |
| + la_data_in[33] la_data_in[34] la_data_in[35] la_data_in[36] la_data_in[37] la_data_in[38] |
| + la_data_in[39] la_data_in[3] la_data_in[40] la_data_in[41] la_data_in[42] la_data_in[43] |
| + la_data_in[44] la_data_in[45] la_data_in[46] la_data_in[47] la_data_in[48] la_data_in[49] |
| + la_data_in[4] la_data_in[50] la_data_in[51] la_data_in[52] la_data_in[53] la_data_in[54] |
| + la_data_in[55] la_data_in[56] la_data_in[57] la_data_in[58] la_data_in[59] la_data_in[5] |
| + la_data_in[60] la_data_in[61] la_data_in[62] la_data_in[63] la_data_in[64] la_data_in[65] |
| + la_data_in[66] la_data_in[67] la_data_in[68] la_data_in[69] la_data_in[6] la_data_in[70] |
| + la_data_in[71] la_data_in[72] la_data_in[73] la_data_in[74] la_data_in[75] la_data_in[76] |
| + la_data_in[77] la_data_in[78] la_data_in[79] la_data_in[7] la_data_in[80] la_data_in[81] |
| + la_data_in[82] la_data_in[83] la_data_in[84] la_data_in[85] la_data_in[86] la_data_in[87] |
| + la_data_in[88] la_data_in[89] la_data_in[8] la_data_in[90] la_data_in[91] la_data_in[92] |
| + la_data_in[93] la_data_in[94] la_data_in[95] la_data_in[96] la_data_in[97] la_data_in[98] |
| + la_data_in[99] la_data_in[9] la_data_out[0] la_data_out[100] la_data_out[101] la_data_out[102] |
| + la_data_out[103] la_data_out[104] la_data_out[105] la_data_out[106] la_data_out[107] |
| + la_data_out[108] la_data_out[109] la_data_out[10] la_data_out[110] la_data_out[111] |
| + la_data_out[112] la_data_out[113] la_data_out[114] la_data_out[115] la_data_out[116] |
| + la_data_out[117] la_data_out[118] la_data_out[119] la_data_out[11] la_data_out[120] |
| + la_data_out[121] la_data_out[122] la_data_out[123] la_data_out[124] la_data_out[125] |
| + la_data_out[126] la_data_out[127] la_data_out[12] la_data_out[13] la_data_out[14] |
| + la_data_out[15] la_data_out[16] la_data_out[17] la_data_out[18] la_data_out[19] |
| + la_data_out[1] la_data_out[20] la_data_out[21] la_data_out[22] la_data_out[23] la_data_out[24] |
| + la_data_out[25] la_data_out[26] la_data_out[27] la_data_out[28] la_data_out[29] |
| + la_data_out[2] la_data_out[30] la_data_out[31] la_data_out[32] la_data_out[33] la_data_out[34] |
| + la_data_out[35] la_data_out[36] la_data_out[37] la_data_out[38] la_data_out[39] |
| + la_data_out[3] la_data_out[40] la_data_out[41] la_data_out[42] la_data_out[43] la_data_out[44] |
| + la_data_out[45] la_data_out[46] la_data_out[47] la_data_out[48] la_data_out[49] |
| + la_data_out[4] la_data_out[50] la_data_out[51] la_data_out[52] la_data_out[53] la_data_out[54] |
| + la_data_out[55] la_data_out[56] la_data_out[57] la_data_out[58] la_data_out[59] |
| + la_data_out[5] la_data_out[60] la_data_out[61] la_data_out[62] la_data_out[63] la_data_out[64] |
| + la_data_out[65] la_data_out[66] la_data_out[67] la_data_out[68] la_data_out[69] |
| + la_data_out[6] la_data_out[70] la_data_out[71] la_data_out[72] la_data_out[73] la_data_out[74] |
| + la_data_out[75] la_data_out[76] la_data_out[77] la_data_out[78] la_data_out[79] |
| + la_data_out[7] la_data_out[80] la_data_out[81] la_data_out[82] la_data_out[83] la_data_out[84] |
| + la_data_out[85] la_data_out[86] la_data_out[87] la_data_out[88] la_data_out[89] |
| + la_data_out[8] la_data_out[90] la_data_out[91] la_data_out[92] la_data_out[93] la_data_out[94] |
| + la_data_out[95] la_data_out[96] la_data_out[97] la_data_out[98] la_data_out[99] |
| + la_data_out[9] la_oenb[0] la_oenb[100] la_oenb[101] la_oenb[102] la_oenb[103] la_oenb[104] |
| + la_oenb[105] la_oenb[106] la_oenb[107] la_oenb[108] la_oenb[109] la_oenb[10] la_oenb[110] |
| + la_oenb[111] la_oenb[112] la_oenb[113] la_oenb[114] la_oenb[115] la_oenb[116] la_oenb[117] |
| + la_oenb[118] la_oenb[119] la_oenb[11] la_oenb[120] la_oenb[121] la_oenb[122] la_oenb[123] |
| + la_oenb[124] la_oenb[125] la_oenb[126] la_oenb[127] la_oenb[12] la_oenb[13] la_oenb[14] |
| + la_oenb[15] la_oenb[16] la_oenb[17] la_oenb[18] la_oenb[19] la_oenb[1] la_oenb[20] |
| + la_oenb[21] la_oenb[22] la_oenb[23] la_oenb[24] la_oenb[25] la_oenb[26] la_oenb[27] |
| + la_oenb[28] la_oenb[29] la_oenb[2] la_oenb[30] la_oenb[31] la_oenb[32] la_oenb[33] |
| + la_oenb[34] la_oenb[35] la_oenb[36] la_oenb[37] la_oenb[38] la_oenb[39] la_oenb[3] |
| + la_oenb[40] la_oenb[41] la_oenb[42] la_oenb[43] la_oenb[44] la_oenb[45] la_oenb[46] |
| + la_oenb[47] la_oenb[48] la_oenb[49] la_oenb[4] la_oenb[50] la_oenb[51] la_oenb[52] |
| + la_oenb[53] la_oenb[54] la_oenb[55] la_oenb[56] la_oenb[57] la_oenb[58] la_oenb[59] |
| + la_oenb[5] la_oenb[60] la_oenb[61] la_oenb[62] la_oenb[63] la_oenb[64] la_oenb[65] |
| + la_oenb[66] la_oenb[67] la_oenb[68] la_oenb[69] la_oenb[6] la_oenb[70] la_oenb[71] |
| + la_oenb[72] la_oenb[73] la_oenb[74] la_oenb[75] la_oenb[76] la_oenb[77] la_oenb[78] |
| + la_oenb[79] la_oenb[7] la_oenb[80] la_oenb[81] la_oenb[82] la_oenb[83] la_oenb[84] |
| + la_oenb[85] la_oenb[86] la_oenb[87] la_oenb[88] la_oenb[89] la_oenb[8] la_oenb[90] |
| + la_oenb[91] la_oenb[92] la_oenb[93] la_oenb[94] la_oenb[95] la_oenb[96] la_oenb[97] |
| + la_oenb[98] la_oenb[99] la_oenb[9] user_clock2 user_irq[0] user_irq[1] user_irq[2] |
| + vccd1 vccd2 vdda1 vdda2 vssa1 vssa2 vssd1 vssd2 wb_clk_i wb_rst_i wbs_ack_o wbs_adr_i[0] |
| + wbs_adr_i[10] wbs_adr_i[11] wbs_adr_i[12] wbs_adr_i[13] wbs_adr_i[14] wbs_adr_i[15] |
| + wbs_adr_i[16] wbs_adr_i[17] wbs_adr_i[18] wbs_adr_i[19] wbs_adr_i[1] wbs_adr_i[20] |
| + wbs_adr_i[21] wbs_adr_i[22] wbs_adr_i[23] wbs_adr_i[24] wbs_adr_i[25] wbs_adr_i[26] |
| + wbs_adr_i[27] wbs_adr_i[28] wbs_adr_i[29] wbs_adr_i[2] wbs_adr_i[30] wbs_adr_i[31] |
| + wbs_adr_i[3] wbs_adr_i[4] wbs_adr_i[5] wbs_adr_i[6] wbs_adr_i[7] wbs_adr_i[8] wbs_adr_i[9] |
| + wbs_cyc_i wbs_dat_i[0] wbs_dat_i[10] wbs_dat_i[11] wbs_dat_i[12] wbs_dat_i[13] wbs_dat_i[14] |
| + wbs_dat_i[15] wbs_dat_i[16] wbs_dat_i[17] wbs_dat_i[18] wbs_dat_i[19] wbs_dat_i[1] |
| + wbs_dat_i[20] wbs_dat_i[21] wbs_dat_i[22] wbs_dat_i[23] wbs_dat_i[24] wbs_dat_i[25] |
| + wbs_dat_i[26] wbs_dat_i[27] wbs_dat_i[28] wbs_dat_i[29] wbs_dat_i[2] wbs_dat_i[30] |
| + wbs_dat_i[31] wbs_dat_i[3] wbs_dat_i[4] wbs_dat_i[5] wbs_dat_i[6] wbs_dat_i[7] wbs_dat_i[8] |
| + wbs_dat_i[9] wbs_dat_o[0] wbs_dat_o[10] wbs_dat_o[11] wbs_dat_o[12] wbs_dat_o[13] |
| + wbs_dat_o[14] wbs_dat_o[15] wbs_dat_o[16] wbs_dat_o[17] wbs_dat_o[18] wbs_dat_o[19] |
| + wbs_dat_o[1] wbs_dat_o[20] wbs_dat_o[21] wbs_dat_o[22] wbs_dat_o[23] wbs_dat_o[24] |
| + wbs_dat_o[25] wbs_dat_o[26] wbs_dat_o[27] wbs_dat_o[28] wbs_dat_o[29] wbs_dat_o[2] |
| + wbs_dat_o[30] wbs_dat_o[31] wbs_dat_o[3] wbs_dat_o[4] wbs_dat_o[5] wbs_dat_o[6] |
| + wbs_dat_o[7] wbs_dat_o[8] wbs_dat_o[9] wbs_sel_i[0] wbs_sel_i[1] wbs_sel_i[2] wbs_sel_i[3] |
| + wbs_stb_i wbs_we_i |
| C0 pll_full_0/divider_0/and_0/A pll_full_0/divider_0/and_0/B 0.18fF |
| C1 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF |
| C2 divider_0/prescaler_0/Out divider_0/tspc_0/Z3 0.45fF |
| C3 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z1 ro_div_new_0/divider_0/prescaler_0/tspc_0/D 0.15fF |
| C4 ro_div_new_0/divider_0/tspc_0/Z2 ro_div_new_0/divider_0/tspc_0/Z4 0.36fF |
| C5 pll_full_0/divbuf_1/a_492_n240# pll_full_0/divbuf_1/OUT2 0.42fF |
| C6 pll_full_0/divbuf_1/OUT pll_full_0/divbuf_1/OUT4 1.11fF |
| C7 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/nor_1/B 0.06fF |
| C8 pll_full_0/divider_0/prescaler_0/tspc_0/D pll_full_0/divider_0/prescaler_0/nand_0/z1 0.24fF |
| C9 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/Out 0.19fF |
| C10 divider_0/mc2 divider_0/nor_1/B 0.06fF |
| C11 pll_full_0/pd_0/tspc_r_0/Z2 pll_full_0/pd_0/tspc_r_0/Z4 0.14fF |
| C12 divider_0/tspc_0/Z1 divider_0/tspc_0/Z3 0.06fF |
| C13 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_1/Q 0.06fF |
| C14 ro_div_new_0/divider_0/tspc_1/Z1 ro_div_new_0/divider_0/tspc_1/Z4 0.00fF |
| C15 ro_div_new_0/divider_0/tspc_0/a_630_n680# ro_div_new_0/divider_0/tspc_0/Z2 0.01fF |
| C16 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z2 ro_div_new_0/divider_0/prescaler_0/tspc_2/a_740_n680# 0.01fF |
| C17 ro_complete_0/a0 ro_complete_0/cbank_1/v 0.05fF |
| C18 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/tspc_1/Z2 0.01fF |
| C19 pll_full_0/ro_complete_0/cbank_1/switch_0/vin pll_full_0/divider_0/clk 1.61fF |
| C20 pll_full_0/divider_0/prescaler_0/tspc_0/D pll_full_0/divider_0/clk 0.26fF |
| C21 divbuf_6/a_492_n240# divbuf_6/OUT 0.00fF |
| C22 pd_0/tspc_r_1/Z1 pd_0/tspc_r_1/Z2 0.71fF |
| C23 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/Z4 0.20fF |
| C24 pd_0/REF pd_0/tspc_r_1/z5 0.04fF |
| C25 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/switch_4/vin 0.20fF |
| C26 divider_0/prescaler_0/tspc_2/D divider_0/prescaler_0/nand_1/z1 0.21fF |
| C27 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z2 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z4 0.36fF |
| C28 ro_div_new_0/divider_0/nor_0/Z1 ro_div_new_0/divider_0/nor_0/B 0.06fF |
| C29 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/a3 0.13fF |
| C30 pll_full_0/ro_complete_0/a1 pll_full_0/ro_complete_0/cbank_2/v 0.05fF |
| C31 divbuf_3/OUT2 divbuf_3/OUT3 1.37fF |
| C32 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.11fF |
| C33 divbuf_7/OUT4 divbuf_7/OUT 1.11fF |
| C34 ro_div_new_0/ro_complete_0/a4 ro_div_new_0/ro_complete_0/cbank_0/switch_1/vin 0.09fF |
| C35 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/OUT3 0.26fF |
| C36 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/divider_0/clk 1.46fF |
| C37 ro_div_new_0/divider_0/tspc_1/Z3 ro_div_new_0/divider_0/tspc_0/Q 0.45fF |
| C38 ro_div_new_0/divider_0/prescaler_0/tspc_2/a_740_n680# ro_div_new_0/divider_0/prescaler_0/Out 0.21fF |
| C39 ro_div_new_0/divider_0/nor_1/A ro_div_new_0/divider_0/and_0/A 0.01fF |
| C40 ro_complete_0/a4 ro_complete_0/cbank_2/switch_1/vin 0.09fF |
| C41 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/v 1.30fF |
| C42 ro_complete_0/cbank_0/switch_2/vin ro_complete_0/cbank_0/v 1.30fF |
| C43 divbuf_4/OUT2 divbuf_4/OUT3 1.37fF |
| C44 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/clk 0.45fF |
| C45 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/Z1 0.09fF |
| C46 pd_0/DIV pd_0/tspc_r_0/Z2 0.19fF |
| C47 ro_div_new_0/ro_complete_0/cbank_0/switch_1/vin ro_div_new_0/ro_complete_0/a3 0.13fF |
| C48 ro_div_new_0/ro_complete_0/cbank_0/switch_4/vin ro_div_new_0/ro_complete_0/cbank_0/v 1.30fF |
| C49 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/Z4 0.36fF |
| C50 divider_0/nor_1/Z1 divider_0/and_0/A 0.80fF |
| C51 ro_div_new_0/divider_0/mc2 ro_div_new_0/divider_0/and_0/A 0.16fF |
| C52 ro_div_new_0/divider_0/prescaler_0/tspc_1/a_630_n680# ro_div_new_0/divider_0/prescaler_0/tspc_1/Z4 0.12fF |
| C53 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z1 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z2 1.07fF |
| C54 ro_div_new_0/ro_complete_0/cbank_2/switch_5/vin ro_div_new_0/ro_complete_0/cbank_2/v 1.30fF |
| C55 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/a0 0.13fF |
| C56 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/switch_2/vin 0.20fF |
| C57 ro_div_new_0/divider_0/tspc_2/a_630_n680# ro_div_new_0/divider_0/tspc_2/Z4 0.12fF |
| C58 ro_div_new_0/divider_0/tspc_2/Z1 ro_div_new_0/divider_0/tspc_2/Z2 1.07fF |
| C59 ro_div_new_0/divider_0/nor_0/B ro_div_new_0/divider_0/tspc_2/Z3 0.38fF |
| C60 divbuf_2/OUT5 divbuf_2/OUT 43.38fF |
| C61 ro_complete_0/a3 ro_complete_0/cbank_1/v 0.05fF |
| C62 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.65fF |
| C63 divbuf_5/OUT5 divbuf_5/OUT 43.38fF |
| C64 pd_0/R pd_0/tspc_r_1/Qbar 0.03fF |
| C65 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Z2 0.01fF |
| C66 pll_full_0/pd_0/tspc_r_0/z5 pll_full_0/pd_0/tspc_r_0/Z4 0.04fF |
| C67 io_clamp_low[0] io_analog[4] 0.53fF |
| C68 ro_div_new_0/divider_0/prescaler_0/tspc_1/a_630_n680# ro_div_new_0/divider_0/prescaler_0/tspc_1/Q 0.04fF |
| C69 ro_div_new_0/ro_complete_0/cbank_0/v ro_div_new_0/divider_0/clk 1.27fF |
| C70 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/tspc_1/Z4 0.12fF |
| C71 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.00fF |
| C72 pll_full_0/ro_complete_0/cbank_0/v pll_full_0/divider_0/clk 1.27fF |
| C73 divbuf_7/a_492_n240# divbuf_7/IN 0.13fF |
| C74 pd_0/tspc_r_1/Qbar pd_0/and_pd_0/Out1 0.05fF |
| C75 divider_0/tspc_0/Q divider_0/nor_1/A 0.55fF |
| C76 cp_0/out cp_0/a_1710_n2840# 0.61fF |
| C77 ro_div_new_0/divider_0/tspc_0/Z1 ro_div_new_0/divider_0/nor_1/A 0.03fF |
| C78 pll_full_0/pd_0/UP pll_full_0/pd_0/and_pd_0/Z1 0.06fF |
| C79 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z3 0.05fF |
| C80 divider_0/nor_0/B divider_0/tspc_2/Z1 0.03fF |
| C81 pll_full_0/divbuf_0/OUT2 pll_full_0/divbuf_0/OUT5 0.02fF |
| C82 ro_div_new_0/divider_0/tspc_1/Q ro_div_new_0/divider_0/nor_0/B 0.22fF |
| C83 ro_div_new_0/divider_0/and_0/OUT ro_div_new_0/divider_0/prescaler_0/tspc_0/D 0.03fF |
| C84 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z2 ro_div_new_0/divider_0/prescaler_0/tspc_2/D 0.09fF |
| C85 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z1 ro_div_new_0/divider_0/prescaler_0/Out 0.08fF |
| C86 pll_full_0/ro_complete_0/cbank_2/switch_4/vin pll_full_0/ro_complete_0/cbank_2/switch_5/vin 0.20fF |
| C87 divbuf_0/IN divbuf_0/a_492_n240# 0.13fF |
| C88 ro_complete_0/cbank_2/switch_5/vin ro_complete_0/cbank_2/v 1.30fF |
| C89 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.06fF |
| C90 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/and_0/A 0.80fF |
| C91 divider_0/mc2 divider_0/and_0/A 0.16fF |
| C92 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z3 ro_div_new_0/divider_0/prescaler_0/tspc_0/D 0.05fF |
| C93 ro_div_new_0/ro_complete_0/a5 ro_div_new_0/divider_0/clk 0.10fF |
| C94 divider_0/and_0/out1 divider_0/and_0/B 0.18fF |
| C95 divider_0/tspc_0/Z2 divider_0/tspc_0/Z3 0.16fF |
| C96 ro_div_new_0/divider_0/and_0/OUT ro_div_new_0/divider_0/and_0/out1 0.31fF |
| C97 ro_complete_0/a2 ro_complete_0/cbank_2/v 0.05fF |
| C98 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/switch_4/vin 0.20fF |
| C99 divbuf_5/a_492_n240# divbuf_5/OUT2 0.42fF |
| C100 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/tspc_0/Q 0.04fF |
| C101 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/divider_0/clk 0.45fF |
| C102 pll_full_0/pd_0/tspc_r_0/Qbar pll_full_0/pd_0/tspc_r_0/Qbar1 0.01fF |
| C103 pll_full_0/divbuf_0/a_492_n240# pll_full_0/divbuf_0/OUT2 0.42fF |
| C104 divider_0/nor_1/A divider_0/prescaler_0/tspc_1/Q 0.03fF |
| C105 divider_0/tspc_1/Q divider_0/tspc_2/a_630_n680# 0.01fF |
| C106 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/Out 0.11fF |
| C107 filter_0/a_4216_n2998# filter_0/v 0.31fF |
| C108 ro_div_new_0/divider_0/tspc_1/Z2 ro_div_new_0/divider_0/tspc_1/Z3 0.16fF |
| C109 ro_div_new_0/divider_0/prescaler_0/tspc_0/a_630_n680# ro_div_new_0/divider_0/prescaler_0/tspc_0/Q 0.04fF |
| C110 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/switch_4/vin 0.20fF |
| C111 ro_div_new_0/divider_0/nor_0/B ro_div_new_0/divider_0/and_0/B 0.29fF |
| C112 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/tspc_1/Q 0.04fF |
| C113 pll_full_0/divider_0/tspc_0/Q pll_full_0/divider_0/nor_1/A 0.55fF |
| C114 divbuf_6/IN divbuf_6/OUT5 0.00fF |
| C115 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/nor_0/B 0.35fF |
| C116 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Z4 0.20fF |
| C117 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/z5 0.04fF |
| C118 divider_0/tspc_0/Q divider_0/tspc_1/Z2 0.14fF |
| C119 pd_0/R pd_0/and_pd_0/Z1 0.02fF |
| C120 pd_0/tspc_r_1/Qbar1 pd_0/tspc_r_1/z5 0.20fF |
| C121 ro_div_new_0/ro_complete_0/a2 ro_div_new_0/ro_complete_0/cbank_2/v 0.05fF |
| C122 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/a3 0.13fF |
| C123 divider_0/nor_1/A divider_0/tspc_0/Z3 0.38fF |
| C124 ro_complete_0/a5 ro_complete_0/cbank_1/switch_0/vin 0.09fF |
| C125 divbuf_1/IN divbuf_1/OUT5 0.00fF |
| C126 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/and_0/OUT 0.14fF |
| C127 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/and_0/B 0.78fF |
| C128 divbuf_3/OUT2 divbuf_3/OUT5 0.02fF |
| C129 divbuf_3/OUT3 divbuf_3/OUT4 5.16fF |
| C130 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_0/Z2 0.11fF |
| C131 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Z2 0.19fF |
| C132 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/tspc_2/a_740_n680# 0.01fF |
| C133 divider_0/nor_1/B divider_0/nor_1/A 1.21fF |
| C134 divbuf_1/OUT3 divbuf_1/OUT4 5.16fF |
| C135 pd_0/and_pd_0/Out1 pd_0/and_pd_0/Z1 0.18fF |
| C136 ro_div_new_0/divider_0/tspc_0/Z1 ro_div_new_0/divider_0/tspc_0/Z2 1.07fF |
| C137 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/OUT5 43.38fF |
| C138 pll_full_0/pd_0/DOWN pll_full_0/pd_0/and_pd_0/Z1 0.07fF |
| C139 ro_div_new_0/divider_0/prescaler_0/tspc_2/a_630_n680# ro_div_new_0/divider_0/prescaler_0/Out 0.04fF |
| C140 pll_full_0/pd_0/DIV pll_full_0/divider_0/and_0/OUT 0.01fF |
| C141 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/cbank_0/switch_5/vin 0.20fF |
| C142 pll_full_0/divider_0/tspc_0/Z1 pll_full_0/divider_0/tspc_0/Z2 1.07fF |
| C143 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_0/divider_0/clk 0.12fF |
| C144 divbuf_4/OUT2 divbuf_4/OUT5 0.02fF |
| C145 divbuf_4/OUT3 divbuf_4/OUT4 5.16fF |
| C146 pd_0/DIV pd_0/R 0.51fF |
| C147 divider_0/mc2 divider_0/prescaler_0/tspc_0/a_630_n680# 0.33fF |
| C148 pll_full_0/pd_0/UP pll_full_0/pd_0/tspc_r_1/z5 0.03fF |
| C149 divider_0/tspc_0/Z4 divider_0/tspc_0/Z3 0.65fF |
| C150 ro_complete_0/a5 ro_complete_0/cbank_2/v 0.08fF |
| C151 ro_div_new_0/divider_0/tspc_2/Z2 ro_div_new_0/divider_0/tspc_2/Z3 0.16fF |
| C152 ro_div_new_0/divider_0/nor_0/B ro_div_new_0/divider_0/tspc_2/Z4 0.22fF |
| C153 pll_full_0/divider_0/tspc_0/Q pll_full_0/divider_0/tspc_1/Z2 0.14fF |
| C154 pll_full_0/divbuf_0/OUT5 pll_full_0/divbuf_0/IN 0.00fF |
| C155 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/prescaler_0/Out 0.15fF |
| C156 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/clk 0.64fF |
| C157 pd_0/REF pd_0/tspc_r_1/Qbar1 0.12fF |
| C158 io_clamp_low[1] io_clamp_high[1] 0.53fF |
| C159 pll_full_0/divbuf_0/a_492_n240# pll_full_0/pd_0/DIV 0.00fF |
| C160 divider_0/tspc_0/Q divider_0/tspc_1/Z1 0.01fF |
| C161 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/pd_0/tspc_r_1/Qbar 0.01fF |
| C162 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/Out 0.21fF |
| C163 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z3 ro_div_new_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.33fF |
| C164 ro_div_new_0/divider_0/tspc_1/Z3 ro_div_new_0/divider_0/tspc_1/Z4 0.65fF |
| C165 ro_div_new_0/divider_0/prescaler_0/tspc_2/a_630_n680# ro_div_new_0/divider_0/prescaler_0/tspc_2/Z2 0.01fF |
| C166 ro_complete_0/a2 ro_complete_0/cbank_0/switch_2/vin 0.14fF |
| C167 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_1/switch_5/vin 0.09fF |
| C168 pll_full_0/divider_0/tspc_0/Z1 pll_full_0/divider_0/nor_1/A 0.03fF |
| C169 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.65fF |
| C170 divider_0/tspc_0/Q divider_0/tspc_1/Z4 0.15fF |
| C171 divider_0/nor_1/B divider_0/tspc_1/Z2 0.30fF |
| C172 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Z2 0.01fF |
| C173 pll_full_0/pd_0/DOWN pll_full_0/cp_0/a_1710_0# 0.04fF |
| C174 pll_full_0/pd_0/tspc_r_1/Z1 pll_full_0/pd_0/tspc_r_1/Z2 0.71fF |
| C175 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z4 0.12fF |
| C176 divider_0/tspc_2/Z1 divider_0/tspc_2/Z2 1.07fF |
| C177 divider_0/nor_0/B divider_0/tspc_2/Z3 0.38fF |
| C178 cp_0/down cp_0/upbar 0.02fF |
| C179 ro_div_new_0/divider_0/tspc_1/Q ro_div_new_0/divider_0/tspc_2/Z2 0.14fF |
| C180 ro_div_new_0/divider_0/and_0/OUT ro_div_new_0/divider_0/prescaler_0/nand_0/z1 0.01fF |
| C181 pll_full_0/divbuf_0/a_492_n240# pll_full_0/divbuf_0/IN 0.13fF |
| C182 pll_full_0/ro_complete_0/cbank_2/switch_4/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF |
| C183 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/tspc_0/Z3 0.65fF |
| C184 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.00fF |
| C185 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.21fF |
| C186 divbuf_4/a_492_n240# divbuf_4/IN 0.13fF |
| C187 pll_full_0/divider_0/and_0/B pll_full_0/divider_0/and_0/Z1 0.07fF |
| C188 ro_div_new_0/ro_complete_0/cbank_1/switch_1/vin ro_div_new_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF |
| C189 ro_div_new_0/divider_0/and_0/OUT ro_div_new_0/divider_0/clk 0.04fF |
| C190 divbuf_2/OUT5 divbuf_2/a_492_n240# 0.01fF |
| C191 pll_full_0/divider_0/tspc_0/Q pll_full_0/divider_0/tspc_1/Z1 0.01fF |
| C192 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 pll_full_0/divider_0/clk 0.12fF |
| C193 pd_0/DOWN pd_0/UP 0.46fF |
| C194 pd_0/tspc_r_0/Z4 pd_0/tspc_r_0/z5 0.04fF |
| C195 pll_full_0/pd_0/R pll_full_0/pd_0/and_pd_0/Z1 0.02fF |
| C196 divider_0/tspc_1/Q divider_0/nor_0/B 0.22fF |
| C197 divider_0/and_0/OUT divider_0/prescaler_0/tspc_0/D 0.03fF |
| C198 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/D 0.09fF |
| C199 ro_div_new_0/divider_0/nor_1/Z1 ro_div_new_0/divider_0/and_0/B 0.18fF |
| C200 ro_div_new_0/divider_0/tspc_1/Z3 ro_div_new_0/divider_0/tspc_1/Q 0.05fF |
| C201 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z3 ro_div_new_0/divider_0/clk 0.45fF |
| C202 divbuf_2/a_492_n240# divbuf_2/OUT 0.00fF |
| C203 divbuf_0/a_492_n240# divbuf_0/OUT5 0.01fF |
| C204 pll_full_0/divider_0/tspc_0/Q pll_full_0/divider_0/tspc_1/Z4 0.15fF |
| C205 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z2 0.01fF |
| C206 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/clk 0.60fF |
| C207 divbuf_6/OUT2 divbuf_6/OUT 0.06fF |
| C208 divbuf_6/OUT3 divbuf_6/OUT5 0.01fF |
| C209 divider_0/nor_1/B divider_0/tspc_1/Z1 0.03fF |
| C210 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF |
| C211 divider_0/and_0/OUT divider_0/and_0/out1 0.31fF |
| C212 divider_0/nor_1/A divider_0/and_0/A 0.01fF |
| C213 divbuf_1/OUT2 divbuf_1/OUT 0.06fF |
| C214 pll_full_0/ro_complete_0/cbank_0/v pll_full_0/ro_complete_0/cbank_2/v 0.04fF |
| C215 divbuf_3/OUT3 divbuf_3/OUT 0.26fF |
| C216 divbuf_3/OUT4 divbuf_3/OUT5 20.26fF |
| C217 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_0/D 0.16fF |
| C218 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_0/Q 0.05fF |
| C219 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/A 0.01fF |
| C220 divider_0/prescaler_0/m1_2700_2190# divider_0/nor_1/A 0.01fF |
| C221 divider_0/tspc_1/Z2 divider_0/tspc_1/Z3 0.16fF |
| C222 divider_0/nor_1/B divider_0/tspc_1/Z4 0.21fF |
| C223 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/D 0.15fF |
| C224 divider_0/nor_0/B divider_0/and_0/B 0.29fF |
| C225 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/a4 0.12fF |
| C226 cp_0/upbar cp_0/a_1710_n2840# 0.29fF |
| C227 divbuf_0/OUT divbuf_0/OUT4 1.11fF |
| C228 ro_complete_0/a4 ro_complete_0/cbank_1/switch_1/vin 0.09fF |
| C229 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/cbank_0/v 1.30fF |
| C230 divbuf_4/OUT3 divbuf_4/OUT 0.26fF |
| C231 divbuf_4/OUT4 divbuf_4/OUT5 20.26fF |
| C232 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.13fF |
| C233 pd_0/tspc_r_0/Qbar1 pd_0/R 0.01fF |
| C234 pd_0/DIV pd_0/tspc_r_0/Z4 0.02fF |
| C235 pd_0/DOWN pd_0/tspc_r_0/Qbar 0.21fF |
| C236 ro_div_new_0/divider_0/nor_1/B ro_div_new_0/divider_0/tspc_1/a_630_n680# 0.35fF |
| C237 ro_div_new_0/ro_complete_0/a2 ro_div_new_0/divider_0/clk 0.05fF |
| C238 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/switch_4/vin 0.20fF |
| C239 ro_div_new_0/divider_0/tspc_2/Z2 ro_div_new_0/divider_0/tspc_2/Z4 0.36fF |
| C240 ro_div_new_0/divider_0/tspc_2/Z3 ro_div_new_0/divider_0/Out 0.05fF |
| C241 ro_complete_0/a1 ro_complete_0/cbank_1/v 0.05fF |
| C242 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/divider_0/clk 1.32fF |
| C243 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_0/Z2 0.23fF |
| C244 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 pll_full_0/divider_0/clk 0.12fF |
| C245 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Qbar1 0.38fF |
| C246 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/Z3 0.06fF |
| C247 pd_0/tspc_r_1/Z3 pd_0/UP 0.03fF |
| C248 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z2 ro_div_new_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.01fF |
| C249 ro_div_new_0/ro_complete_0/a3 ro_div_new_0/ro_complete_0/cbank_2/switch_2/vin 0.09fF |
| C250 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/a2 0.09fF |
| C251 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/Out 0.04fF |
| C252 ro_complete_0/a2 ro_complete_0/cbank_2/switch_3/vin 0.09fF |
| C253 ro_div_new_0/divider_0/and_0/A ro_div_new_0/divider_0/and_0/B 0.18fF |
| C254 divbuf_7/a_492_n240# divbuf_7/OUT5 0.01fF |
| C255 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Z1 0.17fF |
| C256 divider_0/tspc_1/Z1 divider_0/tspc_1/Z3 0.06fF |
| C257 divider_0/nor_1/B divider_0/tspc_1/Q 0.51fF |
| C258 ro_div_new_0/ro_complete_0/cbank_2/switch_1/vin ro_div_new_0/ro_complete_0/cbank_2/v 1.30fF |
| C259 divider_0/tspc_2/Z2 divider_0/tspc_2/Z3 0.16fF |
| C260 divider_0/nor_0/B divider_0/tspc_2/Z4 0.22fF |
| C261 ro_div_new_0/divider_0/prescaler_0/tspc_0/D ro_div_new_0/divider_0/prescaler_0/nand_0/z1 0.24fF |
| C262 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z2 ro_div_new_0/divider_0/prescaler_0/Out 0.19fF |
| C263 ro_div_new_0/ro_complete_0/cbank_2/v ro_div_new_0/divider_0/clk 1.36fF |
| C264 pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF |
| C265 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/nor_0/B 0.47fF |
| C266 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.65fF |
| C267 pll_full_0/ro_complete_0/cbank_2/v pll_full_0/divider_0/clk 1.36fF |
| C268 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_1/Z2 0.21fF |
| C269 divider_0/tspc_1/Z3 divider_0/tspc_1/Z4 0.65fF |
| C270 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z2 0.01fF |
| C271 divider_0/nor_0/Z1 divider_0/and_0/B 0.78fF |
| C272 ro_div_new_0/ro_complete_0/a5 ro_div_new_0/ro_complete_0/cbank_2/switch_0/vin 0.09fF |
| C273 ro_div_new_0/ro_complete_0/cbank_1/switch_1/vin ro_div_new_0/divider_0/clk 1.30fF |
| C274 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/cbank_0/v 1.30fF |
| C275 ro_div_new_0/divider_0/prescaler_0/tspc_0/D ro_div_new_0/divider_0/clk 0.26fF |
| C276 pll_full_0/ro_complete_0/cbank_0/switch_2/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF |
| C277 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.05fF |
| C278 ro_complete_0/a3 ro_complete_0/cbank_2/switch_2/vin 0.09fF |
| C279 divbuf_5/a_492_n240# divbuf_5/OUT 0.00fF |
| C280 pd_0/R pd_0/REF 0.61fF |
| C281 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/DOWN 0.03fF |
| C282 divider_0/nor_1/B divider_0/and_0/B 0.31fF |
| C283 divider_0/tspc_1/Q divider_0/tspc_2/Z2 0.14fF |
| C284 divider_0/and_0/OUT divider_0/prescaler_0/nand_0/z1 0.01fF |
| C285 ro_div_new_0/ro_complete_0/cbank_1/switch_2/vin ro_div_new_0/divider_0/clk 1.30fF |
| C286 pll_full_0/pd_0/and_pd_0/Out1 pll_full_0/pd_0/and_pd_0/Z1 0.18fF |
| C287 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.33fF |
| C288 pll_full_0/ro_complete_0/cbank_1/switch_2/vin pll_full_0/divider_0/clk 1.46fF |
| C289 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/v 1.30fF |
| C290 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/Z1 0.04fF |
| C291 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divbuf_0/IN 0.04fF |
| C292 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_2/Z2 0.40fF |
| C293 pll_full_0/divider_0/prescaler_0/tspc_0/Q pll_full_0/divider_0/clk 0.05fF |
| C294 divbuf_6/OUT4 divbuf_6/OUT 1.11fF |
| C295 pll_full_0/pd_0/REF pll_full_0/pd_0/DOWN 1.48fF |
| C296 divider_0/tspc_0/Q divider_0/tspc_0/a_630_n680# 0.04fF |
| C297 divider_0/and_0/OUT divider_0/clk 0.04fF |
| C298 ro_div_new_0/divider_0/tspc_0/Z3 ro_div_new_0/divider_0/tspc_0/Z4 0.65fF |
| C299 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/nor_1/A 0.15fF |
| C300 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/nand_0/z1 0.07fF |
| C301 divbuf_3/OUT5 divbuf_3/OUT 43.38fF |
| C302 divider_0/tspc_1/Z3 divider_0/tspc_1/Q 0.05fF |
| C303 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_0/D 0.05fF |
| C304 ro_div_new_0/divider_0/tspc_0/Z3 ro_div_new_0/divider_0/tspc_0/a_630_n680# 0.05fF |
| C305 ro_div_new_0/divider_0/tspc_1/a_630_n680# ro_div_new_0/divider_0/tspc_0/Q 0.01fF |
| C306 pll_full_0/ro_complete_0/cbank_2/switch_5/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF |
| C307 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.21fF |
| C308 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.03fF |
| C309 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/clk 0.01fF |
| C310 divbuf_4/OUT5 divbuf_4/OUT 43.38fF |
| C311 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/z5 0.11fF |
| C312 pll_full_0/pd_0/UP pll_full_0/pd_0/DOWN 4.58fF |
| C313 divider_0/nor_1/B divider_0/tspc_2/Z4 0.02fF |
| C314 ro_complete_0/cbank_2/switch_0/vin ro_complete_0/a4 0.12fF |
| C315 pll_full_0/pd_0/DIV pll_full_0/divider_0/clk 2.26fF |
| C316 divbuf_0/OUT divbuf_0/OUT5 43.38fF |
| C317 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/v 1.30fF |
| C318 pll_full_0/divider_0/tspc_0/Q pll_full_0/divider_0/tspc_0/a_630_n680# 0.04fF |
| C319 divbuf_6/a_492_n240# divbuf_6/IN 0.13fF |
| C320 io_clamp_low[0] io_clamp_high[0] 0.53fF |
| C321 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/Z1 0.09fF |
| C322 pd_0/REF pd_0/tspc_r_1/Z2 0.19fF |
| C323 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/Z4 0.00fF |
| C324 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/ro_complete_0/a4 0.09fF |
| C325 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_1/switch_0/vin 0.09fF |
| C326 divider_0/tspc_0/a_630_n680# divider_0/tspc_0/Z3 0.05fF |
| C327 ro_div_new_0/ro_complete_0/cbank_0/switch_5/vin ro_div_new_0/ro_complete_0/a0 0.09fF |
| C328 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z1 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z3 0.06fF |
| C329 ro_div_new_0/divider_0/prescaler_0/tspc_0/a_740_n680# ro_div_new_0/divider_0/clk 0.01fF |
| C330 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/a4 0.09fF |
| C331 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF |
| C332 divbuf_3/a_492_n240# divbuf_3/OUT2 0.42fF |
| C333 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/and_0/OUT 0.05fF |
| C334 divbuf_7/OUT2 divbuf_7/OUT3 1.37fF |
| C335 ro_div_new_0/ro_complete_0/a5 ro_div_new_0/ro_complete_0/cbank_1/switch_0/vin 0.09fF |
| C336 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_0/Z3 0.27fF |
| C337 divider_0/nor_1/B divider_0/tspc_0/a_630_n680# 0.01fF |
| C338 divider_0/prescaler_0/tspc_1/Z1 divider_0/prescaler_0/tspc_1/Z3 0.06fF |
| C339 divider_0/tspc_2/Z2 divider_0/tspc_2/Z4 0.36fF |
| C340 divider_0/tspc_2/Z3 divider_0/Out 0.05fF |
| C341 ro_div_new_0/divider_0/prescaler_0/tspc_0/a_630_n680# ro_div_new_0/divider_0/prescaler_0/tspc_0/Z4 0.12fF |
| C342 ro_div_new_0/divider_0/nor_1/A ro_div_new_0/divider_0/prescaler_0/Out 0.15fF |
| C343 ro_div_new_0/divider_0/and_0/OUT ro_div_new_0/divider_0/prescaler_0/tspc_0/Q 0.04fF |
| C344 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z3 ro_div_new_0/divider_0/clk 0.45fF |
| C345 divbuf_2/OUT2 divbuf_2/OUT3 1.37fF |
| C346 divbuf_4/a_492_n240# divbuf_4/OUT5 0.01fF |
| C347 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_1/Z4 0.02fF |
| C348 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_2/Z2 0.20fF |
| C349 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/clk 0.01fF |
| C350 pd_0/DIV pd_0/tspc_r_0/Z3 0.65fF |
| C351 pll_full_0/pd_0/REF pll_full_0/pd_0/R 0.61fF |
| C352 ro_div_new_0/ro_complete_0/cbank_0/switch_1/vin ro_div_new_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF |
| C353 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/Z3 0.65fF |
| C354 divider_0/and_0/A divider_0/and_0/B 0.18fF |
| C355 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z3 ro_div_new_0/divider_0/prescaler_0/tspc_0/Q 0.05fF |
| C356 ro_div_new_0/divider_0/nor_1/B ro_div_new_0/divider_0/nor_1/A 1.21fF |
| C357 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/cbank_0/switch_5/vin 0.20fF |
| C358 ro_div_new_0/divider_0/tspc_2/a_630_n680# ro_div_new_0/divider_0/nor_0/B 0.35fF |
| C359 divbuf_2/OUT5 divbuf_2/IN 0.00fF |
| C360 ro_complete_0/a4 ro_complete_0/cbank_1/v 0.05fF |
| C361 ro_complete_0/cbank_0/switch_5/vin ro_complete_0/a0 0.09fF |
| C362 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.12fF |
| C363 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 1.07fF |
| C364 divbuf_5/IN divbuf_5/OUT5 0.00fF |
| C365 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/Out 0.01fF |
| C366 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/tspc_0/Q 0.19fF |
| C367 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/clk 0.14fF |
| C368 pd_0/DOWN pd_0/tspc_r_1/Qbar 0.02fF |
| C369 pd_0/R pd_0/tspc_r_1/Qbar1 0.30fF |
| C370 ro_div_new_0/divider_0/mc2 ro_div_new_0/divider_0/nor_1/B 0.06fF |
| C371 divider_0/prescaler_0/tspc_0/D divider_0/prescaler_0/nand_0/z1 0.24fF |
| C372 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/Out 0.19fF |
| C373 io_clamp_high[2] io_analog[6] 0.53fF |
| C374 ro_div_new_0/divider_0/tspc_1/Z2 ro_div_new_0/divider_0/tspc_1/a_630_n680# 0.01fF |
| C375 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z2 1.07fF |
| C376 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_1/Z3 0.38fF |
| C377 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.05fF |
| C378 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.08fF |
| C379 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z3 0.06fF |
| C380 pll_full_0/divider_0/nor_0/B pll_full_0/divbuf_0/IN 0.29fF |
| C381 pll_full_0/divider_0/prescaler_0/tspc_2/D pll_full_0/divider_0/clk 0.29fF |
| C382 pll_full_0/pd_0/R pll_full_0/pd_0/UP 0.46fF |
| C383 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Z2 0.01fF |
| C384 ro_div_new_0/ro_complete_0/a0 ro_div_new_0/ro_complete_0/cbank_2/switch_4/vin 0.13fF |
| C385 pll_full_0/pd_0/REF pll_full_0/divbuf_1/OUT5 0.00fF |
| C386 divider_0/prescaler_0/tspc_0/D divider_0/clk 0.26fF |
| C387 ro_div_new_0/divider_0/nor_1/B ro_div_new_0/divider_0/tspc_0/Q 0.22fF |
| C388 ro_div_new_0/divider_0/prescaler_0/m1_2700_2190# ro_div_new_0/divider_0/prescaler_0/Out 0.11fF |
| C389 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/cbank_0/v 1.30fF |
| C390 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/tspc_1/Z4 0.36fF |
| C391 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/and_0/OUT 0.06fF |
| C392 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.33fF |
| C393 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.38fF |
| C394 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/Z1 0.36fF |
| C395 divider_0/prescaler_0/tspc_0/Z4 divider_0/prescaler_0/tspc_0/D 0.11fF |
| C396 divbuf_1/OUT3 divbuf_1/OUT2 1.37fF |
| C397 pll_full_0/pd_0/DIV pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.03fF |
| C398 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF |
| C399 divbuf_0/OUT3 divbuf_0/OUT4 5.16fF |
| C400 ro_div_new_0/divider_0/tspc_0/Z2 ro_div_new_0/divider_0/prescaler_0/Out 0.11fF |
| C401 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z3 ro_div_new_0/divider_0/clk 0.64fF |
| C402 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_2/Z1 0.01fF |
| C403 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.05fF |
| C404 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/clk 0.01fF |
| C405 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/and_0/A 0.26fF |
| C406 pd_0/tspc_r_0/Z2 pd_0/R 0.21fF |
| C407 pd_0/DOWN pd_0/tspc_r_0/z5 0.03fF |
| C408 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z1 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z2 1.07fF |
| C409 ro_div_new_0/ro_complete_0/cbank_0/switch_3/vin ro_div_new_0/ro_complete_0/a1 0.14fF |
| C410 ro_div_new_0/ro_complete_0/cbank_0/switch_1/vin ro_div_new_0/ro_complete_0/cbank_0/v 1.30fF |
| C411 ro_div_new_0/ro_complete_0/cbank_0/switch_2/vin ro_div_new_0/ro_complete_0/a3 0.09fF |
| C412 divider_0/prescaler_0/tspc_0/Z3 divider_0/clk 0.45fF |
| C413 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z3 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z4 0.65fF |
| C414 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_2/switch_1/vin 0.09fF |
| C415 pll_full_0/ro_complete_0/a4 pll_full_0/divider_0/clk 0.11fF |
| C416 ro_complete_0/a0 ro_complete_0/cbank_2/switch_4/vin 0.13fF |
| C417 ro_complete_0/cbank_0/v ro_complete_0/cbank_1/v 1.27fF |
| C418 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/and_0/B 0.08fF |
| C419 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_0/Z4 0.65fF |
| C420 pd_0/DOWN pd_0/and_pd_0/Z1 0.07fF |
| C421 ro_div_new_0/divider_0/mc2 ro_div_new_0/divider_0/nor_1/A 0.04fF |
| C422 ro_div_new_0/divider_0/tspc_0/Z1 ro_div_new_0/divider_0/tspc_0/Z3 0.06fF |
| C423 divbuf_1/OUT3 divbuf_1/OUT 0.26fF |
| C424 divbuf_1/OUT4 divbuf_1/OUT5 20.26fF |
| C425 ro_div_new_0/divider_0/tspc_1/a_630_n680# ro_div_new_0/divider_0/tspc_1/Z4 0.12fF |
| C426 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z1 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z4 0.00fF |
| C427 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z3 ro_div_new_0/divider_0/prescaler_0/tspc_1/Q 0.21fF |
| C428 ro_div_new_0/divider_0/and_0/B ro_div_new_0/divider_0/and_0/Z1 0.07fF |
| C429 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z4 0.00fF |
| C430 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# 0.01fF |
| C431 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.09fF |
| C432 divbuf_7/OUT2 divbuf_7/OUT5 0.02fF |
| C433 divbuf_7/OUT3 divbuf_7/OUT4 5.16fF |
| C434 pll_full_0/pd_0/R pll_full_0/pd_0/DOWN 0.36fF |
| C435 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Z4 0.12fF |
| C436 divider_0/prescaler_0/tspc_1/Z1 divider_0/prescaler_0/tspc_1/Z4 0.00fF |
| C437 ro_complete_0/a5 ro_complete_0/cbank_0/switch_0/vin 0.09fF |
| C438 ro_div_new_0/ro_complete_0/cbank_2/switch_0/vin ro_div_new_0/ro_complete_0/cbank_2/v 1.44fF |
| C439 divbuf_1/a_492_n240# divbuf_1/IN 0.13fF |
| C440 ro_div_new_0/divider_0/nor_1/A ro_div_new_0/divider_0/tspc_0/Q 0.55fF |
| C441 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z4 ro_div_new_0/divider_0/clk 0.12fF |
| C442 pll_full_0/ro_complete_0/a5 pll_full_0/divider_0/clk 0.15fF |
| C443 divbuf_2/OUT2 divbuf_2/OUT5 0.02fF |
| C444 divbuf_2/OUT3 divbuf_2/OUT4 5.16fF |
| C445 divbuf_0/OUT divbuf_0/a_492_n240# 0.00fF |
| C446 ro_complete_0/cbank_1/switch_0/vin ro_complete_0/cbank_1/switch_1/vin 0.19fF |
| C447 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.15fF |
| C448 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/and_0/OUT 0.06fF |
| C449 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/Qbar1 0.38fF |
| C450 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z3 0.06fF |
| C451 ro_div_new_0/divider_0/prescaler_0/m1_2700_2190# ro_div_new_0/divider_0/nor_1/A 0.01fF |
| C452 ro_div_new_0/divider_0/nor_1/B ro_div_new_0/divider_0/tspc_1/Z2 0.30fF |
| C453 ro_div_new_0/divider_0/prescaler_0/tspc_1/a_630_n680# ro_div_new_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF |
| C454 ro_div_new_0/divider_0/tspc_2/a_630_n680# ro_div_new_0/divider_0/tspc_2/Z2 0.01fF |
| C455 ro_div_new_0/divider_0/prescaler_0/tspc_1/Q ro_div_new_0/divider_0/clk 0.60fF |
| C456 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.14fF |
| C457 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF |
| C458 divbuf_2/OUT2 divbuf_2/OUT 0.06fF |
| C459 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.16fF |
| C460 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/tspc_0/Z2 0.01fF |
| C461 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/tspc_2/D 0.32fF |
| C462 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/clk 0.01fF |
| C463 divbuf_5/OUT2 divbuf_5/OUT 0.06fF |
| C464 divbuf_5/OUT3 divbuf_5/OUT5 0.01fF |
| C465 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Z1 0.09fF |
| C466 divider_0/and_0/OUT divider_0/prescaler_0/tspc_0/Q 0.04fF |
| C467 divider_0/prescaler_0/tspc_1/Z3 divider_0/clk 0.45fF |
| C468 ro_div_new_0/ro_complete_0/cbank_2/switch_3/vin ro_div_new_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF |
| C469 io_clamp_low[1] io_analog[5] 0.53fF |
| C470 ro_div_new_0/divider_0/tspc_1/Q ro_div_new_0/divider_0/tspc_1/a_630_n680# 0.04fF |
| C471 ro_div_new_0/divider_0/nor_1/A ro_div_new_0/divider_0/tspc_0/Z2 0.23fF |
| C472 ro_div_new_0/ro_complete_0/cbank_1/switch_4/vin ro_div_new_0/divider_0/clk 1.30fF |
| C473 divbuf_1/a_492_n240# divbuf_1/OUT5 0.01fF |
| C474 ro_div_new_0/divider_0/and_0/out1 ro_div_new_0/divider_0/and_0/A 0.01fF |
| C475 pll_full_0/divbuf_1/OUT3 pll_full_0/divbuf_1/OUT5 0.01fF |
| C476 pll_full_0/divbuf_0/OUT3 pll_full_0/divbuf_0/OUT4 5.16fF |
| C477 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.12fF |
| C478 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 1.07fF |
| C479 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/nor_0/B 0.06fF |
| C480 pll_full_0/ro_complete_0/cbank_1/switch_4/vin pll_full_0/divider_0/clk 1.46fF |
| C481 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z4 0.00fF |
| C482 ro_div_new_0/ro_complete_0/cbank_0/switch_0/vin ro_div_new_0/ro_complete_0/cbank_0/switch_1/vin 0.19fF |
| C483 pd_0/tspc_r_1/Z4 pd_0/tspc_r_1/z5 0.04fF |
| C484 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Q 0.04fF |
| C485 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/OUT2 0.06fF |
| C486 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/a1 0.14fF |
| C487 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF |
| C488 pll_full_0/pd_0/UP pll_full_0/pd_0/and_pd_0/Out1 0.33fF |
| C489 divider_0/tspc_2/a_630_n680# divider_0/nor_0/B 0.35fF |
| C490 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z3 ro_div_new_0/divider_0/prescaler_0/tspc_1/Q 0.13fF |
| C491 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/nor_0/B 0.00fF |
| C492 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/nor_1/A 0.35fF |
| C493 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.05fF |
| C494 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.08fF |
| C495 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.04fF |
| C496 ro_div_new_0/divider_0/nor_0/Z1 ro_div_new_0/divider_0/nor_1/B 0.18fF |
| C497 divider_0/prescaler_0/m1_2700_2190# divider_0/and_0/OUT 0.14fF |
| C498 divider_0/prescaler_0/Out divider_0/tspc_0/Z2 0.11fF |
| C499 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z2 ro_div_new_0/divider_0/and_0/OUT 0.05fF |
| C500 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z4 ro_div_new_0/divider_0/clk 0.12fF |
| C501 pll_full_0/divbuf_1/OUT pll_full_0/divbuf_1/OUT3 0.26fF |
| C502 ro_complete_0/cbank_1/switch_2/vin ro_complete_0/cbank_1/switch_1/vin 0.20fF |
| C503 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_2/Z3 0.45fF |
| C504 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.11fF |
| C505 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/Out 0.08fF |
| C506 pd_0/tspc_r_0/Z2 pd_0/tspc_r_0/Z4 0.14fF |
| C507 ro_div_new_0/divider_0/mc2 ro_div_new_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.33fF |
| C508 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z2 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z3 0.16fF |
| C509 ro_div_new_0/ro_complete_0/cbank_2/switch_3/vin ro_div_new_0/ro_complete_0/a1 0.14fF |
| C510 pll_full_0/pd_0/tspc_r_1/Z4 pll_full_0/pd_0/tspc_r_1/z5 0.04fF |
| C511 divider_0/tspc_0/Z1 divider_0/tspc_0/Z2 1.07fF |
| C512 divider_0/prescaler_0/tspc_0/Z4 divider_0/clk 0.12fF |
| C513 ro_div_new_0/divider_0/nor_1/A ro_div_new_0/divider_0/tspc_1/Z2 0.15fF |
| C514 ro_div_new_0/divider_0/nor_1/B ro_div_new_0/divider_0/tspc_1/Z4 0.21fF |
| C515 ro_div_new_0/divider_0/prescaler_0/tspc_0/a_740_n680# ro_div_new_0/divider_0/prescaler_0/tspc_0/Q 0.20fF |
| C516 divbuf_0/OUT3 divbuf_0/OUT5 0.01fF |
| C517 pll_full_0/divbuf_1/OUT2 pll_full_0/divbuf_1/OUT3 1.37fF |
| C518 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.09fF |
| C519 divbuf_2/a_492_n240# divbuf_2/IN 0.13fF |
| C520 divbuf_6/a_492_n240# divbuf_6/OUT5 0.01fF |
| C521 ro_div_new_0/ro_complete_0/cbank_0/switch_0/vin ro_div_new_0/ro_complete_0/a4 0.12fF |
| C522 pd_0/R pd_0/and_pd_0/Out1 0.33fF |
| C523 pd_0/REF pd_0/tspc_r_1/Z4 0.02fF |
| C524 pd_0/UP pd_0/tspc_r_1/Qbar 0.21fF |
| C525 pll_full_0/pd_0/R pll_full_0/pd_0/DIV 0.51fF |
| C526 divider_0/mc2 divider_0/nor_1/A 0.04fF |
| C527 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z1 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z4 0.00fF |
| C528 pll_full_0/pd_0/tspc_r_1/Z4 pll_full_0/pd_0/tspc_r_1/Z2 0.14fF |
| C529 divider_0/nor_1/A divider_0/prescaler_0/Out 0.15fF |
| C530 divider_0/prescaler_0/tspc_2/Z3 divider_0/clk 0.64fF |
| C531 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z3 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z4 0.65fF |
| C532 divbuf_3/a_492_n240# divbuf_3/OUT 0.00fF |
| C533 divbuf_0/OUT2 divbuf_0/OUT5 0.02fF |
| C534 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Q 0.04fF |
| C535 divbuf_7/OUT3 divbuf_7/OUT 0.26fF |
| C536 divbuf_7/OUT4 divbuf_7/OUT5 20.26fF |
| C537 ro_div_new_0/ro_complete_0/cbank_1/switch_1/vin ro_div_new_0/ro_complete_0/cbank_1/switch_0/vin 0.19fF |
| C538 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/tspc_r_0/Z3 0.38fF |
| C539 divider_0/tspc_0/Z1 divider_0/nor_1/A 0.03fF |
| C540 divider_0/prescaler_0/tspc_1/Z3 divider_0/prescaler_0/tspc_1/Z4 0.65fF |
| C541 ro_div_new_0/ro_complete_0/a0 ro_div_new_0/ro_complete_0/cbank_2/switch_5/vin 0.09fF |
| C542 pll_full_0/pd_0/DOWN pll_full_0/pd_0/and_pd_0/Out1 0.12fF |
| C543 ro_div_new_0/divider_0/tspc_1/Z2 ro_div_new_0/divider_0/tspc_0/Q 0.14fF |
| C544 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/nor_1/B 0.18fF |
| C545 divbuf_2/OUT4 divbuf_2/OUT5 20.26fF |
| C546 ro_complete_0/a2 ro_complete_0/cbank_1/v 0.05fF |
| C547 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/clk 0.11fF |
| C548 pd_0/DIV pd_0/tspc_r_0/Z1 0.17fF |
| C549 pd_0/tspc_r_0/Qbar1 pd_0/DOWN 0.11fF |
| C550 ro_div_new_0/ro_complete_0/cbank_0/switch_3/vin ro_div_new_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF |
| C551 divider_0/tspc_0/Z4 divider_0/prescaler_0/Out 0.12fF |
| C552 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z4 0.00fF |
| C553 divider_0/prescaler_0/tspc_1/Z3 divider_0/prescaler_0/tspc_1/Q 0.21fF |
| C554 ro_complete_0/a5 ro_complete_0/cbank_2/switch_0/vin 0.09fF |
| C555 ro_div_new_0/divider_0/tspc_1/Z1 ro_div_new_0/divider_0/tspc_1/Z3 0.06fF |
| C556 ro_div_new_0/divider_0/nor_1/B ro_div_new_0/divider_0/tspc_1/Q 0.51fF |
| C557 pll_full_0/pd_0/tspc_r_1/Qbar pll_full_0/pd_0/and_pd_0/Z1 0.02fF |
| C558 divider_0/and_0/B divider_0/and_0/Z1 0.07fF |
| C559 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/IN 5.26fF |
| C560 ro_div_new_0/divider_0/and_0/OUT ro_div_new_0/divider_0/and_0/Z1 0.04fF |
| C561 ro_div_new_0/divider_0/tspc_2/a_630_n680# ro_div_new_0/divider_0/Out 0.04fF |
| C562 ro_div_new_0/divider_0/nor_0/B ro_div_new_0/divider_0/tspc_2/Z2 0.40fF |
| C563 ro_div_new_0/divider_0/prescaler_0/tspc_0/Q ro_div_new_0/divider_0/clk 0.05fF |
| C564 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/nor_1/B 0.35fF |
| C565 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.36fF |
| C566 divbuf_2/OUT4 divbuf_2/OUT 1.11fF |
| C567 divbuf_5/OUT4 divbuf_5/OUT 1.11fF |
| C568 pll_full_0/divider_0/prescaler_0/tspc_0/Q pll_full_0/divider_0/prescaler_0/tspc_2/D 0.04fF |
| C569 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/nand_1/z1 0.22fF |
| C570 divider_0/tspc_0/Z4 divider_0/tspc_0/Z1 0.00fF |
| C571 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_0/Z3 0.33fF |
| C572 pd_0/R pd_0/tspc_r_1/Z2 0.21fF |
| C573 ro_div_new_0/ro_complete_0/cbank_2/switch_1/vin ro_div_new_0/ro_complete_0/cbank_2/switch_0/vin 0.19fF |
| C574 divider_0/prescaler_0/tspc_1/Z4 divider_0/clk 0.12fF |
| C575 ro_div_new_0/divider_0/nor_1/A ro_div_new_0/divider_0/tspc_1/Z4 0.02fF |
| C576 pll_full_0/divbuf_0/OUT5 pll_full_0/divbuf_0/OUT4 20.26fF |
| C577 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_2/v 0.05fF |
| C578 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.16fF |
| C579 ro_complete_0/a0 ro_complete_0/cbank_2/switch_5/vin 0.09fF |
| C580 pll_full_0/divider_0/tspc_2/Z3 pll_full_0/divider_0/tspc_2/Z4 0.65fF |
| C581 pd_0/UP pd_0/and_pd_0/Z1 0.06fF |
| C582 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z2 0.01fF |
| C583 divider_0/prescaler_0/tspc_1/Q divider_0/clk 0.60fF |
| C584 ro_div_new_0/divider_0/nor_1/B ro_div_new_0/divider_0/and_0/B 0.31fF |
| C585 ro_div_new_0/divider_0/tspc_0/a_630_n680# ro_div_new_0/divider_0/tspc_0/Z4 0.12fF |
| C586 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z4 ro_div_new_0/divider_0/prescaler_0/tspc_1/Q 0.21fF |
| C587 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z1 ro_div_new_0/divider_0/prescaler_0/tspc_2/D 0.03fF |
| C588 ro_complete_0/cbank_2/switch_0/vin ro_complete_0/cbank_2/v 1.44fF |
| C589 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/prescaler_0/Out 0.12fF |
| C590 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.12fF |
| C591 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 1.07fF |
| C592 pll_full_0/pd_0/tspc_r_0/z5 pll_full_0/pd_0/tspc_r_1/z5 0.02fF |
| C593 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_0/D 0.16fF |
| C594 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_0/Q 0.05fF |
| C595 ro_div_new_0/divider_0/prescaler_0/m1_2700_2190# ro_div_new_0/divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF |
| C596 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z2 ro_div_new_0/divider_0/prescaler_0/tspc_0/D 0.09fF |
| C597 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_2/v 0.08fF |
| C598 divider_0/and_0/out1 divider_0/and_0/A 0.01fF |
| C599 ro_complete_0/a5 ro_complete_0/cbank_1/v 0.10fF |
| C600 ro_div_new_0/divider_0/tspc_1/Z4 ro_div_new_0/divider_0/tspc_0/Q 0.15fF |
| C601 pll_full_0/divbuf_1/OUT pll_full_0/divbuf_1/OUT5 43.38fF |
| C602 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/ro_complete_0/cbank_1/switch_4/vin 0.20fF |
| C603 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF |
| C604 pll_full_0/filter_0/a_4216_n5230# pll_full_0/divider_0/clk 1.58fF |
| C605 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/tspc_0/Z1 0.00fF |
| C606 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.33fF |
| C607 divbuf_2/OUT2 divbuf_2/a_492_n240# 0.42fF |
| C608 ro_complete_0/cbank_1/switch_0/vin ro_complete_0/cbank_1/v 1.45fF |
| C609 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_2/Z4 0.15fF |
| C610 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/divider_0/prescaler_0/Out 0.11fF |
| C611 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/clk 0.11fF |
| C612 divbuf_5/a_492_n240# divbuf_5/IN 0.13fF |
| C613 pll_full_0/pd_0/R pll_full_0/pd_0/and_pd_0/Out1 0.33fF |
| C614 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_1/Q 0.13fF |
| C615 ro_div_new_0/ro_complete_0/cbank_0/switch_3/vin ro_div_new_0/ro_complete_0/cbank_0/v 1.30fF |
| C616 ro_complete_0/a2 ro_complete_0/cbank_1/switch_3/vin 0.09fF |
| C617 pll_full_0/divbuf_1/OUT2 pll_full_0/divbuf_1/OUT5 0.02fF |
| C618 pll_full_0/ro_complete_0/cbank_0/switch_5/vin pll_full_0/ro_complete_0/a0 0.09fF |
| C619 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/tspc_1/Z3 0.05fF |
| C620 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF |
| C621 divbuf_6/OUT2 divbuf_6/OUT3 1.37fF |
| C622 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Z4 0.02fF |
| C623 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/z5 0.11fF |
| C624 divider_0/nor_1/A divider_0/tspc_0/Z2 0.23fF |
| C625 divider_0/prescaler_0/tspc_2/Z4 divider_0/clk 0.12fF |
| C626 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z3 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z4 0.65fF |
| C627 ro_div_new_0/divider_0/nor_1/B ro_div_new_0/divider_0/tspc_2/Z4 0.02fF |
| C628 ro_div_new_0/ro_complete_0/cbank_1/switch_5/vin ro_div_new_0/divider_0/clk 1.30fF |
| C629 pll_full_0/ro_complete_0/cbank_1/switch_5/vin pll_full_0/divider_0/clk 1.46fF |
| C630 divbuf_3/IN divbuf_3/OUT5 0.00fF |
| C631 ro_complete_0/cbank_1/v ro_complete_0/cbank_2/v 1.36fF |
| C632 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/clk 0.51fF |
| C633 divbuf_7/OUT5 divbuf_7/OUT 43.38fF |
| C634 pll_full_0/pd_0/tspc_r_0/Z2 pll_full_0/pd_0/tspc_r_0/Z3 0.25fF |
| C635 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/DOWN 0.11fF |
| C636 divider_0/nor_0/Z1 divider_0/nor_0/B 0.06fF |
| C637 pll_full_0/ro_complete_0/cbank_2/switch_0/vin pll_full_0/ro_complete_0/cbank_2/switch_1/vin 0.19fF |
| C638 ro_div_new_0/ro_complete_0/a0 ro_div_new_0/ro_complete_0/cbank_2/v 0.05fF |
| C639 ro_div_new_0/divider_0/nor_1/A ro_div_new_0/divider_0/and_0/B 0.08fF |
| C640 ro_div_new_0/divider_0/prescaler_0/tspc_1/Q ro_div_new_0/divider_0/prescaler_0/tspc_0/Q 0.19fF |
| C641 ro_div_new_0/divider_0/prescaler_0/tspc_2/a_740_n680# ro_div_new_0/divider_0/clk 0.14fF |
| C642 pll_full_0/divbuf_1/OUT pll_full_0/divbuf_1/OUT2 0.06fF |
| C643 divbuf_4/IN divbuf_4/OUT5 0.00fF |
| C644 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/Z2 0.25fF |
| C645 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/pd_0/tspc_r_1/z5 0.20fF |
| C646 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/Z1 0.17fF |
| C647 divider_0/nor_1/Z1 divider_0/and_0/B 0.18fF |
| C648 divider_0/nor_1/B divider_0/nor_0/B 0.47fF |
| C649 divider_0/tspc_0/Z4 divider_0/tspc_0/Z2 0.36fF |
| C650 divider_0/tspc_0/Q divider_0/tspc_0/Z3 0.05fF |
| C651 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_2/Z4 0.65fF |
| C652 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/clk 0.01fF |
| C653 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z1 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z3 0.06fF |
| C654 ro_div_new_0/divider_0/mc2 ro_div_new_0/divider_0/and_0/B 0.20fF |
| C655 ro_div_new_0/ro_complete_0/cbank_1/switch_0/vin ro_div_new_0/divider_0/clk 1.45fF |
| C656 ro_div_new_0/divider_0/tspc_2/Z1 ro_div_new_0/divider_0/tspc_2/Z3 0.06fF |
| C657 ro_div_new_0/divider_0/nor_0/B ro_div_new_0/divider_0/Out 0.22fF |
| C658 ro_div_new_0/divider_0/prescaler_0/tspc_2/D ro_div_new_0/divider_0/clk 0.29fF |
| C659 divbuf_0/a_492_n240# divbuf_0/OUT2 0.42fF |
| C660 ro_complete_0/cbank_1/switch_2/vin ro_complete_0/cbank_1/v 1.30fF |
| C661 pll_full_0/divider_0/prescaler_0/tspc_0/Q pll_full_0/divider_0/prescaler_0/nand_1/z1 0.01fF |
| C662 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/Out 0.05fF |
| C663 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/clk 0.11fF |
| C664 cp_0/out cp_0/a_1710_0# 0.84fF |
| C665 pd_0/REF pd_0/tspc_r_1/Z3 0.65fF |
| C666 divider_0/tspc_0/Q divider_0/nor_1/B 0.22fF |
| C667 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Z3 0.05fF |
| C668 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_0/Z4 0.08fF |
| C669 ro_div_new_0/ro_complete_0/a4 ro_div_new_0/ro_complete_0/cbank_2/v 0.05fF |
| C670 ro_div_new_0/ro_complete_0/cbank_2/switch_3/vin ro_div_new_0/ro_complete_0/cbank_2/switch_4/vin 0.20fF |
| C671 io_clamp_high[0] io_analog[4] 0.53fF |
| C672 ro_div_new_0/divider_0/tspc_1/Z2 ro_div_new_0/divider_0/tspc_1/Z4 0.36fF |
| C673 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z2 ro_div_new_0/divider_0/and_0/OUT 0.06fF |
| C674 ro_div_new_0/divider_0/prescaler_0/tspc_2/a_740_n680# ro_div_new_0/divider_0/prescaler_0/tspc_2/Z3 0.33fF |
| C675 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/cbank_0/switch_2/vin 0.20fF |
| C676 ro_div_new_0/divider_0/and_0/out1 ro_div_new_0/divider_0/and_0/Z1 0.36fF |
| C677 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/switch_4/vin 0.13fF |
| C678 ro_complete_0/a0 ro_complete_0/cbank_2/v 0.05fF |
| C679 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.36fF |
| C680 divbuf_7/a_492_n240# divbuf_7/OUT2 0.42fF |
| C681 ro_div_new_0/ro_complete_0/a4 ro_div_new_0/ro_complete_0/cbank_1/switch_1/vin 0.09fF |
| C682 divider_0/tspc_0/Z4 divider_0/nor_1/A 0.21fF |
| C683 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/Z3 0.33fF |
| C684 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF |
| C685 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Z4 0.20fF |
| C686 divider_0/and_0/OUT divider_0/and_0/Z1 0.04fF |
| C687 divider_0/tspc_2/a_630_n680# divider_0/Out 0.04fF |
| C688 divider_0/nor_0/B divider_0/tspc_2/Z2 0.40fF |
| C689 divider_0/prescaler_0/tspc_0/Q divider_0/clk 0.05fF |
| C690 ro_div_new_0/ro_complete_0/a3 ro_div_new_0/ro_complete_0/cbank_2/v 0.05fF |
| C691 ro_div_new_0/divider_0/tspc_1/Q ro_div_new_0/divider_0/tspc_2/Z1 0.01fF |
| C692 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z3 ro_div_new_0/divider_0/prescaler_0/tspc_2/D 0.05fF |
| C693 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/and_0/B 0.18fF |
| C694 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/tspc_0/Z2 0.36fF |
| C695 pll_full_0/divider_0/tspc_0/Q pll_full_0/divider_0/tspc_0/Z3 0.05fF |
| C696 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.06fF |
| C697 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.16fF |
| C698 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/clk 0.01fF |
| C699 ro_div_new_0/ro_complete_0/a2 ro_div_new_0/ro_complete_0/cbank_1/switch_3/vin 0.09fF |
| C700 pll_full_0/pd_0/tspc_r_0/z5 pll_full_0/pd_0/tspc_r_0/Z3 0.11fF |
| C701 divider_0/tspc_1/Z2 divider_0/nor_1/A 0.15fF |
| C702 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/nand_0/z1 0.07fF |
| C703 divider_0/mc2 divider_0/and_0/B 0.20fF |
| C704 pll_full_0/divider_0/tspc_0/Q pll_full_0/divider_0/nor_1/B 0.22fF |
| C705 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.08fF |
| C706 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 pll_full_0/divider_0/prescaler_0/Out 0.28fF |
| C707 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_0/Qbar1 0.01fF |
| C708 divider_0/nor_0/Z1 divider_0/nor_1/B 0.18fF |
| C709 ro_div_new_0/ro_complete_0/a3 ro_div_new_0/ro_complete_0/cbank_1/switch_2/vin 0.09fF |
| C710 divider_0/prescaler_0/tspc_2/Z4 divider_0/prescaler_0/tspc_1/Q 0.21fF |
| C711 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/D 0.03fF |
| C712 divider_0/prescaler_0/m1_2700_2190# divider_0/clk 0.01fF |
| C713 ro_div_new_0/divider_0/tspc_0/Z1 ro_div_new_0/divider_0/tspc_0/Z4 0.00fF |
| C714 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z4 ro_div_new_0/divider_0/prescaler_0/tspc_2/a_740_n680# 0.01fF |
| C715 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z4 ro_div_new_0/divider_0/prescaler_0/tspc_0/D 0.11fF |
| C716 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z2 ro_div_new_0/divider_0/clk 0.11fF |
| C717 ro_div_new_0/divider_0/nor_1/Z1 ro_div_new_0/divider_0/and_0/A 0.80fF |
| C718 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/a1 0.14fF |
| C719 ro_complete_0/cbank_2/switch_0/vin ro_complete_0/cbank_2/switch_1/vin 0.19fF |
| C720 ro_complete_0/a3 ro_complete_0/cbank_2/v 0.05fF |
| C721 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/nor_1/A 0.21fF |
| C722 divbuf_6/OUT2 divbuf_6/OUT5 0.02fF |
| C723 divbuf_6/OUT3 divbuf_6/OUT4 5.16fF |
| C724 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/B 0.01fF |
| C725 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/Out 0.91fF |
| C726 pd_0/UP pd_0/tspc_r_1/z5 0.03fF |
| C727 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/z5 0.11fF |
| C728 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/DIV 0.12fF |
| C729 divider_0/tspc_0/Q divider_0/tspc_1/Z3 0.45fF |
| C730 ro_div_new_0/ro_complete_0/cbank_1/switch_4/vin ro_div_new_0/ro_complete_0/cbank_1/switch_5/vin 0.20fF |
| C731 ro_div_new_0/divider_0/tspc_0/Z3 ro_div_new_0/divider_0/prescaler_0/Out 0.45fF |
| C732 ro_div_new_0/divider_0/prescaler_0/tspc_2/a_740_n680# ro_div_new_0/divider_0/prescaler_0/tspc_1/Q 0.15fF |
| C733 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z2 ro_div_new_0/divider_0/and_0/OUT 0.06fF |
| C734 divbuf_1/OUT2 divbuf_1/OUT5 0.02fF |
| C735 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/switch_2/vin 0.20fF |
| C736 divbuf_3/OUT2 divbuf_3/OUT 0.06fF |
| C737 divbuf_3/OUT3 divbuf_3/OUT5 0.01fF |
| C738 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF |
| C739 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_0/Z3 0.45fF |
| C740 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Z2 0.25fF |
| C741 divider_0/prescaler_0/tspc_0/Z2 divider_0/and_0/OUT 0.05fF |
| C742 ro_div_new_0/divider_0/prescaler_0/tspc_1/Q ro_div_new_0/divider_0/prescaler_0/tspc_2/D 0.32fF |
| C743 ro_div_new_0/divider_0/prescaler_0/tspc_2/a_630_n680# ro_div_new_0/divider_0/clk 0.01fF |
| C744 pll_full_0/divbuf_0/OUT3 pll_full_0/divbuf_0/OUT5 0.01fF |
| C745 ro_complete_0/a3 ro_complete_0/cbank_1/switch_2/vin 0.09fF |
| C746 divbuf_4/OUT2 divbuf_4/OUT 0.06fF |
| C747 divbuf_4/OUT3 divbuf_4/OUT5 0.01fF |
| C748 pll_full_0/divider_0/tspc_0/Z1 pll_full_0/divider_0/tspc_0/Z3 0.06fF |
| C749 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.06fF |
| C750 pd_0/tspc_r_0/Qbar1 pd_0/tspc_r_0/Qbar 0.01fF |
| C751 pd_0/tspc_r_0/Z3 pd_0/R 0.27fF |
| C752 ro_div_new_0/ro_complete_0/cbank_0/switch_4/vin ro_div_new_0/ro_complete_0/a0 0.13fF |
| C753 ro_div_new_0/ro_complete_0/cbank_1/switch_3/vin ro_div_new_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF |
| C754 divider_0/nor_1/A divider_0/tspc_1/Z4 0.02fF |
| C755 divider_0/nor_1/B divider_0/tspc_2/Z2 0.20fF |
| C756 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/clk 0.01fF |
| C757 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z1 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z4 0.00fF |
| C758 pll_full_0/cp_0/a_1710_0# pll_full_0/cp_0/down 0.32fF |
| C759 ro_div_new_0/divider_0/tspc_2/Z1 ro_div_new_0/divider_0/tspc_2/Z4 0.00fF |
| C760 pll_full_0/divider_0/tspc_0/Q pll_full_0/divider_0/tspc_1/Z3 0.45fF |
| C761 pll_full_0/ro_complete_0/a2 pll_full_0/divider_0/clk 0.11fF |
| C762 divbuf_1/OUT5 divbuf_1/OUT 43.38fF |
| C763 ro_complete_0/cbank_1/switch_4/vin ro_complete_0/cbank_1/switch_5/vin 0.20fF |
| C764 pll_full_0/divider_0/prescaler_0/tspc_2/D pll_full_0/divider_0/prescaler_0/nand_1/z1 0.21fF |
| C765 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Qbar1 0.12fF |
| C766 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Z4 0.12fF |
| C767 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/Z2 1.07fF |
| C768 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/Qbar1 0.38fF |
| C769 ro_div_new_0/ro_complete_0/cbank_0/switch_5/vin ro_div_new_0/ro_complete_0/cbank_0/v 1.30fF |
| C770 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF |
| C771 pll_full_0/pd_0/UP pll_full_0/pd_0/tspc_r_1/Qbar 0.21fF |
| C772 divider_0/tspc_0/a_630_n680# divider_0/prescaler_0/Out 0.01fF |
| C773 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/tspc_0/Q 0.19fF |
| C774 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/clk 0.14fF |
| C775 ro_div_new_0/divider_0/prescaler_0/tspc_2/a_630_n680# ro_div_new_0/divider_0/prescaler_0/tspc_2/Z3 0.05fF |
| C776 ro_div_new_0/divider_0/prescaler_0/tspc_2/a_740_n680# ro_div_new_0/divider_0/prescaler_0/tspc_2/Z4 0.08fF |
| C777 ro_div_new_0/ro_complete_0/a0 ro_div_new_0/divider_0/clk 0.05fF |
| C778 pll_full_0/ro_complete_0/a0 pll_full_0/divider_0/clk 0.01fF |
| C779 divider_0/tspc_1/Z1 divider_0/tspc_1/Z2 1.07fF |
| C780 divider_0/nor_1/B divider_0/tspc_1/Z3 0.38fF |
| C781 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Z3 0.05fF |
| C782 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/Z4 0.08fF |
| C783 pd_0/tspc_r_1/Qbar pd_0/and_pd_0/Z1 0.02fF |
| C784 ro_div_new_0/divider_0/mc2 ro_div_new_0/divider_0/and_0/OUT 0.05fF |
| C785 ro_div_new_0/divider_0/prescaler_0/tspc_0/a_740_n680# ro_div_new_0/divider_0/prescaler_0/tspc_0/Z4 0.08fF |
| C786 ro_div_new_0/divider_0/nor_0/Z1 ro_div_new_0/divider_0/and_0/B 0.78fF |
| C787 divider_0/tspc_2/Z1 divider_0/tspc_2/Z3 0.06fF |
| C788 divider_0/nor_0/B divider_0/Out 0.22fF |
| C789 divider_0/prescaler_0/tspc_2/D divider_0/clk 0.29fF |
| C790 divbuf_0/OUT3 divbuf_0/OUT 0.26fF |
| C791 ro_div_new_0/divider_0/tspc_1/Q ro_div_new_0/divider_0/tspc_2/Z3 0.45fF |
| C792 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z4 ro_div_new_0/divider_0/prescaler_0/tspc_2/D 0.11fF |
| C793 ro_complete_0/a2 ro_complete_0/cbank_2/switch_2/vin 0.14fF |
| C794 ro_complete_0/cbank_0/switch_2/vin ro_complete_0/a3 0.09fF |
| C795 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.36fF |
| C796 divbuf_4/a_492_n240# divbuf_4/OUT2 0.42fF |
| C797 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/pd_0/UP 0.11fF |
| C798 pll_full_0/pd_0/tspc_r_0/z5 pll_full_0/pd_0/DOWN 0.03fF |
| C799 divider_0/tspc_1/Z2 divider_0/tspc_1/Z4 0.36fF |
| C800 divider_0/prescaler_0/tspc_1/Z2 divider_0/and_0/OUT 0.06fF |
| C801 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/Z3 0.33fF |
| C802 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/Q 0.38fF |
| C803 ro_div_new_0/ro_complete_0/a4 ro_div_new_0/ro_complete_0/cbank_2/switch_1/vin 0.09fF |
| C804 ro_div_new_0/ro_complete_0/a2 ro_div_new_0/ro_complete_0/cbank_0/switch_3/vin 0.09fF |
| C805 ro_div_new_0/divider_0/tspc_0/Z3 ro_div_new_0/divider_0/nor_1/A 0.38fF |
| C806 ro_div_new_0/ro_complete_0/a4 ro_div_new_0/divider_0/clk 0.05fF |
| C807 pll_full_0/ro_complete_0/cbank_2/switch_0/vin pll_full_0/ro_complete_0/cbank_2/v 1.44fF |
| C808 divider_0/and_0/out1 divider_0/and_0/Z1 0.36fF |
| C809 divbuf_0/OUT divbuf_0/OUT2 0.06fF |
| C810 ro_complete_0/cbank_0/switch_5/vin ro_complete_0/cbank_0/v 1.30fF |
| C811 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z2 0.01fF |
| C812 divbuf_5/a_492_n240# divbuf_5/OUT5 0.01fF |
| C813 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_0/Z2 0.21fF |
| C814 divider_0/tspc_1/Q divider_0/tspc_2/Z1 0.01fF |
| C815 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_2/D 0.05fF |
| C816 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/clk 0.01fF |
| C817 divider_0/nor_1/B divider_0/and_0/A 0.26fF |
| C818 ro_div_new_0/ro_complete_0/a2 ro_div_new_0/ro_complete_0/cbank_2/switch_2/vin 0.14fF |
| C819 ro_div_new_0/ro_complete_0/a3 ro_div_new_0/ro_complete_0/cbank_2/switch_1/vin 0.13fF |
| C820 ro_div_new_0/ro_complete_0/cbank_0/switch_2/vin ro_div_new_0/ro_complete_0/cbank_0/v 1.30fF |
| C821 ro_div_new_0/divider_0/prescaler_0/m1_2700_2190# ro_div_new_0/divider_0/and_0/OUT 0.14fF |
| C822 ro_div_new_0/ro_complete_0/a3 ro_div_new_0/divider_0/clk 0.05fF |
| C823 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/switch_1/vin 0.13fF |
| C824 pll_full_0/ro_complete_0/a3 pll_full_0/divider_0/clk 0.11fF |
| C825 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z3 0.05fF |
| C826 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_2/Z1 0.03fF |
| C827 divbuf_6/OUT3 divbuf_6/OUT 0.26fF |
| C828 divbuf_6/OUT4 divbuf_6/OUT5 20.26fF |
| C829 pd_0/tspc_r_1/Z2 pd_0/tspc_r_1/Z4 0.14fF |
| C830 pll_full_0/pd_0/tspc_r_0/Z2 pll_full_0/pd_0/DIV 0.19fF |
| C831 divider_0/mc2 divider_0/and_0/OUT 0.05fF |
| C832 pll_full_0/pd_0/DOWN pll_full_0/pd_0/tspc_r_1/Qbar 0.02fF |
| C833 divider_0/nor_1/A divider_0/and_0/B 0.08fF |
| C834 ro_div_new_0/divider_0/tspc_0/Z3 ro_div_new_0/divider_0/tspc_0/Q 0.05fF |
| C835 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z4 ro_div_new_0/divider_0/clk 0.12fF |
| C836 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/switch_5/vin 0.09fF |
| C837 divbuf_3/OUT4 divbuf_3/OUT 1.11fF |
| C838 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/B 0.18fF |
| C839 pll_full_0/divider_0/tspc_0/Z2 pll_full_0/divider_0/tspc_0/Z3 0.16fF |
| C840 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Z3 0.65fF |
| C841 divider_0/tspc_1/Z1 divider_0/tspc_1/Z4 0.00fF |
| C842 divider_0/prescaler_0/tspc_1/Z4 divider_0/prescaler_0/tspc_2/a_740_n680# 0.01fF |
| C843 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/D 0.09fF |
| C844 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_0/Q 0.20fF |
| C845 filter_0/a_4216_n5230# filter_0/v 0.19fF |
| C846 ro_div_new_0/ro_complete_0/cbank_2/switch_2/vin ro_div_new_0/ro_complete_0/cbank_2/v 1.30fF |
| C847 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/switch_3/vin 0.09fF |
| C848 ro_div_new_0/divider_0/prescaler_0/tspc_0/Q ro_div_new_0/divider_0/prescaler_0/tspc_2/D 0.04fF |
| C849 ro_div_new_0/divider_0/prescaler_0/tspc_1/Q ro_div_new_0/divider_0/prescaler_0/nand_1/z1 0.22fF |
| C850 ro_complete_0/a3 ro_complete_0/cbank_2/switch_1/vin 0.13fF |
| C851 divbuf_4/OUT4 divbuf_4/OUT 1.11fF |
| C852 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.03fF |
| C853 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_2/a_630_n680# 0.01fF |
| C854 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/Out 0.11fF |
| C855 pd_0/DOWN pd_0/R 0.36fF |
| C856 pd_0/tspc_r_0/Z1 pd_0/tspc_r_0/Z2 0.71fF |
| C857 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/Z4 0.20fF |
| C858 pd_0/DIV pd_0/tspc_r_0/z5 0.04fF |
| C859 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_1/Q 0.15fF |
| C860 divider_0/prescaler_0/tspc_2/Z2 divider_0/and_0/OUT 0.06fF |
| C861 ro_div_new_0/divider_0/tspc_0/Z3 ro_div_new_0/divider_0/tspc_0/Z2 0.16fF |
| C862 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z2 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z3 0.16fF |
| C863 ro_div_new_0/ro_complete_0/cbank_1/switch_3/vin ro_div_new_0/divider_0/clk 1.30fF |
| C864 ro_div_new_0/divider_0/tspc_2/Z3 ro_div_new_0/divider_0/tspc_2/Z4 0.65fF |
| C865 ro_complete_0/cbank_1/switch_4/vin ro_complete_0/cbank_1/v 1.30fF |
| C866 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_0/Z3 0.38fF |
| C867 pd_0/tspc_r_0/Z4 pd_0/tspc_r_1/Z4 0.02fF |
| C868 pd_0/DOWN pd_0/and_pd_0/Out1 0.12fF |
| C869 pd_0/REF pd_0/tspc_r_1/Z1 0.17fF |
| C870 pd_0/tspc_r_1/Qbar1 pd_0/UP 0.11fF |
| C871 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/UP 0.03fF |
| C872 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/Z3 0.16fF |
| C873 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z3 ro_div_new_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.05fF |
| C874 pll_full_0/divbuf_0/a_492_n240# pll_full_0/divbuf_0/OUT5 0.01fF |
| C875 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/a4 0.09fF |
| C876 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/Z4 0.02fF |
| C877 divider_0/tspc_0/a_630_n680# divider_0/tspc_0/Z2 0.01fF |
| C878 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/tspc_2/D 0.32fF |
| C879 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/clk 0.01fF |
| C880 ro_div_new_0/divider_0/prescaler_0/tspc_2/a_630_n680# ro_div_new_0/divider_0/prescaler_0/tspc_2/Z4 0.12fF |
| C881 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z1 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z2 1.07fF |
| C882 divbuf_3/a_492_n240# divbuf_3/IN 0.13fF |
| C883 ro_complete_0/cbank_2/switch_2/vin ro_complete_0/cbank_2/v 1.30fF |
| C884 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# 0.01fF |
| C885 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Q 0.20fF |
| C886 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/nor_1/A 1.21fF |
| C887 divbuf_7/a_492_n240# divbuf_7/OUT 0.00fF |
| C888 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Z1 0.09fF |
| C889 pll_full_0/pd_0/tspc_r_0/z5 pll_full_0/pd_0/DIV 0.04fF |
| C890 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Z4 0.12fF |
| C891 divider_0/prescaler_0/tspc_1/Z1 divider_0/prescaler_0/tspc_1/Z2 1.07fF |
| C892 ro_div_new_0/ro_complete_0/a1 ro_div_new_0/ro_complete_0/cbank_2/v 0.05fF |
| C893 divider_0/tspc_2/Z1 divider_0/tspc_2/Z4 0.00fF |
| C894 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_1/switch_3/vin 0.09fF |
| C895 ro_div_new_0/divider_0/tspc_1/a_630_n680# ro_div_new_0/divider_0/nor_0/B 0.00fF |
| C896 ro_div_new_0/divider_0/tspc_1/Q ro_div_new_0/divider_0/tspc_2/Z4 0.15fF |
| C897 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z3 ro_div_new_0/divider_0/prescaler_0/Out 0.11fF |
| C898 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z2 ro_div_new_0/divider_0/clk 0.11fF |
| C899 ro_div_new_0/ro_complete_0/a2 ro_div_new_0/ro_complete_0/cbank_2/switch_3/vin 0.09fF |
| C900 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_1/Qbar 0.03fF |
| C901 divider_0/tspc_1/a_630_n680# divider_0/nor_0/B 0.00fF |
| C902 divider_0/tspc_0/a_630_n680# divider_0/nor_1/A 0.35fF |
| C903 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z3 0.05fF |
| C904 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/Z4 0.08fF |
| C905 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Q 0.04fF |
| C906 ro_div_new_0/divider_0/mc2 ro_div_new_0/divider_0/and_0/out1 0.06fF |
| C907 divbuf_5/OUT2 divbuf_5/OUT3 1.37fF |
| C908 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/Out 0.21fF |
| C909 divider_0/tspc_0/Q divider_0/tspc_1/a_630_n680# 0.01fF |
| C910 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_0/a_630_n680# 0.19fF |
| C911 pd_0/R pd_0/tspc_r_1/Z3 0.29fF |
| C912 pll_full_0/pd_0/REF pll_full_0/divbuf_1/a_492_n240# 0.13fF |
| C913 divider_0/tspc_1/Q divider_0/tspc_2/Z3 0.45fF |
| C914 divider_0/prescaler_0/tspc_2/Z4 divider_0/prescaler_0/tspc_2/D 0.11fF |
| C915 divider_0/prescaler_0/tspc_1/Z1 divider_0/prescaler_0/Out 0.08fF |
| C916 io_clamp_low[2] io_analog[6] 0.53fF |
| C917 ro_div_new_0/divider_0/prescaler_0/m1_2700_2190# ro_div_new_0/divider_0/prescaler_0/tspc_0/D 0.16fF |
| C918 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/v 0.05fF |
| C919 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/v 1.30fF |
| C920 ro_div_new_0/divider_0/prescaler_0/Out ro_div_new_0/divider_0/clk 0.51fF |
| C921 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_1/Z2 0.30fF |
| C922 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF |
| C923 ro_complete_0/a1 ro_complete_0/cbank_2/v 0.05fF |
| C924 divbuf_6/OUT5 divbuf_6/OUT 43.38fF |
| C925 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z4 0.12fF |
| C926 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z2 1.07fF |
| C927 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_2/Z3 0.38fF |
| C928 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_1/Qbar1 0.30fF |
| C929 divider_0/tspc_0/Z4 divider_0/tspc_0/a_630_n680# 0.12fF |
| C930 cp_0/a_1710_0# cp_0/down 0.32fF |
| C931 ro_div_new_0/ro_complete_0/cbank_2/switch_3/vin ro_div_new_0/ro_complete_0/cbank_2/v 1.30fF |
| C932 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/cbank_0/switch_1/vin 0.19fF |
| C933 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/v 0.05fF |
| C934 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/switch_4/vin 0.20fF |
| C935 pll_full_0/pd_0/tspc_r_0/Z2 pll_full_0/pd_0/tspc_r_0/Z1 0.71fF |
| C936 divider_0/mc2 divider_0/and_0/out1 0.06fF |
| C937 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Q 0.04fF |
| C938 ro_div_new_0/ro_complete_0/cbank_0/switch_0/vin ro_div_new_0/ro_complete_0/cbank_0/v 1.30fF |
| C939 ro_div_new_0/ro_complete_0/cbank_0/switch_4/vin ro_div_new_0/ro_complete_0/cbank_0/switch_3/vin 0.20fF |
| C940 cp_0/vbias cp_0/a_10_n50# 0.19fF |
| C941 ro_div_new_0/divider_0/nor_1/B ro_div_new_0/divider_0/tspc_1/Z1 0.03fF |
| C942 ro_div_new_0/ro_complete_0/cbank_2/switch_4/vin ro_div_new_0/ro_complete_0/cbank_2/switch_5/vin 0.20fF |
| C943 ro_div_new_0/divider_0/prescaler_0/tspc_0/Q ro_div_new_0/divider_0/prescaler_0/nand_1/z1 0.01fF |
| C944 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z3 ro_div_new_0/divider_0/prescaler_0/Out 0.05fF |
| C945 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z2 ro_div_new_0/divider_0/clk 0.11fF |
| C946 pll_full_0/divider_0/tspc_0/Q pll_full_0/divider_0/tspc_1/a_630_n680# 0.01fF |
| C947 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.19fF |
| C948 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/a0 0.13fF |
| C949 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/nor_0/B 0.22fF |
| C950 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/tspc_0/D 0.03fF |
| C951 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.09fF |
| C952 pd_0/tspc_r_0/Qbar1 pd_0/tspc_r_0/z5 0.20fF |
| C953 divider_0/prescaler_0/tspc_0/Z2 divider_0/clk 0.11fF |
| C954 ro_div_new_0/ro_complete_0/cbank_1/switch_3/vin ro_div_new_0/ro_complete_0/cbank_1/switch_4/vin 0.20fF |
| C955 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z2 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z4 0.36fF |
| C956 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_1/Z1 0.03fF |
| C957 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/tspc_0/a_630_n680# 0.12fF |
| C958 ro_complete_0/cbank_1/switch_1/vin ro_complete_0/cbank_1/v 1.30fF |
| C959 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/out1 0.31fF |
| C960 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/and_0/A 0.01fF |
| C961 divbuf_6/a_492_n240# divbuf_6/OUT2 0.42fF |
| C962 divider_0/tspc_1/a_630_n680# divider_0/nor_1/B 0.35fF |
| C963 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/Z4 0.36fF |
| C964 ro_div_new_0/ro_complete_0/cbank_0/switch_0/vin ro_div_new_0/ro_complete_0/a5 0.09fF |
| C965 pd_0/tspc_r_0/z5 pd_0/tspc_r_1/z5 0.02fF |
| C966 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/Z2 0.25fF |
| C967 pll_full_0/ro_complete_0/cbank_2/switch_0/vin pll_full_0/ro_complete_0/a4 0.12fF |
| C968 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF |
| C969 divider_0/prescaler_0/tspc_0/Q divider_0/prescaler_0/tspc_2/D 0.04fF |
| C970 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/nand_1/z1 0.22fF |
| C971 ro_div_new_0/ro_complete_0/cbank_2/switch_1/vin ro_div_new_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF |
| C972 divbuf_1/OUT3 divbuf_1/OUT5 0.01fF |
| C973 ro_div_new_0/divider_0/nor_1/B ro_div_new_0/divider_0/nor_0/B 0.47fF |
| C974 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z2 ro_div_new_0/divider_0/prescaler_0/tspc_1/Q 0.06fF |
| C975 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z2 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z3 0.16fF |
| C976 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/v 0.05fF |
| C977 pll_full_0/ro_complete_0/cbank_2/switch_2/vin pll_full_0/ro_complete_0/cbank_2/switch_1/vin 0.20fF |
| C978 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/nor_1/A 0.01fF |
| C979 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/tspc_1/Z3 0.16fF |
| C980 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_1/Z4 0.21fF |
| C981 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.15fF |
| C982 ro_complete_0/cbank_2/switch_4/vin ro_complete_0/cbank_2/switch_5/vin 0.20fF |
| C983 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/and_0/B 0.29fF |
| C984 divbuf_7/IN divbuf_7/OUT5 0.00fF |
| C985 pll_full_0/pd_0/tspc_r_0/Qbar pll_full_0/pd_0/DOWN 0.21fF |
| C986 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/tspc_1/Z3 0.16fF |
| C987 divider_0/tspc_2/Z3 divider_0/tspc_2/Z4 0.65fF |
| C988 cp_0/a_1710_0# cp_0/a_1710_n2840# 0.83fF |
| C989 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z4 ro_div_new_0/divider_0/prescaler_0/Out 0.28fF |
| C990 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.14fF |
| C991 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/a4 0.12fF |
| C992 divbuf_4/a_492_n240# divbuf_4/OUT 0.00fF |
| C993 pd_0/DIV pd_0/tspc_r_0/Qbar1 0.12fF |
| C994 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.09fF |
| C995 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/R 0.29fF |
| C996 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z4 0.12fF |
| C997 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z2 1.07fF |
| C998 ro_div_new_0/ro_complete_0/a4 ro_div_new_0/ro_complete_0/cbank_2/switch_0/vin 0.12fF |
| C999 ro_div_new_0/ro_complete_0/a2 ro_div_new_0/ro_complete_0/cbank_0/switch_2/vin 0.14fF |
| C1000 pll_full_0/pd_0/tspc_r_1/Qbar pll_full_0/pd_0/and_pd_0/Out1 0.05fF |
| C1001 ro_div_new_0/divider_0/prescaler_0/m1_2700_2190# ro_div_new_0/divider_0/prescaler_0/tspc_1/Z3 0.33fF |
| C1002 divbuf_0/OUT3 divbuf_0/OUT2 1.37fF |
| C1003 ro_div_new_0/divider_0/and_0/OUT ro_div_new_0/divider_0/and_0/B 0.01fF |
| C1004 ro_div_new_0/divider_0/prescaler_0/tspc_1/Q ro_div_new_0/divider_0/prescaler_0/Out 0.91fF |
| C1005 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.09fF |
| C1006 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/switch_2/vin 0.20fF |
| C1007 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.06fF |
| C1008 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/Out 0.04fF |
| C1009 divbuf_5/OUT2 divbuf_5/OUT5 0.02fF |
| C1010 divbuf_5/OUT3 divbuf_5/OUT4 5.16fF |
| C1011 pd_0/R pd_0/UP 0.45fF |
| C1012 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_0/switch_0/vin 0.09fF |
| C1013 divider_0/tspc_1/Q divider_0/tspc_2/Z4 0.15fF |
| C1014 divider_0/prescaler_0/tspc_1/Z3 divider_0/prescaler_0/Out 0.11fF |
| C1015 divider_0/prescaler_0/tspc_1/Z2 divider_0/clk 0.11fF |
| C1016 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/OUT4 1.11fF |
| C1017 ro_div_new_0/divider_0/tspc_1/Z3 ro_div_new_0/divider_0/tspc_1/a_630_n680# 0.05fF |
| C1018 ro_div_new_0/divider_0/prescaler_0/m1_2700_2190# ro_div_new_0/divider_0/prescaler_0/nand_0/z1 0.07fF |
| C1019 ro_div_new_0/divider_0/prescaler_0/tspc_2/a_740_n680# ro_div_new_0/divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF |
| C1020 ro_div_new_0/ro_complete_0/a1 ro_div_new_0/divider_0/clk 0.05fF |
| C1021 ro_div_new_0/divider_0/prescaler_0/Out ro_div_new_0/divider_0/tspc_0/Z4 0.12fF |
| C1022 pll_full_0/divbuf_1/OUT3 pll_full_0/divbuf_1/OUT4 5.16fF |
| C1023 pll_full_0/ro_complete_0/cbank_1/switch_4/vin pll_full_0/ro_complete_0/cbank_1/switch_5/vin 0.20fF |
| C1024 ro_complete_0/cbank_1/switch_5/vin ro_complete_0/cbank_1/v 1.30fF |
| C1025 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z3 0.06fF |
| C1026 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_1/Q 0.51fF |
| C1027 pll_full_0/ro_complete_0/a1 pll_full_0/divider_0/clk 0.11fF |
| C1028 pll_full_0/divider_0/tspc_2/Z2 pll_full_0/divider_0/tspc_2/Z3 0.16fF |
| C1029 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_2/Z4 0.22fF |
| C1030 pd_0/UP pd_0/and_pd_0/Out1 0.33fF |
| C1031 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Z3 0.05fF |
| C1032 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF |
| C1033 cp_0/a_1710_0# cp_0/a_10_n50# 0.04fF |
| C1034 ro_div_new_0/divider_0/prescaler_0/tspc_0/a_740_n680# ro_div_new_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.19fF |
| C1035 ro_div_new_0/ro_complete_0/a0 ro_div_new_0/ro_complete_0/cbank_1/switch_5/vin 0.09fF |
| C1036 ro_div_new_0/divider_0/tspc_1/Z1 ro_div_new_0/divider_0/tspc_0/Q 0.01fF |
| C1037 ro_div_new_0/divider_0/tspc_0/a_630_n680# ro_div_new_0/divider_0/prescaler_0/Out 0.01fF |
| C1038 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z2 ro_div_new_0/divider_0/prescaler_0/tspc_1/Q 0.06fF |
| C1039 ro_div_new_0/divider_0/prescaler_0/m1_2700_2190# ro_div_new_0/divider_0/clk 0.01fF |
| C1040 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/tspc_1/Z4 0.65fF |
| C1041 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z2 0.01fF |
| C1042 ro_div_new_0/divider_0/nor_1/B ro_div_new_0/divider_0/tspc_0/a_630_n680# 0.01fF |
| C1043 ro_div_new_0/divider_0/mc2 ro_div_new_0/divider_0/nor_0/B 0.15fF |
| C1044 ro_div_new_0/ro_complete_0/cbank_2/switch_4/vin ro_div_new_0/ro_complete_0/cbank_2/v 1.30fF |
| C1045 divider_0/prescaler_0/Out divider_0/clk 0.51fF |
| C1046 pll_full_0/ro_complete_0/cbank_0/switch_2/vin pll_full_0/ro_complete_0/a3 0.09fF |
| C1047 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/a2 0.09fF |
| C1048 ro_div_new_0/divider_0/prescaler_0/tspc_2/D ro_div_new_0/divider_0/prescaler_0/nand_1/z1 0.21fF |
| C1049 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/switch_2/vin 0.20fF |
| C1050 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/and_0/B 0.31fF |
| C1051 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_2/Z2 0.14fF |
| C1052 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/nand_0/z1 0.01fF |
| C1053 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z1 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z3 0.06fF |
| C1054 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF |
| C1055 pll_full_0/ro_complete_0/cbank_0/switch_5/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF |
| C1056 ro_complete_0/a4 ro_complete_0/cbank_2/v 0.05fF |
| C1057 ro_complete_0/a0 ro_complete_0/cbank_1/switch_5/vin 0.09fF |
| C1058 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/clk 0.05fF |
| C1059 pd_0/tspc_r_1/Qbar1 pd_0/tspc_r_1/Qbar 0.01fF |
| C1060 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/tspc_r_0/z5 0.20fF |
| C1061 ro_div_new_0/divider_0/nor_1/Z1 ro_div_new_0/divider_0/nor_1/B 0.06fF |
| C1062 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/ro_complete_0/cbank_1/switch_0/vin 0.19fF |
| C1063 divider_0/prescaler_0/tspc_0/Q divider_0/prescaler_0/nand_1/z1 0.01fF |
| C1064 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/Out 0.05fF |
| C1065 divider_0/prescaler_0/tspc_2/Z2 divider_0/clk 0.11fF |
| C1066 divbuf_1/OUT4 divbuf_1/OUT 1.11fF |
| C1067 ro_div_new_0/divider_0/nor_1/A ro_div_new_0/divider_0/prescaler_0/tspc_1/Q 0.03fF |
| C1068 ro_div_new_0/divider_0/nor_1/B ro_div_new_0/divider_0/tspc_2/Z2 0.20fF |
| C1069 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z2 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z4 0.36fF |
| C1070 ro_div_new_0/divider_0/prescaler_0/tspc_0/a_630_n680# ro_div_new_0/divider_0/clk 0.01fF |
| C1071 divbuf_3/a_492_n240# divbuf_3/OUT5 0.01fF |
| C1072 ro_complete_0/cbank_2/switch_4/vin ro_complete_0/cbank_2/v 1.30fF |
| C1073 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/tspc_1/Q 0.05fF |
| C1074 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.05fF |
| C1075 divbuf_7/OUT2 divbuf_7/OUT 0.06fF |
| C1076 divbuf_7/OUT3 divbuf_7/OUT5 0.01fF |
| C1077 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/tspc_1/Z4 0.36fF |
| C1078 divider_0/mc2 divider_0/nor_0/B 0.15fF |
| C1079 ro_div_new_0/ro_complete_0/cbank_0/v ro_div_new_0/ro_complete_0/cbank_2/v 0.04fF |
| C1080 divbuf_1/a_492_n240# divbuf_1/OUT2 0.42fF |
| C1081 ro_div_new_0/divider_0/nor_1/A ro_div_new_0/divider_0/tspc_0/Z4 0.21fF |
| C1082 divbuf_2/OUT3 divbuf_2/OUT5 0.01fF |
| C1083 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/a1 0.14fF |
| C1084 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_2/Z4 0.02fF |
| C1085 pd_0/tspc_r_0/Z3 pd_0/DOWN 0.03fF |
| C1086 pll_full_0/cp_0/upbar pll_full_0/cp_0/down 0.02fF |
| C1087 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/tspc_1/Q 0.06fF |
| C1088 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/Z3 0.16fF |
| C1089 ro_div_new_0/ro_complete_0/cbank_0/switch_4/vin ro_div_new_0/ro_complete_0/cbank_0/switch_5/vin 0.20fF |
| C1090 ro_div_new_0/divider_0/tspc_1/Z1 ro_div_new_0/divider_0/tspc_1/Z2 1.07fF |
| C1091 ro_div_new_0/divider_0/nor_1/B ro_div_new_0/divider_0/tspc_1/Z3 0.38fF |
| C1092 ro_div_new_0/divider_0/tspc_0/a_630_n680# ro_div_new_0/divider_0/nor_1/A 0.35fF |
| C1093 ro_div_new_0/divider_0/prescaler_0/tspc_1/a_630_n680# ro_div_new_0/divider_0/prescaler_0/tspc_1/Z3 0.05fF |
| C1094 ro_div_new_0/divider_0/prescaler_0/m1_2700_2190# ro_div_new_0/divider_0/prescaler_0/tspc_1/Z4 0.08fF |
| C1095 ro_div_new_0/divider_0/tspc_2/a_630_n680# ro_div_new_0/divider_0/tspc_2/Z3 0.05fF |
| C1096 ro_div_new_0/divider_0/nor_0/B ro_div_new_0/divider_0/tspc_2/Z1 0.03fF |
| C1097 pll_full_0/divbuf_1/a_492_n240# pll_full_0/divbuf_1/OUT5 0.01fF |
| C1098 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/a1 0.14fF |
| C1099 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.00fF |
| C1100 divbuf_2/OUT3 divbuf_2/OUT 0.26fF |
| C1101 divbuf_0/IN divbuf_0/OUT5 0.00fF |
| C1102 divbuf_5/OUT3 divbuf_5/OUT 0.26fF |
| C1103 divbuf_5/OUT4 divbuf_5/OUT5 20.26fF |
| C1104 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/tspc_0/Z3 0.05fF |
| C1105 io_clamp_low[2] io_clamp_high[2] 0.53fF |
| C1106 divider_0/nor_1/Z1 divider_0/nor_1/B 0.06fF |
| C1107 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/cbank_0/switch_0/vin 0.19fF |
| C1108 divider_0/prescaler_0/tspc_1/Z4 divider_0/prescaler_0/Out 0.28fF |
| C1109 ro_div_new_0/ro_complete_0/a5 ro_div_new_0/ro_complete_0/cbank_2/v 0.08fF |
| C1110 io_clamp_high[1] io_analog[5] 0.53fF |
| C1111 ro_div_new_0/divider_0/prescaler_0/m1_2700_2190# ro_div_new_0/divider_0/prescaler_0/tspc_1/Q 0.38fF |
| C1112 divbuf_1/a_492_n240# divbuf_1/OUT 0.00fF |
| C1113 ro_div_new_0/divider_0/and_0/out1 ro_div_new_0/divider_0/and_0/B 0.18fF |
| C1114 pll_full_0/divbuf_1/OUT4 pll_full_0/divbuf_1/OUT5 20.26fF |
| C1115 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_0/a_630_n680# 0.01fF |
| C1116 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.06fF |
| C1117 divbuf_0/OUT4 divbuf_0/OUT5 20.26fF |
| C1118 ro_complete_0/cbank_0/v ro_complete_0/cbank_2/v 0.04fF |
| C1119 pll_full_0/divider_0/tspc_2/Z2 pll_full_0/divider_0/tspc_2/Z4 0.36fF |
| C1120 pll_full_0/divider_0/tspc_2/Z3 pll_full_0/divbuf_0/IN 0.05fF |
| C1121 pll_full_0/pd_0/tspc_r_1/Z4 pll_full_0/pd_0/tspc_r_0/Z4 0.02fF |
| C1122 divider_0/and_0/OUT divider_0/and_0/B 0.01fF |
| C1123 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/Out 0.91fF |
| C1124 ro_div_new_0/divider_0/tspc_1/Q ro_div_new_0/divider_0/tspc_2/a_630_n680# 0.01fF |
| C1125 ro_div_new_0/divider_0/tspc_0/a_630_n680# ro_div_new_0/divider_0/tspc_0/Q 0.04fF |
| C1126 ro_div_new_0/divider_0/prescaler_0/tspc_1/a_630_n680# ro_div_new_0/divider_0/clk 0.01fF |
| C1127 ro_div_new_0/divider_0/nor_1/B ro_div_new_0/divider_0/and_0/A 0.26fF |
| C1128 pll_full_0/divbuf_1/OUT pll_full_0/divbuf_1/a_492_n240# 0.00fF |
| C1129 pll_full_0/divbuf_0/OUT2 pll_full_0/divbuf_0/OUT3 1.37fF |
| C1130 pll_full_0/ro_complete_0/cbank_2/switch_2/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF |
| Xpd_0 VDD gnd pd_0/REF pd_0/DIV pd_0/UP pd_0/DOWN pd_0/R pd |
| Xro_div_new_0/ro_complete_0 ro_div_new_0/ro_complete_0/a0 ro_div_new_0/ro_complete_0/a1 |
| + ro_div_new_0/ro_complete_0/a5 ro_div_new_0/ro_complete_0/a4 ro_div_new_0/ro_complete_0/a3 |
| + ro_div_new_0/ro_complete_0/a2 ro_complete |
| Xro_div_new_0/divider_0 gnd vdd ro_div_new_0/divider_0/Out ro_div_new_0/divider_0/clk |
| + ro_div_new_0/divider_0/mc2 divider |
| Xcp_0 cp_0/vbias vdd gnd cp_0/out cp_0/down cp_0/upbar cp |
| Xfilter_0 gnd filter_0/v filter |
| Xro_complete_0 ro_complete_0/a0 ro_complete_0/a1 ro_complete_0/a5 ro_complete_0/a4 |
| + ro_complete_0/a3 ro_complete_0/a2 ro_complete |
| Xdivbuf_0 VDD divbuf_0/IN divbuf_0/OUT divbuf_0/OUT2 divbuf_0/OUT3 divbuf_0/OUT4 divbuf_0/OUT5 |
| + gnd divbuf |
| Xdivbuf_1 VDD divbuf_1/IN divbuf_1/OUT divbuf_1/OUT2 divbuf_1/OUT3 divbuf_1/OUT4 divbuf_1/OUT5 |
| + gnd divbuf |
| Xdivbuf_2 VDD divbuf_2/IN divbuf_2/OUT divbuf_2/OUT2 divbuf_2/OUT3 divbuf_2/OUT4 divbuf_2/OUT5 |
| + gnd divbuf |
| Xdivbuf_3 VDD divbuf_3/IN divbuf_3/OUT divbuf_3/OUT2 divbuf_3/OUT3 divbuf_3/OUT4 divbuf_3/OUT5 |
| + gnd divbuf |
| Xdivbuf_4 VDD divbuf_4/IN divbuf_4/OUT divbuf_4/OUT2 divbuf_4/OUT3 divbuf_4/OUT4 divbuf_4/OUT5 |
| + gnd divbuf |
| Xdivbuf_5 VDD divbuf_5/IN divbuf_5/OUT divbuf_5/OUT2 divbuf_5/OUT3 divbuf_5/OUT4 divbuf_5/OUT5 |
| + gnd divbuf |
| Xdivbuf_6 VDD divbuf_6/IN divbuf_6/OUT divbuf_6/OUT2 divbuf_6/OUT3 divbuf_6/OUT4 divbuf_6/OUT5 |
| + gnd divbuf |
| Xdivbuf_7 VDD divbuf_7/IN divbuf_7/OUT divbuf_7/OUT2 divbuf_7/OUT3 divbuf_7/OUT4 divbuf_7/OUT5 |
| + gnd divbuf |
| Xdivider_0 gnd vdd divider_0/Out divider_0/clk divider_0/mc2 divider |
| Xpll_full_0 vdd pll_full |
| C1131 io_analog[4] vdd 25.05fF |
| C1132 io_analog[5] vdd 25.05fF |
| C1133 io_analog[6] vdd 25.05fF |
| C1134 io_in_3v3[0] vdd 0.61fF |
| C1135 io_oeb[26] vdd 0.61fF |
| C1136 io_in[0] vdd 0.61fF |
| C1137 io_out[26] vdd 0.61fF |
| C1138 io_out[0] vdd 0.61fF |
| C1139 io_in[26] vdd 0.61fF |
| C1140 io_oeb[0] vdd 0.61fF |
| C1141 io_in_3v3[26] vdd 0.61fF |
| C1142 io_in_3v3[1] vdd 0.61fF |
| C1143 io_oeb[25] vdd 0.61fF |
| C1144 io_in[1] vdd 0.61fF |
| C1145 io_out[25] vdd 0.61fF |
| C1146 io_out[1] vdd 0.61fF |
| C1147 io_in[25] vdd 0.61fF |
| C1148 io_oeb[1] vdd 0.61fF |
| C1149 io_in_3v3[25] vdd 0.61fF |
| C1150 io_in_3v3[2] vdd 0.61fF |
| C1151 io_oeb[24] vdd 0.61fF |
| C1152 io_in[2] vdd 0.61fF |
| C1153 io_out[24] vdd 0.61fF |
| C1154 io_out[2] vdd 0.61fF |
| C1155 io_in[24] vdd 0.61fF |
| C1156 io_oeb[2] vdd 0.61fF |
| C1157 io_in_3v3[24] vdd 0.61fF |
| C1158 io_in_3v3[3] vdd 0.61fF |
| C1159 gpio_noesd[17] vdd 0.61fF |
| C1160 io_in[3] vdd 0.61fF |
| C1161 gpio_analog[17] vdd 0.61fF |
| C1162 io_out[3] vdd 0.61fF |
| C1163 io_oeb[3] vdd 0.61fF |
| C1164 io_in_3v3[4] vdd 0.61fF |
| C1165 io_in[4] vdd 0.61fF |
| C1166 io_out[4] vdd 0.61fF |
| C1167 io_oeb[4] vdd 0.61fF |
| C1168 io_oeb[23] vdd 0.61fF |
| C1169 io_out[23] vdd 0.61fF |
| C1170 io_in[23] vdd 0.61fF |
| C1171 io_in_3v3[23] vdd 0.61fF |
| C1172 gpio_noesd[16] vdd 0.61fF |
| C1173 gpio_analog[16] vdd 0.61fF |
| C1174 io_in_3v3[5] vdd 0.61fF |
| C1175 io_in[5] vdd 0.61fF |
| C1176 io_out[5] vdd 0.61fF |
| C1177 io_oeb[5] vdd 0.61fF |
| C1178 io_oeb[22] vdd 0.61fF |
| C1179 io_out[22] vdd 0.61fF |
| C1180 io_in[22] vdd 0.61fF |
| C1181 io_in_3v3[22] vdd 0.61fF |
| C1182 gpio_noesd[15] vdd 0.61fF |
| C1183 gpio_analog[15] vdd 0.61fF |
| C1184 io_in_3v3[6] vdd 0.61fF |
| C1185 io_in[6] vdd 0.61fF |
| C1186 io_out[6] vdd 0.61fF |
| C1187 io_oeb[6] vdd 0.61fF |
| C1188 io_oeb[21] vdd 0.61fF |
| C1189 io_out[21] vdd 0.61fF |
| C1190 io_in[21] vdd 0.61fF |
| C1191 io_in_3v3[21] vdd 0.61fF |
| C1192 gpio_noesd[14] vdd 0.61fF |
| C1193 gpio_analog[14] vdd 0.61fF |
| C1194 vssa1 vdd 26.08fF |
| C1195 vssd2 vdd 13.04fF |
| C1196 vssd1 vdd 13.04fF |
| C1197 vdda2 vdd 13.04fF |
| C1198 vdda1 vdd 26.08fF |
| C1199 io_oeb[20] vdd 0.61fF |
| C1200 io_out[20] vdd 0.61fF |
| C1201 io_in[20] vdd 0.61fF |
| C1202 io_in_3v3[20] vdd 0.61fF |
| C1203 gpio_noesd[13] vdd 0.61fF |
| C1204 gpio_analog[13] vdd 0.61fF |
| C1205 gpio_analog[0] vdd 0.61fF |
| C1206 gpio_noesd[0] vdd 0.61fF |
| C1207 io_in_3v3[7] vdd 0.61fF |
| C1208 io_in[7] vdd 0.61fF |
| C1209 io_out[7] vdd 0.61fF |
| C1210 io_oeb[7] vdd 0.61fF |
| C1211 io_oeb[19] vdd 0.61fF |
| C1212 io_out[19] vdd 0.61fF |
| C1213 io_in[19] vdd 0.61fF |
| C1214 io_in_3v3[19] vdd 0.61fF |
| C1215 gpio_noesd[12] vdd 0.61fF |
| C1216 gpio_analog[12] vdd 0.61fF |
| C1217 gpio_analog[1] vdd 0.61fF |
| C1218 gpio_noesd[1] vdd 0.61fF |
| C1219 io_in_3v3[8] vdd 0.61fF |
| C1220 io_in[8] vdd 0.61fF |
| C1221 io_out[8] vdd 0.61fF |
| C1222 io_oeb[8] vdd 0.61fF |
| C1223 io_oeb[18] vdd 0.61fF |
| C1224 io_out[18] vdd 0.61fF |
| C1225 io_in[18] vdd 0.61fF |
| C1226 io_in_3v3[18] vdd 0.61fF |
| C1227 gpio_noesd[11] vdd 0.61fF |
| C1228 gpio_analog[11] vdd 0.61fF |
| C1229 gpio_analog[2] vdd 0.61fF |
| C1230 gpio_noesd[2] vdd 0.61fF |
| C1231 io_in_3v3[9] vdd 0.61fF |
| C1232 io_in[9] vdd 0.61fF |
| C1233 io_out[9] vdd 0.61fF |
| C1234 io_oeb[9] vdd 0.61fF |
| C1235 io_oeb[17] vdd 0.61fF |
| C1236 io_out[17] vdd 0.61fF |
| C1237 io_in[17] vdd 0.61fF |
| C1238 io_in_3v3[17] vdd 0.61fF |
| C1239 gpio_noesd[10] vdd 0.61fF |
| C1240 gpio_analog[10] vdd 0.61fF |
| C1241 gpio_analog[3] vdd 0.61fF |
| C1242 gpio_noesd[3] vdd 0.61fF |
| C1243 io_in_3v3[10] vdd 0.61fF |
| C1244 io_in[10] vdd 0.61fF |
| C1245 io_out[10] vdd 0.61fF |
| C1246 io_oeb[10] vdd 0.61fF |
| C1247 io_oeb[16] vdd 0.61fF |
| C1248 io_out[16] vdd 0.61fF |
| C1249 io_in[16] vdd 0.61fF |
| C1250 io_in_3v3[16] vdd 0.61fF |
| C1251 gpio_noesd[9] vdd 0.61fF |
| C1252 gpio_analog[9] vdd 0.61fF |
| C1253 gpio_analog[4] vdd 0.61fF |
| C1254 gpio_noesd[4] vdd 0.61fF |
| C1255 io_in_3v3[11] vdd 0.61fF |
| C1256 io_in[11] vdd 0.61fF |
| C1257 io_out[11] vdd 0.61fF |
| C1258 io_oeb[11] vdd 0.61fF |
| C1259 io_oeb[15] vdd 0.61fF |
| C1260 io_out[15] vdd 0.61fF |
| C1261 io_in[15] vdd 0.61fF |
| C1262 io_in_3v3[15] vdd 0.61fF |
| C1263 gpio_noesd[8] vdd 0.61fF |
| C1264 gpio_analog[8] vdd 0.61fF |
| C1265 gpio_analog[5] vdd 0.61fF |
| C1266 gpio_noesd[5] vdd 0.61fF |
| C1267 io_in_3v3[12] vdd 0.61fF |
| C1268 io_in[12] vdd 0.61fF |
| C1269 io_out[12] vdd 0.61fF |
| C1270 io_oeb[12] vdd 0.61fF |
| C1271 io_oeb[14] vdd 0.61fF |
| C1272 io_out[14] vdd 0.61fF |
| C1273 io_in[14] vdd 0.61fF |
| C1274 io_in_3v3[14] vdd 0.61fF |
| C1275 gpio_noesd[7] vdd 0.61fF |
| C1276 gpio_analog[7] vdd 0.61fF |
| C1277 vssa2 vdd 13.04fF |
| C1278 gpio_analog[6] vdd 0.61fF |
| C1279 gpio_noesd[6] vdd 0.61fF |
| C1280 io_in_3v3[13] vdd 0.61fF |
| C1281 io_in[13] vdd 0.61fF |
| C1282 io_out[13] vdd 0.61fF |
| C1283 io_oeb[13] vdd 0.61fF |
| C1284 vccd1 vdd 13.04fF |
| C1285 vccd2 vdd 13.04fF |
| C1286 io_analog[0] vdd 6.83fF |
| C1287 io_analog[10] vdd 6.83fF |
| C1288 io_analog[1] vdd 6.83fF |
| C1289 io_analog[2] vdd 6.83fF |
| C1290 io_analog[3] vdd 6.83fF |
| C1291 io_clamp_high[0] vdd 3.58fF |
| C1292 io_clamp_low[0] vdd 3.58fF |
| C1293 io_clamp_high[1] vdd 3.58fF |
| C1294 io_clamp_low[1] vdd 3.58fF |
| C1295 io_clamp_high[2] vdd 3.58fF |
| C1296 io_clamp_low[2] vdd 3.58fF |
| C1297 io_analog[7] vdd 6.83fF |
| C1298 io_analog[8] vdd 6.83fF |
| C1299 io_analog[9] vdd 6.83fF |
| C1300 user_irq[2] vdd 0.63fF |
| C1301 user_irq[1] vdd 0.63fF |
| C1302 user_irq[0] vdd 0.63fF |
| C1303 user_clock2 vdd 0.63fF |
| C1304 la_oenb[127] vdd 0.63fF |
| C1305 la_data_out[127] vdd 0.63fF |
| C1306 la_data_in[127] vdd 0.63fF |
| C1307 la_oenb[126] vdd 0.63fF |
| C1308 la_data_out[126] vdd 0.63fF |
| C1309 la_data_in[126] vdd 0.63fF |
| C1310 la_oenb[125] vdd 0.63fF |
| C1311 la_data_out[125] vdd 0.63fF |
| C1312 la_data_in[125] vdd 0.63fF |
| C1313 la_oenb[124] vdd 0.63fF |
| C1314 la_data_out[124] vdd 0.63fF |
| C1315 la_data_in[124] vdd 0.63fF |
| C1316 la_oenb[123] vdd 0.63fF |
| C1317 la_data_out[123] vdd 0.63fF |
| C1318 la_data_in[123] vdd 0.63fF |
| C1319 la_oenb[122] vdd 0.63fF |
| C1320 la_data_out[122] vdd 0.63fF |
| C1321 la_data_in[122] vdd 0.63fF |
| C1322 la_oenb[121] vdd 0.63fF |
| C1323 la_data_out[121] vdd 0.63fF |
| C1324 la_data_in[121] vdd 0.63fF |
| C1325 la_oenb[120] vdd 0.63fF |
| C1326 la_data_out[120] vdd 0.63fF |
| C1327 la_data_in[120] vdd 0.63fF |
| C1328 la_oenb[119] vdd 0.63fF |
| C1329 la_data_out[119] vdd 0.63fF |
| C1330 la_data_in[119] vdd 0.63fF |
| C1331 la_oenb[118] vdd 0.63fF |
| C1332 la_data_out[118] vdd 0.63fF |
| C1333 la_data_in[118] vdd 0.63fF |
| C1334 la_oenb[117] vdd 0.63fF |
| C1335 la_data_out[117] vdd 0.63fF |
| C1336 la_data_in[117] vdd 0.63fF |
| C1337 la_oenb[116] vdd 0.63fF |
| C1338 la_data_out[116] vdd 0.63fF |
| C1339 la_data_in[116] vdd 0.63fF |
| C1340 la_oenb[115] vdd 0.63fF |
| C1341 la_data_out[115] vdd 0.63fF |
| C1342 la_data_in[115] vdd 0.63fF |
| C1343 la_oenb[114] vdd 0.63fF |
| C1344 la_data_out[114] vdd 0.63fF |
| C1345 la_data_in[114] vdd 0.63fF |
| C1346 la_oenb[113] vdd 0.63fF |
| C1347 la_data_out[113] vdd 0.63fF |
| C1348 la_data_in[113] vdd 0.63fF |
| C1349 la_oenb[112] vdd 0.63fF |
| C1350 la_data_out[112] vdd 0.63fF |
| C1351 la_data_in[112] vdd 0.63fF |
| C1352 la_oenb[111] vdd 0.63fF |
| C1353 la_data_out[111] vdd 0.63fF |
| C1354 la_data_in[111] vdd 0.63fF |
| C1355 la_oenb[110] vdd 0.63fF |
| C1356 la_data_out[110] vdd 0.63fF |
| C1357 la_data_in[110] vdd 0.63fF |
| C1358 la_oenb[109] vdd 0.63fF |
| C1359 la_data_out[109] vdd 0.63fF |
| C1360 la_data_in[109] vdd 0.63fF |
| C1361 la_oenb[108] vdd 0.63fF |
| C1362 la_data_out[108] vdd 0.63fF |
| C1363 la_data_in[108] vdd 0.63fF |
| C1364 la_oenb[107] vdd 0.63fF |
| C1365 la_data_out[107] vdd 0.63fF |
| C1366 la_data_in[107] vdd 0.63fF |
| C1367 la_oenb[106] vdd 0.63fF |
| C1368 la_data_out[106] vdd 0.63fF |
| C1369 la_data_in[106] vdd 0.63fF |
| C1370 la_oenb[105] vdd 0.63fF |
| C1371 la_data_out[105] vdd 0.63fF |
| C1372 la_data_in[105] vdd 0.63fF |
| C1373 la_oenb[104] vdd 0.63fF |
| C1374 la_data_out[104] vdd 0.63fF |
| C1375 la_data_in[104] vdd 0.63fF |
| C1376 la_oenb[103] vdd 0.63fF |
| C1377 la_data_out[103] vdd 0.63fF |
| C1378 la_data_in[103] vdd 0.63fF |
| C1379 la_oenb[102] vdd 0.63fF |
| C1380 la_data_out[102] vdd 0.63fF |
| C1381 la_data_in[102] vdd 0.63fF |
| C1382 la_oenb[101] vdd 0.63fF |
| C1383 la_data_out[101] vdd 0.63fF |
| C1384 la_data_in[101] vdd 0.63fF |
| C1385 la_oenb[100] vdd 0.63fF |
| C1386 la_data_out[100] vdd 0.63fF |
| C1387 la_data_in[100] vdd 0.63fF |
| C1388 la_oenb[99] vdd 0.63fF |
| C1389 la_data_out[99] vdd 0.63fF |
| C1390 la_data_in[99] vdd 0.63fF |
| C1391 la_oenb[98] vdd 0.63fF |
| C1392 la_data_out[98] vdd 0.63fF |
| C1393 la_data_in[98] vdd 0.63fF |
| C1394 la_oenb[97] vdd 0.63fF |
| C1395 la_data_out[97] vdd 0.63fF |
| C1396 la_data_in[97] vdd 0.63fF |
| C1397 la_oenb[96] vdd 0.63fF |
| C1398 la_data_out[96] vdd 0.63fF |
| C1399 la_data_in[96] vdd 0.63fF |
| C1400 la_oenb[95] vdd 0.63fF |
| C1401 la_data_out[95] vdd 0.63fF |
| C1402 la_data_in[95] vdd 0.63fF |
| C1403 la_oenb[94] vdd 0.63fF |
| C1404 la_data_out[94] vdd 0.63fF |
| C1405 la_data_in[94] vdd 0.63fF |
| C1406 la_oenb[93] vdd 0.63fF |
| C1407 la_data_out[93] vdd 0.63fF |
| C1408 la_data_in[93] vdd 0.63fF |
| C1409 la_oenb[92] vdd 0.63fF |
| C1410 la_data_out[92] vdd 0.63fF |
| C1411 la_data_in[92] vdd 0.63fF |
| C1412 la_oenb[91] vdd 0.63fF |
| C1413 la_data_out[91] vdd 0.63fF |
| C1414 la_data_in[91] vdd 0.63fF |
| C1415 la_oenb[90] vdd 0.63fF |
| C1416 la_data_out[90] vdd 0.63fF |
| C1417 la_data_in[90] vdd 0.63fF |
| C1418 la_oenb[89] vdd 0.63fF |
| C1419 la_data_out[89] vdd 0.63fF |
| C1420 la_data_in[89] vdd 0.63fF |
| C1421 la_oenb[88] vdd 0.63fF |
| C1422 la_data_out[88] vdd 0.63fF |
| C1423 la_data_in[88] vdd 0.63fF |
| C1424 la_oenb[87] vdd 0.63fF |
| C1425 la_data_out[87] vdd 0.63fF |
| C1426 la_data_in[87] vdd 0.63fF |
| C1427 la_oenb[86] vdd 0.63fF |
| C1428 la_data_out[86] vdd 0.63fF |
| C1429 la_data_in[86] vdd 0.63fF |
| C1430 la_oenb[85] vdd 0.63fF |
| C1431 la_data_out[85] vdd 0.63fF |
| C1432 la_data_in[85] vdd 0.63fF |
| C1433 la_oenb[84] vdd 0.63fF |
| C1434 la_data_out[84] vdd 0.63fF |
| C1435 la_data_in[84] vdd 0.63fF |
| C1436 la_oenb[83] vdd 0.63fF |
| C1437 la_data_out[83] vdd 0.63fF |
| C1438 la_data_in[83] vdd 0.63fF |
| C1439 la_oenb[82] vdd 0.63fF |
| C1440 la_data_out[82] vdd 0.63fF |
| C1441 la_data_in[82] vdd 0.63fF |
| C1442 la_oenb[81] vdd 0.63fF |
| C1443 la_data_out[81] vdd 0.63fF |
| C1444 la_data_in[81] vdd 0.63fF |
| C1445 la_oenb[80] vdd 0.63fF |
| C1446 la_data_out[80] vdd 0.63fF |
| C1447 la_data_in[80] vdd 0.63fF |
| C1448 la_oenb[79] vdd 0.63fF |
| C1449 la_data_out[79] vdd 0.63fF |
| C1450 la_data_in[79] vdd 0.63fF |
| C1451 la_oenb[78] vdd 0.63fF |
| C1452 la_data_out[78] vdd 0.63fF |
| C1453 la_data_in[78] vdd 0.63fF |
| C1454 la_oenb[77] vdd 0.63fF |
| C1455 la_data_out[77] vdd 0.63fF |
| C1456 la_data_in[77] vdd 0.63fF |
| C1457 la_oenb[76] vdd 0.63fF |
| C1458 la_data_out[76] vdd 0.63fF |
| C1459 la_data_in[76] vdd 0.63fF |
| C1460 la_oenb[75] vdd 0.63fF |
| C1461 la_data_out[75] vdd 0.63fF |
| C1462 la_data_in[75] vdd 0.63fF |
| C1463 la_oenb[74] vdd 0.63fF |
| C1464 la_data_out[74] vdd 0.63fF |
| C1465 la_data_in[74] vdd 0.63fF |
| C1466 la_oenb[73] vdd 0.63fF |
| C1467 la_data_out[73] vdd 0.63fF |
| C1468 la_data_in[73] vdd 0.63fF |
| C1469 la_oenb[72] vdd 0.63fF |
| C1470 la_data_out[72] vdd 0.63fF |
| C1471 la_data_in[72] vdd 0.63fF |
| C1472 la_oenb[71] vdd 0.63fF |
| C1473 la_data_out[71] vdd 0.63fF |
| C1474 la_data_in[71] vdd 0.63fF |
| C1475 la_oenb[70] vdd 0.63fF |
| C1476 la_data_out[70] vdd 0.63fF |
| C1477 la_data_in[70] vdd 0.63fF |
| C1478 la_oenb[69] vdd 0.63fF |
| C1479 la_data_out[69] vdd 0.63fF |
| C1480 la_data_in[69] vdd 0.63fF |
| C1481 la_oenb[68] vdd 0.63fF |
| C1482 la_data_out[68] vdd 0.63fF |
| C1483 la_data_in[68] vdd 0.63fF |
| C1484 la_oenb[67] vdd 0.63fF |
| C1485 la_data_out[67] vdd 0.63fF |
| C1486 la_data_in[67] vdd 0.63fF |
| C1487 la_oenb[66] vdd 0.63fF |
| C1488 la_data_out[66] vdd 0.63fF |
| C1489 la_data_in[66] vdd 0.63fF |
| C1490 la_oenb[65] vdd 0.63fF |
| C1491 la_data_out[65] vdd 0.63fF |
| C1492 la_data_in[65] vdd 0.63fF |
| C1493 la_oenb[64] vdd 0.63fF |
| C1494 la_data_out[64] vdd 0.63fF |
| C1495 la_data_in[64] vdd 0.63fF |
| C1496 la_oenb[63] vdd 0.63fF |
| C1497 la_data_out[63] vdd 0.63fF |
| C1498 la_data_in[63] vdd 0.63fF |
| C1499 la_oenb[62] vdd 0.63fF |
| C1500 la_data_out[62] vdd 0.63fF |
| C1501 la_data_in[62] vdd 0.63fF |
| C1502 la_oenb[61] vdd 0.63fF |
| C1503 la_data_out[61] vdd 0.63fF |
| C1504 la_data_in[61] vdd 0.63fF |
| C1505 la_oenb[60] vdd 0.63fF |
| C1506 la_data_out[60] vdd 0.63fF |
| C1507 la_data_in[60] vdd 0.63fF |
| C1508 la_oenb[59] vdd 0.63fF |
| C1509 la_data_out[59] vdd 0.63fF |
| C1510 la_data_in[59] vdd 0.63fF |
| C1511 la_oenb[58] vdd 0.63fF |
| C1512 la_data_out[58] vdd 0.63fF |
| C1513 la_data_in[58] vdd 0.63fF |
| C1514 la_oenb[57] vdd 0.63fF |
| C1515 la_data_out[57] vdd 0.63fF |
| C1516 la_data_in[57] vdd 0.63fF |
| C1517 la_oenb[56] vdd 0.63fF |
| C1518 la_data_out[56] vdd 0.63fF |
| C1519 la_data_in[56] vdd 0.63fF |
| C1520 la_oenb[55] vdd 0.63fF |
| C1521 la_data_out[55] vdd 0.63fF |
| C1522 la_data_in[55] vdd 0.63fF |
| C1523 la_oenb[54] vdd 0.63fF |
| C1524 la_data_out[54] vdd 0.63fF |
| C1525 la_data_in[54] vdd 0.63fF |
| C1526 la_oenb[53] vdd 0.63fF |
| C1527 la_data_out[53] vdd 0.63fF |
| C1528 la_data_in[53] vdd 0.63fF |
| C1529 la_oenb[52] vdd 0.63fF |
| C1530 la_data_out[52] vdd 0.63fF |
| C1531 la_data_in[52] vdd 0.63fF |
| C1532 la_oenb[51] vdd 0.63fF |
| C1533 la_data_out[51] vdd 0.63fF |
| C1534 la_data_in[51] vdd 0.63fF |
| C1535 la_oenb[50] vdd 0.63fF |
| C1536 la_data_out[50] vdd 0.63fF |
| C1537 la_data_in[50] vdd 0.63fF |
| C1538 la_oenb[49] vdd 0.63fF |
| C1539 la_data_out[49] vdd 0.63fF |
| C1540 la_data_in[49] vdd 0.63fF |
| C1541 la_oenb[48] vdd 0.63fF |
| C1542 la_data_out[48] vdd 0.63fF |
| C1543 la_data_in[48] vdd 0.63fF |
| C1544 la_oenb[47] vdd 0.63fF |
| C1545 la_data_out[47] vdd 0.63fF |
| C1546 la_data_in[47] vdd 0.63fF |
| C1547 la_oenb[46] vdd 0.63fF |
| C1548 la_data_out[46] vdd 0.63fF |
| C1549 la_data_in[46] vdd 0.63fF |
| C1550 la_oenb[45] vdd 0.63fF |
| C1551 la_data_out[45] vdd 0.63fF |
| C1552 la_data_in[45] vdd 0.63fF |
| C1553 la_oenb[44] vdd 0.63fF |
| C1554 la_data_out[44] vdd 0.63fF |
| C1555 la_data_in[44] vdd 0.63fF |
| C1556 la_oenb[43] vdd 0.63fF |
| C1557 la_data_out[43] vdd 0.63fF |
| C1558 la_data_in[43] vdd 0.63fF |
| C1559 la_oenb[42] vdd 0.63fF |
| C1560 la_data_out[42] vdd 0.63fF |
| C1561 la_data_in[42] vdd 0.63fF |
| C1562 la_oenb[41] vdd 0.63fF |
| C1563 la_data_out[41] vdd 0.63fF |
| C1564 la_data_in[41] vdd 0.63fF |
| C1565 la_oenb[40] vdd 0.63fF |
| C1566 la_data_out[40] vdd 0.63fF |
| C1567 la_data_in[40] vdd 0.63fF |
| C1568 la_oenb[39] vdd 0.63fF |
| C1569 la_data_out[39] vdd 0.63fF |
| C1570 la_data_in[39] vdd 0.63fF |
| C1571 la_oenb[38] vdd 0.63fF |
| C1572 la_data_out[38] vdd 0.63fF |
| C1573 la_data_in[38] vdd 0.63fF |
| C1574 la_oenb[37] vdd 0.63fF |
| C1575 la_data_out[37] vdd 0.63fF |
| C1576 la_data_in[37] vdd 0.63fF |
| C1577 la_oenb[36] vdd 0.63fF |
| C1578 la_data_out[36] vdd 0.63fF |
| C1579 la_data_in[36] vdd 0.63fF |
| C1580 la_oenb[35] vdd 0.63fF |
| C1581 la_data_out[35] vdd 0.63fF |
| C1582 la_data_in[35] vdd 0.63fF |
| C1583 la_oenb[34] vdd 0.63fF |
| C1584 la_data_out[34] vdd 0.63fF |
| C1585 la_data_in[34] vdd 0.63fF |
| C1586 la_oenb[33] vdd 0.63fF |
| C1587 la_data_out[33] vdd 0.63fF |
| C1588 la_data_in[33] vdd 0.63fF |
| C1589 la_oenb[32] vdd 0.63fF |
| C1590 la_data_out[32] vdd 0.63fF |
| C1591 la_data_in[32] vdd 0.63fF |
| C1592 la_oenb[31] vdd 0.63fF |
| C1593 la_data_out[31] vdd 0.63fF |
| C1594 la_data_in[31] vdd 0.63fF |
| C1595 la_oenb[30] vdd 0.63fF |
| C1596 la_data_out[30] vdd 0.63fF |
| C1597 la_data_in[30] vdd 0.63fF |
| C1598 la_oenb[29] vdd 0.63fF |
| C1599 la_data_out[29] vdd 0.63fF |
| C1600 la_data_in[29] vdd 0.63fF |
| C1601 la_oenb[28] vdd 0.63fF |
| C1602 la_data_out[28] vdd 0.63fF |
| C1603 la_data_in[28] vdd 0.63fF |
| C1604 la_oenb[27] vdd 0.63fF |
| C1605 la_data_out[27] vdd 0.63fF |
| C1606 la_data_in[27] vdd 0.63fF |
| C1607 la_oenb[26] vdd 0.63fF |
| C1608 la_data_out[26] vdd 0.63fF |
| C1609 la_data_in[26] vdd 0.63fF |
| C1610 la_oenb[25] vdd 0.63fF |
| C1611 la_data_out[25] vdd 0.63fF |
| C1612 la_data_in[25] vdd 0.63fF |
| C1613 la_oenb[24] vdd 0.63fF |
| C1614 la_data_out[24] vdd 0.63fF |
| C1615 la_data_in[24] vdd 0.63fF |
| C1616 la_oenb[23] vdd 0.63fF |
| C1617 la_data_out[23] vdd 0.63fF |
| C1618 la_data_in[23] vdd 0.63fF |
| C1619 la_oenb[22] vdd 0.63fF |
| C1620 la_data_out[22] vdd 0.63fF |
| C1621 la_data_in[22] vdd 0.63fF |
| C1622 la_oenb[21] vdd 0.63fF |
| C1623 la_data_out[21] vdd 0.63fF |
| C1624 la_data_in[21] vdd 0.63fF |
| C1625 la_oenb[20] vdd 0.63fF |
| C1626 la_data_out[20] vdd 0.63fF |
| C1627 la_data_in[20] vdd 0.63fF |
| C1628 la_oenb[19] vdd 0.63fF |
| C1629 la_data_out[19] vdd 0.63fF |
| C1630 la_data_in[19] vdd 0.63fF |
| C1631 la_oenb[18] vdd 0.63fF |
| C1632 la_data_out[18] vdd 0.63fF |
| C1633 la_data_in[18] vdd 0.63fF |
| C1634 la_oenb[17] vdd 0.63fF |
| C1635 la_data_out[17] vdd 0.63fF |
| C1636 la_data_in[17] vdd 0.63fF |
| C1637 la_oenb[16] vdd 0.63fF |
| C1638 la_data_out[16] vdd 0.63fF |
| C1639 la_data_in[16] vdd 0.63fF |
| C1640 la_oenb[15] vdd 0.63fF |
| C1641 la_data_out[15] vdd 0.63fF |
| C1642 la_data_in[15] vdd 0.63fF |
| C1643 la_oenb[14] vdd 0.63fF |
| C1644 la_data_out[14] vdd 0.63fF |
| C1645 la_data_in[14] vdd 0.63fF |
| C1646 la_oenb[13] vdd 0.63fF |
| C1647 la_data_out[13] vdd 0.63fF |
| C1648 la_data_in[13] vdd 0.63fF |
| C1649 la_oenb[12] vdd 0.63fF |
| C1650 la_data_out[12] vdd 0.63fF |
| C1651 la_data_in[12] vdd 0.63fF |
| C1652 la_oenb[11] vdd 0.63fF |
| C1653 la_data_out[11] vdd 0.63fF |
| C1654 la_data_in[11] vdd 0.63fF |
| C1655 la_oenb[10] vdd 0.63fF |
| C1656 la_data_out[10] vdd 0.63fF |
| C1657 la_data_in[10] vdd 0.63fF |
| C1658 la_oenb[9] vdd 0.63fF |
| C1659 la_data_out[9] vdd 0.63fF |
| C1660 la_data_in[9] vdd 0.63fF |
| C1661 la_oenb[8] vdd 0.63fF |
| C1662 la_data_out[8] vdd 0.63fF |
| C1663 la_data_in[8] vdd 0.63fF |
| C1664 la_oenb[7] vdd 0.63fF |
| C1665 la_data_out[7] vdd 0.63fF |
| C1666 la_data_in[7] vdd 0.63fF |
| C1667 la_oenb[6] vdd 0.63fF |
| C1668 la_data_out[6] vdd 0.63fF |
| C1669 la_data_in[6] vdd 0.63fF |
| C1670 la_oenb[5] vdd 0.63fF |
| C1671 la_data_out[5] vdd 0.63fF |
| C1672 la_data_in[5] vdd 0.63fF |
| C1673 la_oenb[4] vdd 0.63fF |
| C1674 la_data_out[4] vdd 0.63fF |
| C1675 la_data_in[4] vdd 0.63fF |
| C1676 la_oenb[3] vdd 0.63fF |
| C1677 la_data_out[3] vdd 0.63fF |
| C1678 la_data_in[3] vdd 0.63fF |
| C1679 la_oenb[2] vdd 0.63fF |
| C1680 la_data_out[2] vdd 0.63fF |
| C1681 la_data_in[2] vdd 0.63fF |
| C1682 la_oenb[1] vdd 0.63fF |
| C1683 la_data_out[1] vdd 0.63fF |
| C1684 la_data_in[1] vdd 0.63fF |
| C1685 la_oenb[0] vdd 0.63fF |
| C1686 la_data_out[0] vdd 0.63fF |
| C1687 la_data_in[0] vdd 0.63fF |
| C1688 wbs_dat_o[31] vdd 0.63fF |
| C1689 wbs_dat_i[31] vdd 0.63fF |
| C1690 wbs_adr_i[31] vdd 0.63fF |
| C1691 wbs_dat_o[30] vdd 0.63fF |
| C1692 wbs_dat_i[30] vdd 0.63fF |
| C1693 wbs_adr_i[30] vdd 0.63fF |
| C1694 wbs_dat_o[29] vdd 0.63fF |
| C1695 wbs_dat_i[29] vdd 0.63fF |
| C1696 wbs_adr_i[29] vdd 0.63fF |
| C1697 wbs_dat_o[28] vdd 0.63fF |
| C1698 wbs_dat_i[28] vdd 0.63fF |
| C1699 wbs_adr_i[28] vdd 0.63fF |
| C1700 wbs_dat_o[27] vdd 0.63fF |
| C1701 wbs_dat_i[27] vdd 0.63fF |
| C1702 wbs_adr_i[27] vdd 0.63fF |
| C1703 wbs_dat_o[26] vdd 0.63fF |
| C1704 wbs_dat_i[26] vdd 0.63fF |
| C1705 wbs_adr_i[26] vdd 0.63fF |
| C1706 wbs_dat_o[25] vdd 0.63fF |
| C1707 wbs_dat_i[25] vdd 0.63fF |
| C1708 wbs_adr_i[25] vdd 0.63fF |
| C1709 wbs_dat_o[24] vdd 0.63fF |
| C1710 wbs_dat_i[24] vdd 0.63fF |
| C1711 wbs_adr_i[24] vdd 0.63fF |
| C1712 wbs_dat_o[23] vdd 0.63fF |
| C1713 wbs_dat_i[23] vdd 0.63fF |
| C1714 wbs_adr_i[23] vdd 0.63fF |
| C1715 wbs_dat_o[22] vdd 0.63fF |
| C1716 wbs_dat_i[22] vdd 0.63fF |
| C1717 wbs_adr_i[22] vdd 0.63fF |
| C1718 wbs_dat_o[21] vdd 0.63fF |
| C1719 wbs_dat_i[21] vdd 0.63fF |
| C1720 wbs_adr_i[21] vdd 0.63fF |
| C1721 wbs_dat_o[20] vdd 0.63fF |
| C1722 wbs_dat_i[20] vdd 0.63fF |
| C1723 wbs_adr_i[20] vdd 0.63fF |
| C1724 wbs_dat_o[19] vdd 0.63fF |
| C1725 wbs_dat_i[19] vdd 0.63fF |
| C1726 wbs_adr_i[19] vdd 0.63fF |
| C1727 wbs_dat_o[18] vdd 0.63fF |
| C1728 wbs_dat_i[18] vdd 0.63fF |
| C1729 wbs_adr_i[18] vdd 0.63fF |
| C1730 wbs_dat_o[17] vdd 0.63fF |
| C1731 wbs_dat_i[17] vdd 0.63fF |
| C1732 wbs_adr_i[17] vdd 0.63fF |
| C1733 wbs_dat_o[16] vdd 0.63fF |
| C1734 wbs_dat_i[16] vdd 0.63fF |
| C1735 wbs_adr_i[16] vdd 0.63fF |
| C1736 wbs_dat_o[15] vdd 0.63fF |
| C1737 wbs_dat_i[15] vdd 0.63fF |
| C1738 wbs_adr_i[15] vdd 0.63fF |
| C1739 wbs_dat_o[14] vdd 0.63fF |
| C1740 wbs_dat_i[14] vdd 0.63fF |
| C1741 wbs_adr_i[14] vdd 0.63fF |
| C1742 wbs_dat_o[13] vdd 0.63fF |
| C1743 wbs_dat_i[13] vdd 0.63fF |
| C1744 wbs_adr_i[13] vdd 0.63fF |
| C1745 wbs_dat_o[12] vdd 0.63fF |
| C1746 wbs_dat_i[12] vdd 0.63fF |
| C1747 wbs_adr_i[12] vdd 0.63fF |
| C1748 wbs_dat_o[11] vdd 0.63fF |
| C1749 wbs_dat_i[11] vdd 0.63fF |
| C1750 wbs_adr_i[11] vdd 0.63fF |
| C1751 wbs_dat_o[10] vdd 0.63fF |
| C1752 wbs_dat_i[10] vdd 0.63fF |
| C1753 wbs_adr_i[10] vdd 0.63fF |
| C1754 wbs_dat_o[9] vdd 0.63fF |
| C1755 wbs_dat_i[9] vdd 0.63fF |
| C1756 wbs_adr_i[9] vdd 0.63fF |
| C1757 wbs_dat_o[8] vdd 0.63fF |
| C1758 wbs_dat_i[8] vdd 0.63fF |
| C1759 wbs_adr_i[8] vdd 0.63fF |
| C1760 wbs_dat_o[7] vdd 0.63fF |
| C1761 wbs_dat_i[7] vdd 0.63fF |
| C1762 wbs_adr_i[7] vdd 0.63fF |
| C1763 wbs_dat_o[6] vdd 0.63fF |
| C1764 wbs_dat_i[6] vdd 0.63fF |
| C1765 wbs_adr_i[6] vdd 0.63fF |
| C1766 wbs_dat_o[5] vdd 0.63fF |
| C1767 wbs_dat_i[5] vdd 0.63fF |
| C1768 wbs_adr_i[5] vdd 0.63fF |
| C1769 wbs_dat_o[4] vdd 0.63fF |
| C1770 wbs_dat_i[4] vdd 0.63fF |
| C1771 wbs_adr_i[4] vdd 0.63fF |
| C1772 wbs_sel_i[3] vdd 0.63fF |
| C1773 wbs_dat_o[3] vdd 0.63fF |
| C1774 wbs_dat_i[3] vdd 0.63fF |
| C1775 wbs_adr_i[3] vdd 0.63fF |
| C1776 wbs_sel_i[2] vdd 0.63fF |
| C1777 wbs_dat_o[2] vdd 0.63fF |
| C1778 wbs_dat_i[2] vdd 0.63fF |
| C1779 wbs_adr_i[2] vdd 0.63fF |
| C1780 wbs_sel_i[1] vdd 0.63fF |
| C1781 wbs_dat_o[1] vdd 0.63fF |
| C1782 wbs_dat_i[1] vdd 0.63fF |
| C1783 wbs_adr_i[1] vdd 0.63fF |
| C1784 wbs_sel_i[0] vdd 0.63fF |
| C1785 wbs_dat_o[0] vdd 0.63fF |
| C1786 wbs_dat_i[0] vdd 0.63fF |
| C1787 wbs_adr_i[0] vdd 0.63fF |
| C1788 wbs_we_i vdd 0.63fF |
| C1789 wbs_stb_i vdd 0.63fF |
| C1790 wbs_cyc_i vdd 0.63fF |
| C1791 wbs_ack_o vdd 0.63fF |
| C1792 wb_rst_i vdd 0.63fF |
| C1793 wb_clk_i vdd 0.63fF |
| C1794 pll_full_0/divider_0/and_0/Z1 vdd 0.65fF |
| C1795 pll_full_0/divider_0/and_0/B vdd 2.45fF |
| C1796 pll_full_0/divider_0/and_0/A vdd 2.35fF |
| C1797 pll_full_0/divider_0/and_0/out1 vdd 2.99fF |
| C1798 pll_full_0/divider_0/tspc_2/Z4 vdd 0.86fF |
| C1799 pll_full_0/divbuf_0/IN vdd 9.95fF |
| C1800 pll_full_0/divider_0/tspc_2/Z3 vdd 2.26fF |
| C1801 pll_full_0/divider_0/tspc_2/Z2 vdd 1.46fF |
| C1802 pll_full_0/divider_0/tspc_2/Z1 vdd 0.99fF |
| C1803 pll_full_0/divider_0/nor_0/B vdd 6.48fF |
| C1804 pll_full_0/divider_0/tspc_2/a_630_n680# vdd 1.14fF **FLOATING |
| C1805 pll_full_0/divider_0/tspc_1/Z4 vdd 0.86fF |
| C1806 pll_full_0/divider_0/tspc_1/Q vdd 3.12fF |
| C1807 pll_full_0/divider_0/tspc_1/Z3 vdd 2.26fF |
| C1808 pll_full_0/divider_0/tspc_1/Z2 vdd 1.46fF |
| C1809 pll_full_0/divider_0/tspc_1/Z1 vdd 0.99fF |
| C1810 pll_full_0/divider_0/nor_1/B vdd 7.12fF |
| C1811 pll_full_0/divider_0/tspc_1/a_630_n680# vdd 1.15fF **FLOATING |
| C1812 pll_full_0/divider_0/tspc_0/Z4 vdd 0.86fF |
| C1813 pll_full_0/divider_0/tspc_0/Q vdd 3.14fF |
| C1814 pll_full_0/divider_0/tspc_0/Z3 vdd 2.26fF |
| C1815 pll_full_0/divider_0/tspc_0/Z2 vdd 1.46fF |
| C1816 pll_full_0/divider_0/tspc_0/Z1 vdd 0.99fF |
| C1817 pll_full_0/divider_0/nor_1/A vdd 7.08fF |
| C1818 pll_full_0/divider_0/tspc_0/a_630_n680# vdd 1.15fF **FLOATING |
| C1819 pll_full_0/divider_0/clk vdd 31.85fF |
| C1820 pll_full_0/divider_0/prescaler_0/Out vdd 4.59fF |
| C1821 pll_full_0/divider_0/prescaler_0/nand_1/z1 vdd 0.36fF |
| C1822 pll_full_0/divider_0/prescaler_0/tspc_2/D vdd 2.64fF |
| C1823 pll_full_0/divider_0/prescaler_0/tspc_0/Q vdd 3.64fF |
| C1824 pll_full_0/divider_0/prescaler_0/tspc_1/Q vdd 3.61fF |
| C1825 pll_full_0/divider_0/prescaler_0/nand_0/z1 vdd 0.36fF |
| C1826 pll_full_0/divider_0/prescaler_0/tspc_0/D vdd 3.12fF |
| C1827 pll_full_0/divider_0/and_0/OUT vdd 5.67fF |
| C1828 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 vdd 0.86fF |
| C1829 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 vdd 2.26fF |
| C1830 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 vdd 1.46fF |
| C1831 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 vdd 0.99fF |
| C1832 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# vdd 1.16fF **FLOATING |
| C1833 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# vdd 2.11fF **FLOATING |
| C1834 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 vdd 0.86fF |
| C1835 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 vdd 2.26fF |
| C1836 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 vdd 1.48fF |
| C1837 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 vdd 0.99fF |
| C1838 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# vdd 1.14fF **FLOATING |
| C1839 pll_full_0/divider_0/prescaler_0/m1_2700_2190# vdd 4.22fF **FLOATING |
| C1840 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 vdd 0.86fF |
| C1841 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 vdd 2.26fF |
| C1842 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 vdd 1.19fF |
| C1843 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 vdd 0.99fF |
| C1844 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# vdd 1.47fF **FLOATING |
| C1845 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# vdd 2.11fF **FLOATING |
| C1846 pll_full_0/divider_0/nor_1/Z1 vdd 1.34fF |
| C1847 pll_full_0/divider_0/nor_0/Z1 vdd 1.34fF |
| C1848 pll_full_0/divbuf_1/OUT vdd 363.82fF |
| C1849 pll_full_0/divbuf_1/OUT5 vdd 350.37fF |
| C1850 pll_full_0/divbuf_1/OUT4 vdd 133.72fF |
| C1851 pll_full_0/divbuf_1/OUT3 vdd 34.03fF |
| C1852 pll_full_0/divbuf_1/OUT2 vdd 8.71fF |
| C1853 pll_full_0/divbuf_1/a_492_n240# vdd 2.46fF **FLOATING |
| C1854 pll_full_0/divbuf_0/OUT5 vdd 350.37fF |
| C1855 pll_full_0/divbuf_0/OUT4 vdd 133.72fF |
| C1856 pll_full_0/divbuf_0/OUT3 vdd 34.03fF |
| C1857 pll_full_0/divbuf_0/OUT2 vdd 8.71fF |
| C1858 pll_full_0/divbuf_0/a_492_n240# vdd 2.46fF **FLOATING |
| C1859 pll_full_0/ro_complete_0/cbank_2/v vdd 17.88fF |
| C1860 pll_full_0/ro_complete_0/cbank_2/switch_5/vin vdd 0.78fF |
| C1861 pll_full_0/ro_complete_0/cbank_2/switch_4/vin vdd 1.50fF |
| C1862 pll_full_0/ro_complete_0/cbank_2/switch_2/vin vdd 1.30fF |
| C1863 pll_full_0/ro_complete_0/cbank_2/switch_3/vin vdd 0.56fF |
| C1864 pll_full_0/ro_complete_0/cbank_2/switch_1/vin vdd 1.14fF |
| C1865 pll_full_0/ro_complete_0/cbank_2/switch_0/vin vdd 1.02fF |
| C1866 pll_full_0/ro_complete_0/cbank_1/switch_5/vin vdd 0.78fF |
| C1867 pll_full_0/ro_complete_0/a0 vdd 7.88fF |
| C1868 pll_full_0/ro_complete_0/cbank_1/switch_4/vin vdd 1.50fF |
| C1869 pll_full_0/ro_complete_0/a1 vdd 5.39fF |
| C1870 pll_full_0/ro_complete_0/cbank_1/switch_2/vin vdd 1.30fF |
| C1871 pll_full_0/ro_complete_0/a3 vdd 6.85fF |
| C1872 pll_full_0/ro_complete_0/cbank_1/switch_3/vin vdd 0.56fF |
| C1873 pll_full_0/ro_complete_0/a2 vdd 5.48fF |
| C1874 pll_full_0/ro_complete_0/cbank_1/switch_1/vin vdd 1.14fF |
| C1875 pll_full_0/ro_complete_0/a4 vdd 5.36fF |
| C1876 pll_full_0/ro_complete_0/cbank_1/switch_0/vin vdd 1.02fF |
| C1877 pll_full_0/ro_complete_0/a5 vdd 5.19fF |
| C1878 pll_full_0/ro_complete_0/cbank_0/v vdd 15.02fF |
| C1879 pll_full_0/ro_complete_0/cbank_0/switch_5/vin vdd 0.78fF |
| C1880 pll_full_0/ro_complete_0/cbank_0/switch_4/vin vdd 1.50fF |
| C1881 pll_full_0/ro_complete_0/cbank_0/switch_2/vin vdd 1.30fF |
| C1882 pll_full_0/ro_complete_0/cbank_0/switch_3/vin vdd 0.56fF |
| C1883 pll_full_0/ro_complete_0/cbank_0/switch_1/vin vdd 1.14fF |
| C1884 pll_full_0/ro_complete_0/cbank_0/switch_0/vin vdd 1.02fF |
| C1885 pll_full_0/ro_complete_0/ro_var_extend_0/vcont vdd 0.27fF |
| C1886 pll_full_0/filter_0/a_4216_n5230# vdd 419.25fF **FLOATING |
| C1887 pll_full_0/filter_0/a_4216_n2998# vdd 1.39fF **FLOATING |
| C1888 pll_full_0/cp_0/down vdd 1.54fF |
| C1889 pll_full_0/cp_0/upbar vdd 1.79fF |
| C1890 pll_full_0/cp_0/a_7110_n2840# vdd 0.17fF **FLOATING |
| C1891 pll_full_0/cp_0/a_3060_n2840# vdd 1.71fF **FLOATING |
| C1892 pll_full_0/cp_0/a_7110_0# vdd 0.17fF **FLOATING |
| C1893 pll_full_0/cp_0/a_6370_0# vdd 0.40fF **FLOATING |
| C1894 pll_full_0/cp_0/a_3060_0# vdd 2.49fF **FLOATING |
| C1895 pll_full_0/cp_0/a_1710_0# vdd 7.47fF **FLOATING |
| C1896 pll_full_0/pd_0/and_pd_0/Z1 vdd 0.39fF |
| C1897 pll_full_0/pd_0/and_pd_0/Out1 vdd 2.22fF |
| C1898 pll_full_0/pd_0/tspc_r_1/z5 vdd 1.10fF |
| C1899 pll_full_0/pd_0/tspc_r_1/Z4 vdd 1.07fF |
| C1900 pll_full_0/pd_0/tspc_r_1/Qbar vdd 0.88fF |
| C1901 pll_full_0/pd_0/tspc_r_1/Z2 vdd 1.22fF |
| C1902 pll_full_0/pd_0/tspc_r_1/Z1 vdd 0.67fF |
| C1903 pll_full_0/pd_0/UP vdd 6.61fF |
| C1904 pll_full_0/pd_0/tspc_r_1/Qbar1 vdd 1.34fF |
| C1905 pll_full_0/pd_0/tspc_r_1/Z3 vdd 2.12fF |
| C1906 pll_full_0/pd_0/REF vdd 6.44fF |
| C1907 pll_full_0/pd_0/tspc_r_0/z5 vdd 1.10fF |
| C1908 pll_full_0/pd_0/tspc_r_0/Z4 vdd 1.07fF |
| C1909 pll_full_0/pd_0/R vdd 3.05fF |
| C1910 pll_full_0/pd_0/tspc_r_0/Qbar vdd 0.79fF |
| C1911 pll_full_0/pd_0/tspc_r_0/Z2 vdd 1.22fF |
| C1912 pll_full_0/pd_0/tspc_r_0/Z1 vdd 0.67fF |
| C1913 pll_full_0/pd_0/DOWN vdd 7.24fF |
| C1914 pll_full_0/pd_0/tspc_r_0/Qbar1 vdd 1.34fF |
| C1915 pll_full_0/pd_0/tspc_r_0/Z3 vdd 2.12fF |
| C1916 pll_full_0/pd_0/DIV vdd 371.87fF |
| C1917 divider_0/and_0/Z1 vdd 0.74fF |
| C1918 divider_0/and_0/B vdd 2.25fF |
| C1919 divider_0/and_0/A vdd 2.19fF |
| C1920 divider_0/and_0/out1 vdd 2.93fF |
| C1921 divider_0/tspc_2/Z4 vdd 0.86fF |
| C1922 divider_0/Out vdd 1.60fF |
| C1923 divider_0/tspc_2/Z3 vdd 2.26fF |
| C1924 divider_0/tspc_2/Z2 vdd 1.46fF |
| C1925 divider_0/tspc_2/Z1 vdd 0.99fF |
| C1926 divider_0/nor_0/B vdd 6.33fF |
| C1927 divider_0/tspc_2/a_630_n680# vdd 1.14fF **FLOATING |
| C1928 divider_0/tspc_1/Z4 vdd 0.86fF |
| C1929 divider_0/tspc_1/Q vdd 3.12fF |
| C1930 divider_0/tspc_1/Z3 vdd 2.26fF |
| C1931 divider_0/tspc_1/Z2 vdd 1.46fF |
| C1932 divider_0/tspc_1/Z1 vdd 0.99fF |
| C1933 divider_0/nor_1/B vdd 7.05fF |
| C1934 divider_0/tspc_1/a_630_n680# vdd 1.15fF **FLOATING |
| C1935 divider_0/tspc_0/Z4 vdd 0.86fF |
| C1936 divider_0/tspc_0/Q vdd 3.14fF |
| C1937 divider_0/tspc_0/Z3 vdd 2.26fF |
| C1938 divider_0/tspc_0/Z2 vdd 1.46fF |
| C1939 divider_0/tspc_0/Z1 vdd 0.99fF |
| C1940 divider_0/nor_1/A vdd 7.04fF |
| C1941 divider_0/tspc_0/a_630_n680# vdd 1.15fF **FLOATING |
| C1942 divider_0/clk vdd 5.63fF |
| C1943 divider_0/prescaler_0/Out vdd 4.59fF |
| C1944 divider_0/prescaler_0/nand_1/z1 vdd 0.36fF |
| C1945 divider_0/prescaler_0/tspc_2/D vdd 2.64fF |
| C1946 divider_0/prescaler_0/tspc_0/Q vdd 3.64fF |
| C1947 divider_0/prescaler_0/tspc_1/Q vdd 3.61fF |
| C1948 divider_0/prescaler_0/nand_0/z1 vdd 0.36fF |
| C1949 divider_0/prescaler_0/tspc_0/D vdd 3.12fF |
| C1950 divider_0/and_0/OUT vdd 5.62fF |
| C1951 divider_0/prescaler_0/tspc_2/Z4 vdd 0.86fF |
| C1952 divider_0/prescaler_0/tspc_2/Z3 vdd 2.26fF |
| C1953 divider_0/prescaler_0/tspc_2/Z2 vdd 1.46fF |
| C1954 divider_0/prescaler_0/tspc_2/Z1 vdd 0.99fF |
| C1955 divider_0/prescaler_0/tspc_2/a_630_n680# vdd 1.16fF **FLOATING |
| C1956 divider_0/prescaler_0/tspc_2/a_740_n680# vdd 2.11fF **FLOATING |
| C1957 divider_0/prescaler_0/tspc_1/Z4 vdd 0.86fF |
| C1958 divider_0/prescaler_0/tspc_1/Z3 vdd 2.26fF |
| C1959 divider_0/prescaler_0/tspc_1/Z2 vdd 1.48fF |
| C1960 divider_0/prescaler_0/tspc_1/Z1 vdd 0.99fF |
| C1961 divider_0/prescaler_0/tspc_1/a_630_n680# vdd 1.14fF **FLOATING |
| C1962 divider_0/prescaler_0/m1_2700_2190# vdd 4.22fF **FLOATING |
| C1963 divider_0/prescaler_0/tspc_0/Z4 vdd 0.86fF |
| C1964 divider_0/prescaler_0/tspc_0/Z3 vdd 2.26fF |
| C1965 divider_0/prescaler_0/tspc_0/Z2 vdd 1.46fF |
| C1966 divider_0/prescaler_0/tspc_0/Z1 vdd 0.99fF |
| C1967 divider_0/prescaler_0/tspc_0/a_630_n680# vdd 1.14fF **FLOATING |
| C1968 divider_0/prescaler_0/tspc_0/a_740_n680# vdd 2.11fF **FLOATING |
| C1969 divider_0/nor_1/Z1 vdd 1.34fF |
| C1970 divider_0/nor_0/Z1 vdd 1.34fF |
| C1971 divider_0/mc2 vdd 5.29fF |
| C1972 divbuf_7/OUT vdd 363.82fF |
| C1973 divbuf_7/OUT5 vdd 350.37fF |
| C1974 divbuf_7/OUT4 vdd 133.72fF |
| C1975 divbuf_7/OUT3 vdd 34.03fF |
| C1976 divbuf_7/OUT2 vdd 8.71fF |
| C1977 divbuf_7/IN vdd 0.89fF |
| C1978 divbuf_7/a_492_n240# vdd 2.46fF **FLOATING |
| C1979 divbuf_6/OUT vdd 363.82fF |
| C1980 divbuf_6/OUT5 vdd 350.37fF |
| C1981 divbuf_6/OUT4 vdd 133.72fF |
| C1982 divbuf_6/OUT3 vdd 34.03fF |
| C1983 divbuf_6/OUT2 vdd 8.71fF |
| C1984 divbuf_6/IN vdd 0.89fF |
| C1985 divbuf_6/a_492_n240# vdd 2.46fF **FLOATING |
| C1986 divbuf_5/OUT vdd 363.82fF |
| C1987 divbuf_5/OUT5 vdd 350.37fF |
| C1988 divbuf_5/OUT4 vdd 133.72fF |
| C1989 divbuf_5/OUT3 vdd 34.03fF |
| C1990 divbuf_5/OUT2 vdd 8.71fF |
| C1991 divbuf_5/IN vdd 0.89fF |
| C1992 divbuf_5/a_492_n240# vdd 2.46fF **FLOATING |
| C1993 divbuf_4/OUT vdd 363.82fF |
| C1994 divbuf_4/OUT5 vdd 350.37fF |
| C1995 divbuf_4/OUT4 vdd 133.72fF |
| C1996 divbuf_4/OUT3 vdd 34.03fF |
| C1997 divbuf_4/OUT2 vdd 8.71fF |
| C1998 divbuf_4/IN vdd 0.89fF |
| C1999 divbuf_4/a_492_n240# vdd 2.46fF **FLOATING |
| C2000 divbuf_3/OUT vdd 363.82fF |
| C2001 divbuf_3/OUT5 vdd 350.37fF |
| C2002 divbuf_3/OUT4 vdd 133.72fF |
| C2003 divbuf_3/OUT3 vdd 34.03fF |
| C2004 divbuf_3/OUT2 vdd 8.71fF |
| C2005 divbuf_3/IN vdd 0.89fF |
| C2006 divbuf_3/a_492_n240# vdd 2.46fF **FLOATING |
| C2007 divbuf_2/OUT vdd 363.82fF |
| C2008 divbuf_2/OUT5 vdd 350.37fF |
| C2009 divbuf_2/OUT4 vdd 133.72fF |
| C2010 divbuf_2/OUT3 vdd 34.03fF |
| C2011 divbuf_2/OUT2 vdd 8.71fF |
| C2012 divbuf_2/IN vdd 0.89fF |
| C2013 divbuf_2/a_492_n240# vdd 2.46fF **FLOATING |
| C2014 divbuf_1/OUT vdd 363.82fF |
| C2015 divbuf_1/OUT5 vdd 350.37fF |
| C2016 divbuf_1/OUT4 vdd 133.72fF |
| C2017 divbuf_1/OUT3 vdd 34.03fF |
| C2018 divbuf_1/OUT2 vdd 8.71fF |
| C2019 divbuf_1/IN vdd 0.89fF |
| C2020 divbuf_1/a_492_n240# vdd 2.46fF **FLOATING |
| C2021 divbuf_0/OUT vdd 363.82fF |
| C2022 divbuf_0/OUT5 vdd 350.37fF |
| C2023 divbuf_0/OUT4 vdd 133.72fF |
| C2024 divbuf_0/OUT3 vdd 34.03fF |
| C2025 divbuf_0/OUT2 vdd 8.71fF |
| C2026 divbuf_0/IN vdd 0.89fF |
| C2027 divbuf_0/a_492_n240# vdd 2.46fF **FLOATING |
| C2028 ro_complete_0/cbank_2/v vdd 17.84fF |
| C2029 ro_complete_0/cbank_2/switch_5/vin vdd 0.78fF |
| C2030 ro_complete_0/cbank_2/switch_4/vin vdd 1.50fF |
| C2031 ro_complete_0/cbank_2/switch_2/vin vdd 1.30fF |
| C2032 ro_complete_0/cbank_2/switch_3/vin vdd 0.56fF |
| C2033 ro_complete_0/cbank_2/switch_1/vin vdd 1.14fF |
| C2034 ro_complete_0/cbank_2/switch_0/vin vdd 1.02fF |
| C2035 ro_complete_0/cbank_1/v vdd 16.34fF |
| C2036 ro_complete_0/cbank_1/switch_5/vin vdd 0.78fF |
| C2037 ro_complete_0/a0 vdd 7.88fF |
| C2038 ro_complete_0/cbank_1/switch_4/vin vdd 1.50fF |
| C2039 ro_complete_0/a1 vdd 5.39fF |
| C2040 ro_complete_0/cbank_1/switch_2/vin vdd 1.30fF |
| C2041 ro_complete_0/a3 vdd 6.85fF |
| C2042 ro_complete_0/cbank_1/switch_3/vin vdd 0.56fF |
| C2043 ro_complete_0/a2 vdd 5.48fF |
| C2044 ro_complete_0/cbank_1/switch_1/vin vdd 1.14fF |
| C2045 ro_complete_0/a4 vdd 5.36fF |
| C2046 ro_complete_0/cbank_1/switch_0/vin vdd 1.02fF |
| C2047 ro_complete_0/a5 vdd 5.19fF |
| C2048 ro_complete_0/cbank_0/v vdd 14.98fF |
| C2049 ro_complete_0/cbank_0/switch_5/vin vdd 0.78fF |
| C2050 ro_complete_0/cbank_0/switch_4/vin vdd 1.50fF |
| C2051 ro_complete_0/cbank_0/switch_2/vin vdd 1.30fF |
| C2052 ro_complete_0/cbank_0/switch_3/vin vdd 0.56fF |
| C2053 ro_complete_0/cbank_0/switch_1/vin vdd 1.14fF |
| C2054 ro_complete_0/cbank_0/switch_0/vin vdd 1.02fF |
| C2055 ro_complete_0/ro_var_extend_0/vcont vdd 0.27fF |
| C2056 filter_0/v vdd 85.69fF |
| C2057 filter_0/a_4216_n5230# vdd 418.47fF **FLOATING |
| C2058 filter_0/a_4216_n2998# vdd 1.03fF **FLOATING |
| C2059 cp_0/down vdd 1.54fF |
| C2060 cp_0/vbias vdd 2.41fF |
| C2061 cp_0/out vdd 5.26fF |
| C2062 cp_0/upbar vdd 1.50fF |
| C2063 cp_0/a_7110_n2840# vdd 0.17fF **FLOATING |
| C2064 cp_0/a_3060_n2840# vdd 1.71fF **FLOATING |
| C2065 cp_0/a_7110_0# vdd 0.17fF **FLOATING |
| C2066 cp_0/a_6370_0# vdd 0.40fF **FLOATING |
| C2067 cp_0/a_3060_0# vdd 1.65fF **FLOATING |
| C2068 cp_0/a_1710_0# vdd 5.76fF **FLOATING |
| C2069 cp_0/a_1710_n2840# vdd 4.89fF **FLOATING |
| C2070 cp_0/a_10_n50# vdd 2.96fF **FLOATING |
| C2071 ro_div_new_0/divider_0/and_0/Z1 vdd 0.74fF |
| C2072 ro_div_new_0/divider_0/and_0/B vdd 2.25fF |
| C2073 ro_div_new_0/divider_0/and_0/A vdd 2.19fF |
| C2074 ro_div_new_0/divider_0/and_0/out1 vdd 2.93fF |
| C2075 ro_div_new_0/divider_0/tspc_2/Z4 vdd 0.86fF |
| C2076 ro_div_new_0/divider_0/Out vdd 1.60fF |
| C2077 ro_div_new_0/divider_0/tspc_2/Z3 vdd 2.26fF |
| C2078 ro_div_new_0/divider_0/tspc_2/Z2 vdd 1.46fF |
| C2079 ro_div_new_0/divider_0/tspc_2/Z1 vdd 0.99fF |
| C2080 ro_div_new_0/divider_0/nor_0/B vdd 6.33fF |
| C2081 ro_div_new_0/divider_0/tspc_2/a_630_n680# vdd 1.14fF **FLOATING |
| C2082 ro_div_new_0/divider_0/tspc_1/Z4 vdd 0.86fF |
| C2083 ro_div_new_0/divider_0/tspc_1/Q vdd 3.12fF |
| C2084 ro_div_new_0/divider_0/tspc_1/Z3 vdd 2.26fF |
| C2085 ro_div_new_0/divider_0/tspc_1/Z2 vdd 1.46fF |
| C2086 ro_div_new_0/divider_0/tspc_1/Z1 vdd 0.99fF |
| C2087 ro_div_new_0/divider_0/nor_1/B vdd 7.05fF |
| C2088 ro_div_new_0/divider_0/tspc_1/a_630_n680# vdd 1.15fF **FLOATING |
| C2089 ro_div_new_0/divider_0/tspc_0/Z4 vdd 0.86fF |
| C2090 ro_div_new_0/divider_0/tspc_0/Q vdd 3.14fF |
| C2091 ro_div_new_0/divider_0/tspc_0/Z3 vdd 2.26fF |
| C2092 ro_div_new_0/divider_0/tspc_0/Z2 vdd 1.46fF |
| C2093 ro_div_new_0/divider_0/tspc_0/Z1 vdd 0.99fF |
| C2094 ro_div_new_0/divider_0/nor_1/A vdd 7.04fF |
| C2095 ro_div_new_0/divider_0/tspc_0/a_630_n680# vdd 1.15fF **FLOATING |
| C2096 ro_div_new_0/divider_0/clk vdd 23.62fF |
| C2097 ro_div_new_0/divider_0/prescaler_0/Out vdd 4.59fF |
| C2098 ro_div_new_0/divider_0/prescaler_0/nand_1/z1 vdd 0.36fF |
| C2099 ro_div_new_0/divider_0/prescaler_0/tspc_2/D vdd 2.64fF |
| C2100 ro_div_new_0/divider_0/prescaler_0/tspc_0/Q vdd 3.64fF |
| C2101 ro_div_new_0/divider_0/prescaler_0/tspc_1/Q vdd 3.61fF |
| C2102 ro_div_new_0/divider_0/prescaler_0/nand_0/z1 vdd 0.36fF |
| C2103 ro_div_new_0/divider_0/prescaler_0/tspc_0/D vdd 3.12fF |
| C2104 ro_div_new_0/divider_0/and_0/OUT vdd 5.62fF |
| C2105 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z4 vdd 0.86fF |
| C2106 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z3 vdd 2.26fF |
| C2107 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z2 vdd 1.46fF |
| C2108 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z1 vdd 0.99fF |
| C2109 ro_div_new_0/divider_0/prescaler_0/tspc_2/a_630_n680# vdd 1.16fF **FLOATING |
| C2110 ro_div_new_0/divider_0/prescaler_0/tspc_2/a_740_n680# vdd 2.11fF **FLOATING |
| C2111 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z4 vdd 0.86fF |
| C2112 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z3 vdd 2.26fF |
| C2113 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z2 vdd 1.48fF |
| C2114 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z1 vdd 0.99fF |
| C2115 ro_div_new_0/divider_0/prescaler_0/tspc_1/a_630_n680# vdd 1.14fF **FLOATING |
| C2116 ro_div_new_0/divider_0/prescaler_0/m1_2700_2190# vdd 4.22fF **FLOATING |
| C2117 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z4 vdd 0.86fF |
| C2118 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z3 vdd 2.26fF |
| C2119 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z2 vdd 1.46fF |
| C2120 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z1 vdd 0.99fF |
| C2121 ro_div_new_0/divider_0/prescaler_0/tspc_0/a_630_n680# vdd 1.14fF **FLOATING |
| C2122 ro_div_new_0/divider_0/prescaler_0/tspc_0/a_740_n680# vdd 2.11fF **FLOATING |
| C2123 ro_div_new_0/divider_0/nor_1/Z1 vdd 1.34fF |
| C2124 ro_div_new_0/divider_0/nor_0/Z1 vdd 1.34fF |
| C2125 ro_div_new_0/divider_0/mc2 vdd 5.29fF |
| C2126 ro_div_new_0/ro_complete_0/cbank_2/v vdd 17.84fF |
| C2127 ro_div_new_0/ro_complete_0/cbank_2/switch_5/vin vdd 0.78fF |
| C2128 ro_div_new_0/ro_complete_0/cbank_2/switch_4/vin vdd 1.50fF |
| C2129 ro_div_new_0/ro_complete_0/cbank_2/switch_2/vin vdd 1.30fF |
| C2130 ro_div_new_0/ro_complete_0/cbank_2/switch_3/vin vdd 0.56fF |
| C2131 ro_div_new_0/ro_complete_0/cbank_2/switch_1/vin vdd 1.14fF |
| C2132 ro_div_new_0/ro_complete_0/cbank_2/switch_0/vin vdd 1.02fF |
| C2133 ro_div_new_0/ro_complete_0/cbank_1/switch_5/vin vdd 0.78fF |
| C2134 ro_div_new_0/ro_complete_0/a0 vdd 7.88fF |
| C2135 ro_div_new_0/ro_complete_0/cbank_1/switch_4/vin vdd 1.50fF |
| C2136 ro_div_new_0/ro_complete_0/a1 vdd 5.39fF |
| C2137 ro_div_new_0/ro_complete_0/cbank_1/switch_2/vin vdd 1.30fF |
| C2138 ro_div_new_0/ro_complete_0/a3 vdd 6.85fF |
| C2139 ro_div_new_0/ro_complete_0/cbank_1/switch_3/vin vdd 0.56fF |
| C2140 ro_div_new_0/ro_complete_0/a2 vdd 5.48fF |
| C2141 ro_div_new_0/ro_complete_0/cbank_1/switch_1/vin vdd 1.14fF |
| C2142 ro_div_new_0/ro_complete_0/a4 vdd 5.36fF |
| C2143 ro_div_new_0/ro_complete_0/cbank_1/switch_0/vin vdd 1.02fF |
| C2144 ro_div_new_0/ro_complete_0/a5 vdd 5.19fF |
| C2145 ro_div_new_0/ro_complete_0/cbank_0/v vdd 14.98fF |
| C2146 ro_div_new_0/ro_complete_0/cbank_0/switch_5/vin vdd 0.78fF |
| C2147 ro_div_new_0/ro_complete_0/cbank_0/switch_4/vin vdd 1.50fF |
| C2148 ro_div_new_0/ro_complete_0/cbank_0/switch_2/vin vdd 1.30fF |
| C2149 ro_div_new_0/ro_complete_0/cbank_0/switch_3/vin vdd 0.56fF |
| C2150 ro_div_new_0/ro_complete_0/cbank_0/switch_1/vin vdd 1.14fF |
| C2151 ro_div_new_0/ro_complete_0/cbank_0/switch_0/vin vdd 1.02fF |
| C2152 ro_div_new_0/ro_complete_0/ro_var_extend_0/vcont vdd 0.27fF |
| C2153 pd_0/and_pd_0/Z1 vdd 0.39fF |
| C2154 pd_0/and_pd_0/Out1 vdd 2.22fF |
| C2155 pd_0/tspc_r_1/z5 vdd 1.10fF |
| C2156 pd_0/tspc_r_1/Z4 vdd 1.07fF |
| C2157 pd_0/tspc_r_1/Qbar vdd 0.88fF |
| C2158 pd_0/tspc_r_1/Z2 vdd 1.22fF |
| C2159 pd_0/tspc_r_1/Z1 vdd 0.67fF |
| C2160 pd_0/UP vdd 2.21fF |
| C2161 pd_0/tspc_r_1/Qbar1 vdd 1.34fF |
| C2162 pd_0/tspc_r_1/Z3 vdd 2.12fF |
| C2163 pd_0/REF vdd 1.80fF |
| C2164 pd_0/tspc_r_0/z5 vdd 1.10fF |
| C2165 pd_0/tspc_r_0/Z4 vdd 1.07fF |
| C2166 pd_0/R vdd 3.05fF |
| C2167 pd_0/tspc_r_0/Qbar vdd 0.79fF |
| C2168 pd_0/tspc_r_0/Z2 vdd 1.22fF |
| C2169 pd_0/tspc_r_0/Z1 vdd 0.67fF |
| C2170 pd_0/DOWN vdd 3.08fF |
| C2171 pd_0/tspc_r_0/Qbar1 vdd 1.34fF |
| C2172 pd_0/tspc_r_0/Z3 vdd 2.12fF |
| C2173 pd_0/DIV vdd 1.82fF |
| .ends |
