| commit | 97aab0a11c295072995dd29b8e5369e60da18bda | [log] [tgz] |
|---|---|---|
| author | Matt Venn <matt@mattvenn.net> | Thu Mar 17 14:23:09 2022 +0100 |
| committer | Matt Venn <matt@mattvenn.net> | Thu Mar 17 14:23:09 2022 +0100 |
| tree | 50cca5b33e4ebf85fdd9f140540515f9c2cb141c | |
| parent | c572d74e91a8f5be06557f27319cc012fdb5f99f [diff] |
re-harden with all timing files
This ASIC was designed by members of the Zero to ASIC course.
This submission was configured and built by the multi project tools at commit 22354619088f952543fa3fd62f8da4fa29b5e751.
# clone all repos, and include support for shared OpenRAM ./multi_tool.py --clone-repos --clone-shared-repos --create-openlane-config --copy-gds --copy-project --openram # run all the tests ./multi_tool.py --test-all --force-delete # build user project wrapper submission cd $CARAVEL_ROOT; make user_project_wrapper # create docs ./multi_tool.py --generate-doc --annotate-image
