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foss-eda-tools / third_party / shuttle / sky130 / mpw-004 / slot-034 / e80cff2ad00443b9b8e7c45c4da26d74e813342e^! / .
commite80cff2ad00443b9b8e7c45c4da26d74e813342e[log] [tgz]
authorEgor Lukyanchenko <egor@bush.lan>Fri Dec 31 02:08:42 2021 +0300
committerEgor Lukyanchenko <egor@bush.lan>Fri Dec 31 02:08:42 2021 +0300
treeadb26c9de1aa2e9b9923b089f310c378e1caf82e
parent2568028f73ea84c5e238014e6cfb888e2e78d43a [diff]
Updated GDS with increased li1 density margin. Add SDC constraints.

diff --git a/gds/user_project_wrapper.gds.gz b/gds/user_project_wrapper.gds.gz
index eb8508b..4cdd692 100644
--- a/gds/user_project_wrapper.gds.gz
+++ b/gds/user_project_wrapper.gds.gz
Binary files differ

diff --git a/lef/user_project_wrapper.lef b/lef/user_project_wrapper.lef
index 0bd209a..d048acc 100644
--- a/lef/user_project_wrapper.lef
+++ b/lef/user_project_wrapper.lef

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       LAYER met3 ;
         RECT 2.400 3487.700 2917.600 3508.965 ;
         RECT 2.800 3487.020 2917.600 3487.700 ;
@@ -9259,7 +9235,7 @@
         RECT 2.400 33.300 2917.200 33.980 ;
         RECT 2.800 31.980 2917.200 33.300 ;
         RECT 2.800 31.300 2917.600 31.980 ;
-        RECT 2.400 5.615 2917.600 31.300 ;
+        RECT 2.400 0.175 2917.600 31.300 ;
       LAYER met4 ;
         RECT -43.630 -38.270 -40.530 3557.950 ;
         RECT -38.830 -33.470 -35.730 3553.150 ;
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diff --git a/mag/user_project_wrapper.mag.gz b/mag/user_project_wrapper.mag.gz
index 4d753d4..459e4ba 100644
--- a/mag/user_project_wrapper.mag.gz
+++ b/mag/user_project_wrapper.mag.gz
Binary files differ

diff --git a/openlane/config.tcl b/openlane/config.tcl
index 518fff2..f1b7fd1 100644
--- a/openlane/config.tcl
+++ b/openlane/config.tcl

@@ -11,19 +11,23 @@
 set ::env(PL_MAX_DISPLACEMENT_X) 3000
 set ::env(PL_MAX_DISPLACEMENT_Y) 1000
 set ::env(FP_PDN_VOFFSET) 40
-set ::env(FP_PDN_HOFFSET) 50
+set ::env(FP_PDN_HOFFSET) 40
 set ::env(FP_PDN_VPITCH) 70.0
-set ::env(FP_PDN_HPITCH) 70.0
+set ::env(FP_PDN_HPITCH) 75.0
 set ::env(FP_PDN_AUTO_ADJUST) 0
 set ::env(FP_PDN_IRDROP) 0
 set ::env(PL_TIME_DRIVEN) 1
-set ::env(PL_TARGET_DENSITY) 0.38
+set ::env(PL_TARGET_DENSITY) 0.35
 set ::env(DIODE_INSERTION_STRATEGY) 0
-set ::env(FP_HORIZONTAL_HALO) 20
+set ::env(FP_HORIZONTAL_HALO) 25
 set ::env(PL_RESIZER_MAX_WIRE_LENGTH) 2000.0
 set ::env(PL_RESIZER_ALLOW_SETUP_VIOS) 1
+set ::env(PL_RESIZER_HOLD_SLACK_MARGIN) 0.5
 set ::env(GLB_RESIZER_ALLOW_SETUP_VIOS) 1
 set ::env(GLB_RESIZER_TIMING_OPTIMIZATIONS) 0
+set ::env(GLB_RT_ADJUSTMENT) 0.2
+set ::env(GLB_RT_L2_ADJUSTMENT) 0.9
+set ::env(GLB_RT_L3_ADJUSTMENT) 0.7
 set ::env(FP_PDN_MACRO_HOOKS) "fpga_struct_block vccd1 vssd1"
 set ::env(PDN_NO_STRIPE_DOMAINS) [list {vccd2} {vdda1} {vdda2}]
 set ::env(PDN_CFG) "/home/egor/proj/fpga/impl/open/pdn_cfg.tcl"

diff --git a/openlane/user_project_wrapper.sdc b/openlane/user_project_wrapper.sdc
new file mode 100644
index 0000000..d312df8
--- /dev/null
+++ b/openlane/user_project_wrapper.sdc

@@ -0,0 +1,3628 @@
+create_clock -name "wb_clk_i" -add -period 40 [get_ports wb_clk_i]
+create_clock -name "ariel_fpga_top_inst.config_block_clk_buf.tech_clkbuf" -add -period 1000 [get_pins ariel_fpga_top_inst.config_block_clk_buf.tech_clkbuf/X]
+create_clock -name "ariel_fpga_top_inst.config_vrnode_clk_buf.tech_clkbuf" -add -period 1000 [get_pins ariel_fpga_top_inst.config_vrnode_clk_buf.tech_clkbuf/X]
+create_clock -name "ariel_fpga_top_inst.config_hrnode_clk_buf.tech_clkbuf" -add -period 1000 [get_pins ariel_fpga_top_inst.config_hrnode_clk_buf.tech_clkbuf/X]
+
+set_units -time 1ns
+
+#set input_delay_value [expr $::env(CLOCK_PERIOD) * $::env(IO_PCT)]
+#set output_delay_value [expr $::env(CLOCK_PERIOD) * $::env(IO_PCT)]
+#puts "\[INFO\]: Setting output delay to: $output_delay_value"
+#puts "\[INFO\]: Setting input delay to: $input_delay_value"
+
+set_max_fanout $::env(SYNTH_MAX_FANOUT) [current_design]
+
+if {[info exists CLOCK_PORT]} {
+    set clk_indx [lsearch [all_inputs] [get_port $::env(CLOCK_PORT)]]
+    #set rst_indx [lsearch [all_inputs] [get_port resetn]]
+    set all_inputs_wo_clk [lreplace [all_inputs] $clk_indx $clk_indx]
+    #set all_inputs_wo_clk_rst [lreplace $all_inputs_wo_clk $rst_indx $rst_indx]
+    set all_inputs_wo_clk_rst $all_inputs_wo_clk
+    puts "\[INFO\]: Setting clock uncertainity to: $::env(SYNTH_CLOCK_UNCERTAINITY)"
+    set_clock_uncertainty $::env(SYNTH_CLOCK_UNCERTAINITY) [get_clocks $::env(CLOCK_PORT)]
+}
+
+# TODO set this as parameter
+set_driving_cell -lib_cell $::env(SYNTH_DRIVING_CELL) -pin $::env(SYNTH_DRIVING_CELL_PIN) [all_inputs]
+set cap_load [expr $::env(SYNTH_CAP_LOAD) / 1000.0]
+puts "\[INFO\]: Setting load to: $cap_load"
+set_load  $cap_load [all_outputs]
+
+puts "\[INFO\]: Setting clock transition to: $::env(SYNTH_CLOCK_TRANSITION)"
+#set_clock_transition $::env(SYNTH_CLOCK_TRANSITION) [get_clocks $::env(CLOCK_PORT)]
+
+puts "\[INFO\]: Setting timing derate to: [expr {$::env(SYNTH_TIMING_DERATE) * 10}] %"
+set_timing_derate -early [expr {1-$::env(SYNTH_TIMING_DERATE)}]
+set_timing_derate -late [expr {1+$::env(SYNTH_TIMING_DERATE)}]
+
+
+# Disable all cross-clocking paths
+set_false_path -from [get_clocks wb_clk_i] -to [get_clocks ariel_fpga_top_inst.config_block_clk_buf.tech_clkbuf] 
+set_false_path -from [get_clocks wb_clk_i] -to [get_clocks ariel_fpga_top_inst.config_vrnode_clk_buf.tech_clkbuf] 
+set_false_path -from [get_clocks wb_clk_i] -to [get_clocks ariel_fpga_top_inst.config_hrnode_clk_buf.tech_clkbuf] 
+set_false_path -from [get_clocks ariel_fpga_top_inst.config_block_clk_buf.tech_clkbuf] -to [get_clocks wb_clk_i] 
+set_false_path -from [get_clocks ariel_fpga_top_inst.config_block_clk_buf.tech_clkbuf] -to [get_clocks ariel_fpga_top_inst.config_vrnode_clk_buf.tech_clkbuf] 
+set_false_path -from [get_clocks ariel_fpga_top_inst.config_block_clk_buf.tech_clkbuf] -to [get_clocks ariel_fpga_top_inst.config_hrnode_clk_buf.tech_clkbuf] 
+set_false_path -from [get_clocks ariel_fpga_top_inst.config_vrnode_clk_buf.tech_clkbuf] -to [get_clocks wb_clk_i] 
+set_false_path -from [get_clocks ariel_fpga_top_inst.config_vrnode_clk_buf.tech_clkbuf] -to [get_clocks ariel_fpga_top_inst.config_block_clk_buf.tech_clkbuf] 
+set_false_path -from [get_clocks ariel_fpga_top_inst.config_vrnode_clk_buf.tech_clkbuf] -to [get_clocks ariel_fpga_top_inst.config_hrnode_clk_buf.tech_clkbuf] 
+set_false_path -from [get_clocks ariel_fpga_top_inst.config_hrnode_clk_buf.tech_clkbuf] -to [get_clocks wb_clk_i] 
+set_false_path -from [get_clocks ariel_fpga_top_inst.config_hrnode_clk_buf.tech_clkbuf] -to [get_clocks ariel_fpga_top_inst.config_block_clk_buf.tech_clkbuf] 
+set_false_path -from [get_clocks ariel_fpga_top_inst.config_hrnode_clk_buf.tech_clkbuf] -to [get_clocks ariel_fpga_top_inst.config_vrnode_clk_buf.tech_clkbuf] 
+
+set BUFIPIN [lindex [lreverse [split [lindex [get_name [lindex [get_pin -hier *tech_buf/*] 0]] 0] /]] 0]
+set BUFOPIN [lindex [lreverse [split [lindex [get_name [lindex [get_pin -hier *tech_buf/*] 1]] 0] /]] 0]
+set_disable_timing [get_cells *loop_breaker*]
+
+# Routing node <-> LB constraints
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:1.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:1.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:1.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:1.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:1.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:1.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:1.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:1.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:1.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:1.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:1.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:1.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:1.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:1.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:1.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:1.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:1.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:1.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:1.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:1.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:1.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:1.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:1.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:1.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:1.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:1.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:1.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:1.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:2.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:2.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:2.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:2.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:2.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:2.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:2.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:2.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:2.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:2.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:2.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:2.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:2.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:2.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:2.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:2.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:2.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:2.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:2.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:2.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:2.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:2.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:2.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:2.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:3.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:3.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:3.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:3.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:3.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:3.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:3.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:3.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:3.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:3.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:3.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:3.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:3.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:3.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:3.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:3.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:3.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:3.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:3.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:3.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:3.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:3.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:3.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:3.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:4.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:4.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:4.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:4.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:4.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:4.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:4.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:4.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:4.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:4.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:4.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:4.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:4.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:4.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:4.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:4.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:4.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:4.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:4.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:4.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:4.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:4.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:4.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:4.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:5.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:5.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:5.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:5.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:5.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:5.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:5.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:5.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:5.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:5.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:5.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:5.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:5.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:5.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:5.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:5.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:5.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:5.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:5.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:5.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:5.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:5.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:5.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:5.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:6.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:6.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:6.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:6.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:6.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:6.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:6.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:6.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:6.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:6.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:6.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:6.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:6.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:6.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:6.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:6.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:6.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:6.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:6.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:6.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:6.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:6.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:6.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:6.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:7.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:7.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:7.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:7.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:7.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:7.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:7.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:7.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:7.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:7.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:7.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:7.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:7.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:7.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:7.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:7.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:7.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:7.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:7.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:7.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:7.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:7.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:7.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:7.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:8.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:8.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:8.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:8.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:8.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:8.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:8.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:8.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:8.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:8.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:8.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:8.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:8.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:8.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:8.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:8.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:8.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:8.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:8.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:8.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:8.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:8.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:8.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:8.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:9.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:9.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:9.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:9.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:9.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:9.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:9.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:9.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:9.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:9.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:9.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:9.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:9.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:9.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:9.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:9.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:9.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:9.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:9.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:9.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:9.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:9.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:9.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:9.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:10.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:10.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:10.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:10.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:10.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:10.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:10.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:10.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:10.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:10.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:10.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:10.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:10.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:10.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:10.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:10.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:10.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:10.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:10.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:10.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:10.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:10.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:10.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:10.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:11.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:11.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:11.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:11.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:11.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:11.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:11.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:11.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:12.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:11.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:11.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:12.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:11.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:11.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:11.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:11.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:11.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:11.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:11.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:11.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:11.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:11.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:12.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:11.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:11.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:12.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:11.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:1.struct_blocks_y:11.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:1.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:1.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:1.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:1.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:1.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:1.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:1.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:1.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:1.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:1.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:1.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:1.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:1.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:1.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:1.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:1.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:1.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:1.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:1.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:1.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:1.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:1.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:1.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:1.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:1.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:1.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:1.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:1.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:2.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:2.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:2.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:2.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:2.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:2.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:2.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:2.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:2.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:2.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:2.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:2.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:2.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:2.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:2.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:2.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:2.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:2.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:2.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:2.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:2.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:2.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:2.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:2.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:3.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:3.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:3.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:3.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:3.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:3.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:3.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:3.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:3.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:3.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:3.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:3.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:3.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:3.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:3.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:3.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:3.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:3.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:3.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:3.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:3.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:3.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:3.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:3.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:4.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:4.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:4.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:4.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:4.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:4.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:4.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:4.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:4.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:4.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:4.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:4.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:4.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:4.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:4.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:4.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:4.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:4.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:4.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:4.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:4.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:4.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:4.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:4.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:5.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:5.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:5.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:5.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:5.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:5.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:5.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:5.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:5.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:5.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:5.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:5.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:5.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:5.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:5.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:5.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:5.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:5.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:5.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:5.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:5.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:5.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:5.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:5.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:6.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:6.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:6.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:6.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:6.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:6.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:6.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:6.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:6.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:6.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:6.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:6.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:6.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:6.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:6.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:6.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:6.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:6.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:6.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:6.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:6.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:6.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:6.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:6.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:7.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:7.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:7.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:7.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:7.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:7.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:7.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:7.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:7.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:7.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:7.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:7.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:7.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:7.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:7.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:7.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:7.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:7.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:7.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:7.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:7.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:7.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:7.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:7.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:8.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:8.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:8.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:8.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:8.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:8.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:8.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:8.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:8.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:8.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:8.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:8.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:8.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:8.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:8.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:8.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:8.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:8.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:8.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:8.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:8.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:8.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:8.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:8.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:9.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:9.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:9.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:9.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:9.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:9.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:9.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:9.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:9.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:9.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:9.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:9.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:9.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:9.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:9.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:9.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:9.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:9.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:9.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:9.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:9.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:9.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:9.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:9.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:10.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:10.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:10.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:10.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:10.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:10.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:10.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:10.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:10.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:10.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:10.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:10.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:10.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:10.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:10.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:10.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:10.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:10.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:10.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:10.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:10.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:10.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:10.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:10.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:11.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:11.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:11.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:11.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:11.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:11.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:11.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:11.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:12.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:11.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:11.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:12.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:11.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:11.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:11.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:11.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:11.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:11.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:11.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:11.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:11.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:11.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:12.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:11.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:11.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:12.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:11.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:2.struct_blocks_y:11.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:1.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:1.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:1.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:1.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:1.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:1.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:1.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:1.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:1.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:1.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:1.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:1.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:1.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:1.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:1.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:1.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:1.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:1.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:1.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:1.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:1.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:1.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:1.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:1.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:1.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:1.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:1.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:1.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:2.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:2.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:2.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:2.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:2.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:2.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:2.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:2.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:2.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:2.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:2.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:2.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:2.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:2.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:2.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:2.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:2.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:2.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:2.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:2.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:2.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:2.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:2.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:2.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:3.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:3.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:3.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:3.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:3.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:3.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:3.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:3.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:3.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:3.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:3.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:3.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:3.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:3.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:3.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:3.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:3.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:3.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:3.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:3.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:3.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:3.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:3.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:3.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:4.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:4.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:4.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:4.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:4.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:4.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:4.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:4.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:4.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:4.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:4.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:4.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:4.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:4.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:4.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:4.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:4.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:4.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:4.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:4.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:4.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:4.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:4.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:4.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:5.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:5.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:5.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:5.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:5.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:5.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:5.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:5.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:5.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:5.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:5.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:5.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:5.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:5.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:5.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:5.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:5.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:5.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:5.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:5.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:5.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:5.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:5.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:5.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:6.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:6.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:6.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:6.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:6.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:6.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:6.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:6.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:6.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:6.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:6.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:6.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:6.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:6.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:6.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:6.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:6.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:6.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:6.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:6.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:6.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:6.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:6.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:6.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:7.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:7.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:7.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:7.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:7.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:7.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:7.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:7.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:7.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:7.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:7.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:7.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:7.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:7.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:7.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:7.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:7.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:7.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:7.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:7.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:7.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:7.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:7.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:7.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:8.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:8.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:8.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:8.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:8.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:8.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:8.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:8.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:8.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:8.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:8.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:8.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:8.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:8.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:8.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:8.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:8.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:8.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:8.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:8.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:8.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:8.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:8.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:8.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:9.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:9.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:9.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:9.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:9.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:9.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:9.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:9.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:9.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:9.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:9.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:9.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:9.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:9.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:9.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:9.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:9.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:9.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:9.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:9.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:9.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:9.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:9.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:9.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:10.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:10.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:10.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:10.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:10.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:10.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:10.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:10.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:10.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:10.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:10.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:10.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:10.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:10.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:10.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:10.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:10.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:10.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:10.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:10.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:10.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:10.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:10.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:10.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:11.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:11.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:11.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:11.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:11.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:11.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:11.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:11.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:12.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:11.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:11.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:12.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:11.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:11.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:11.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:11.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:11.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:11.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:11.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:11.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:11.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:11.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:12.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:11.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:11.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:12.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:11.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:3.struct_blocks_y:11.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:1.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:1.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:1.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:1.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:1.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:1.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:1.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:1.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:1.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:1.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:1.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:1.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:1.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:1.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:1.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:1.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:1.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:1.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:1.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:1.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:1.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:1.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:1.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:1.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:1.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:1.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:1.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:1.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:2.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:2.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:2.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:2.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:2.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:2.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:2.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:2.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:2.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:2.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:2.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:2.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:2.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:2.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:2.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:2.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:2.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:2.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:2.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:2.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:2.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:2.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:2.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:2.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:3.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:3.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:3.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:3.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:3.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:3.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:3.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:3.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:3.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:3.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:3.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:3.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:3.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:3.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:3.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:3.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:3.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:3.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:3.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:3.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:3.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:3.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:3.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:3.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:4.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:4.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:4.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:4.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:4.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:4.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:4.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:4.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:4.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:4.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:4.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:4.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:4.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:4.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:4.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:4.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:4.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:4.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:4.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:4.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:4.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:4.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:4.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:4.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:5.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:5.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:5.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:5.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:5.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:5.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:5.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:5.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:5.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:5.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:5.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:5.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:5.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:5.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:5.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:5.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:5.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:5.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:5.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:5.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:5.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:5.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:5.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:5.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:6.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:6.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:6.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:6.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:6.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:6.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:6.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:6.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:6.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:6.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:6.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:6.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:6.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:6.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:6.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:6.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:6.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:6.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:6.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:6.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:6.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:6.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:6.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:6.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:7.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:7.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:7.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:7.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:7.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:7.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:7.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:7.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:7.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:7.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:7.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:7.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:7.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:7.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:7.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:7.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:7.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:7.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:7.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:7.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:7.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:7.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:7.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:7.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:8.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:8.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:8.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:8.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:8.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:8.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:8.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:8.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:8.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:8.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:8.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:8.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:8.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:8.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:8.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:8.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:8.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:8.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:8.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:8.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:8.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:8.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:8.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:8.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:9.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:9.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:9.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:9.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:9.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:9.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:9.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:9.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:9.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:9.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:9.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:9.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:9.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:9.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:9.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:9.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:9.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:9.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:9.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:9.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:9.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:9.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:9.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:9.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:10.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:10.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:10.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:10.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:10.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:10.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:10.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:10.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:10.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:10.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:10.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:10.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:10.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:10.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:10.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:10.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:10.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:10.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:10.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:10.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:10.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:10.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:10.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:10.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:11.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:11.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:11.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:11.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:11.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:11.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:11.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:11.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:12.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:11.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:11.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:12.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:11.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:11.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:11.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:11.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:11.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:11.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:11.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:11.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:11.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:11.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:12.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:11.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:11.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:12.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:11.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:4.struct_blocks_y:11.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:1.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:1.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:1.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:1.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:1.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:1.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:1.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:1.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:1.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:1.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:1.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:1.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:1.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:1.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:1.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:1.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:1.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:1.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:1.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:1.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:1.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:1.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:1.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:1.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:1.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:1.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:1.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:1.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:2.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:2.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:2.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:2.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:2.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:2.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:2.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:2.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:2.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:2.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:2.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:2.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:2.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:2.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:2.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:2.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:2.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:2.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:2.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:2.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:2.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:2.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:2.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:2.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:3.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:3.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:3.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:3.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:3.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:3.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:3.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:3.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:3.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:3.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:3.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:3.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:3.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:3.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:3.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:3.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:3.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:3.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:3.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:3.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:3.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:3.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:3.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:3.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:4.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:4.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:4.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:4.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:4.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:4.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:4.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:4.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:4.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:4.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:4.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:4.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:4.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:4.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:4.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:4.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:4.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:4.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:4.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:4.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:4.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:4.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:4.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:4.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:5.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:5.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:5.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:5.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:5.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:5.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:5.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:5.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:5.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:5.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:5.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:5.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:5.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:5.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:5.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:5.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:5.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:5.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:5.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:5.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:5.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:5.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:5.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:5.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:6.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:6.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:6.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:6.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:6.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:6.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:6.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:6.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:6.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:6.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:6.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:6.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:6.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:6.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:6.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:6.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:6.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:6.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:6.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:6.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:6.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:6.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:6.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:6.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:7.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:7.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:7.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:7.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:7.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:7.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:7.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:7.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:7.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:7.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:7.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:7.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:7.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:7.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:7.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:7.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:7.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:7.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:7.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:7.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:7.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:7.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:7.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:7.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:8.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:8.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:8.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:8.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:8.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:8.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:8.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:8.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:8.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:8.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:8.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:8.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:8.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:8.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:8.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:8.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:8.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:8.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:8.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:8.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:8.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:8.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:8.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:8.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:9.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:9.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:9.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:9.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:9.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:9.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:9.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:9.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:9.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:9.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:9.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:9.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:9.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:9.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:9.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:9.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:9.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:9.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:9.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:9.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:9.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:9.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:9.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:9.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:10.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:10.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:10.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:10.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:10.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:10.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:10.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:10.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:10.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:10.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:10.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:10.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:10.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:10.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:10.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:10.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:10.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:10.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:10.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:10.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:10.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:10.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:10.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:10.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:11.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:11.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:11.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:11.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:11.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:11.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:11.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:11.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:12.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:11.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:11.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:12.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:11.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:11.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:11.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:11.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:11.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:11.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:11.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:11.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:11.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:11.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:12.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:11.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:11.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:12.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:11.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:5.struct_blocks_y:11.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:1.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:1.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:1.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:1.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:1.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:1.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:1.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:1.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:1.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:1.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:1.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:1.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:1.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:1.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:1.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:1.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:1.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:1.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:1.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:1.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:1.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:1.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:1.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:1.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:1.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:1.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:1.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:1.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:2.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:2.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:2.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:2.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:2.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:2.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:2.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:2.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:2.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:2.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:2.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:2.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:2.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:2.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:2.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:2.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:2.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:2.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:2.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:2.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:2.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:2.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:2.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:2.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:3.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:3.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:3.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:3.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:3.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:3.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:3.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:3.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:3.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:3.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:3.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:3.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:3.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:3.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:3.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:3.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:3.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:3.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:3.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:3.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:3.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:3.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:3.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:3.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:4.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:4.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:4.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:4.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:4.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:4.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:4.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:4.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:4.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:4.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:4.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:4.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:4.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:4.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:4.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:4.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:4.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:4.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:4.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:4.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:4.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:4.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:4.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:4.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:5.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:5.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:5.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:5.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:5.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:5.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:5.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:5.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:5.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:5.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:5.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:5.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:5.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:5.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:5.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:5.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:5.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:5.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:5.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:5.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:5.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:5.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:5.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:5.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:6.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:6.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:6.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:6.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:6.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:6.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:6.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:6.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:6.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:6.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:6.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:6.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:6.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:6.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:6.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:6.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:6.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:6.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:6.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:6.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:6.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:6.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:6.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:6.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:7.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:7.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:7.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:7.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:7.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:7.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:7.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:7.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:7.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:7.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:7.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:7.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:7.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:7.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:7.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:7.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:7.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:7.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:7.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:7.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:7.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:7.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:7.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:7.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:8.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:8.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:8.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:8.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:8.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:8.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:8.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:8.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:8.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:8.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:8.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:8.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:8.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:8.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:8.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:8.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:8.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:8.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:8.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:8.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:8.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:8.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:8.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:8.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:9.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:9.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:9.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:9.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:9.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:9.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:9.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:9.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:9.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:9.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:9.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:9.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:9.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:9.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:9.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:9.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:9.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:9.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:9.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:9.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:9.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:9.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:9.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:9.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:10.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:10.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:10.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:10.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:10.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:10.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:10.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:10.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:10.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:10.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:10.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:10.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:10.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:10.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:10.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:10.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:10.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:10.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:10.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:10.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:10.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:10.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:10.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:10.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:11.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:11.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:11.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:11.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:11.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:11.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:11.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:11.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:12.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:11.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:11.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:12.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:11.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:11.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:11.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:11.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:11.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:11.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:11.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:11.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:11.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:11.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:12.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:11.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:11.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:12.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:11.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:6.struct_blocks_y:11.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:1.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:1.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:1.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:1.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:1.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:1.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:1.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:1.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:1.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:1.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:1.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:1.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:1.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:1.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:1.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:1.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:1.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:1.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:1.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:1.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:1.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:1.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:1.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:1.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:1.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:1.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:1.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:1.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:2.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:2.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:2.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:2.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:2.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:2.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:2.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:2.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:2.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:2.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:2.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:2.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:2.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:2.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:2.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:2.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:2.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:2.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:2.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:2.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:2.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:2.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:2.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:2.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:3.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:3.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:3.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:3.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:3.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:3.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:3.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:3.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:3.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:3.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:3.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:3.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:3.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:3.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:3.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:3.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:3.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:3.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:3.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:3.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:3.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:3.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:3.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:3.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:4.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:4.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:4.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:4.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:4.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:4.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:4.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:4.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:4.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:4.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:4.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:4.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:4.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:4.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:4.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:4.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:4.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:4.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:4.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:4.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:4.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:4.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:4.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:4.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:5.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:5.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:5.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:5.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:5.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:5.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:5.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:5.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:5.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:5.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:5.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:5.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:5.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:5.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:5.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:5.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:5.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:5.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:5.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:5.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:5.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:5.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:5.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:5.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:6.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:6.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:6.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:6.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:6.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:6.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:6.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:6.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:6.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:6.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:6.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:6.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:6.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:6.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:6.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:6.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:6.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:6.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:6.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:6.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:6.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:6.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:6.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:6.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:7.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:7.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:7.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:7.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:7.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:7.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:7.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:7.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:7.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:7.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:7.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:7.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:7.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:7.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:7.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:7.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:7.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:7.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:7.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:7.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:7.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:7.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:7.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:7.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:8.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:8.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:8.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:8.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:8.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:8.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:8.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:8.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:8.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:8.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:8.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:8.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:8.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:8.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:8.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:8.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:8.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:8.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:8.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:8.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:8.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:8.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:8.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:8.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:9.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:9.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:9.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:9.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:9.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:9.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:9.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:9.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:9.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:9.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:9.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:9.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:9.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:9.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:9.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:9.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:9.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:9.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:9.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:9.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:9.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:9.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:9.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:9.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:10.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:10.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:10.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:10.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:10.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:10.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:10.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:10.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:10.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:10.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:10.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:10.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:10.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:10.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:10.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:10.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:10.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:10.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:10.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:10.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:10.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:10.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:10.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:10.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:11.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:11.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:11.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:11.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:11.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:11.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:11.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:11.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:12.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:11.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:11.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:12.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:11.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:11.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:11.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:11.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:11.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:11.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:11.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:11.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:11.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:11.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:12.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:11.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:11.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:12.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:11.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:7.struct_blocks_y:11.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:1.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:1.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:1.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:1.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:1.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:1.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:1.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:1.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:1.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:1.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:1.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:1.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:1.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:1.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:1.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:1.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:1.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:1.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:1.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:1.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:1.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:1.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:1.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:1.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:1.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:1.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:1.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:1.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:2.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:2.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:2.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:2.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:2.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:2.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:2.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:2.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:2.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:2.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:2.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:2.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:2.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:2.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:2.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:2.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:2.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:2.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:2.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:2.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:2.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:2.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:2.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:2.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:3.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:3.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:3.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:3.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:3.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:3.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:3.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:3.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:3.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:3.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:3.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:3.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:3.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:3.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:3.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:3.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:3.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:3.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:3.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:3.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:3.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:3.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:3.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:3.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:4.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:4.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:4.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:4.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:4.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:4.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:4.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:4.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:4.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:4.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:4.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:4.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:4.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:4.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:4.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:4.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:4.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:4.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:4.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:4.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:4.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:4.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:4.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:4.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:5.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:5.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:5.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:5.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:5.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:5.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:5.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:5.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:5.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:5.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:5.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:5.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:5.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:5.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:5.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:5.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:5.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:5.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:5.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:5.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:5.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:5.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:5.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:5.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:6.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:6.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:6.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:6.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:6.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:6.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:6.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:6.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:6.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:6.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:6.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:6.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:6.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:6.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:6.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:6.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:6.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:6.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:6.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:6.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:6.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:6.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:6.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:6.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:7.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:7.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:7.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:7.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:7.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:7.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:7.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:7.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:7.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:7.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:7.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:7.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:7.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:7.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:7.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:7.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:7.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:7.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:7.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:7.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:7.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:7.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:7.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:7.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:8.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:8.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:8.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:8.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:8.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:8.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:8.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:8.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:8.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:8.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:8.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:8.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:8.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:8.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:8.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:8.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:8.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:8.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:8.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:8.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:8.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:8.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:8.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:8.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:9.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:9.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:9.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:9.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:9.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:9.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:9.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:9.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:9.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:9.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:9.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:9.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:9.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:9.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:9.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:9.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:9.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:9.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:9.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:9.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:9.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:9.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:9.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:9.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:10.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:10.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:10.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:10.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:10.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:10.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:10.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:10.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:10.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:10.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:10.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:10.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:10.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:10.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:10.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:10.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:10.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:10.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:10.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:10.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:10.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:10.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:10.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:10.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:11.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:11.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:11.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:11.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:11.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:11.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:11.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:11.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:12.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:11.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:11.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:12.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:11.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:11.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:11.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:11.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:11.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:11.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:11.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:11.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:11.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:11.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:12.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:11.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:11.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:12.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:11.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:8.struct_blocks_y:11.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:1.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:1.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:1.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:1.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:1.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:1.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:1.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:1.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:1.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:1.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:1.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:1.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:1.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:1.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:1.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:1.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:1.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:1.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:1.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:1.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:1.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:1.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:1.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:1.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:1.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:1.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:1.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:1.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:2.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:2.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:2.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:2.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:2.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:2.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:2.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:2.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:2.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:2.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:2.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:2.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:2.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:2.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:2.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:2.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:2.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:2.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:2.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:2.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:2.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:2.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:2.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:2.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:3.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:3.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:3.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:3.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:3.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:3.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:3.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:3.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:3.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:3.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:3.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:3.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:3.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:3.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:3.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:3.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:3.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:3.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:3.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:3.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:3.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:3.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:3.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:3.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:4.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:4.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:4.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:4.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:4.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:4.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:4.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:4.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:4.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:4.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:4.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:4.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:4.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:4.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:4.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:4.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:4.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:4.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:4.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:4.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:4.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:4.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:4.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:4.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:5.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:5.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:5.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:5.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:5.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:5.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:5.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:5.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:5.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:5.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:5.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:5.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:5.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:5.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:5.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:5.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:5.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:5.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:5.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:5.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:5.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:5.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:5.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:5.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:6.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:6.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:6.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:6.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:6.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:6.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:6.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:6.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:6.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:6.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:6.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:6.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:6.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:6.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:6.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:6.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:6.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:6.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:6.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:6.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:6.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:6.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:6.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:6.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:7.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:7.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:7.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:7.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:7.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:7.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:7.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:7.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:7.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:7.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:7.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:7.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:7.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:7.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:7.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:7.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:7.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:7.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:7.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:7.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:7.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:7.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:7.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:7.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:8.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:8.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:8.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:8.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:8.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:8.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:8.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:8.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:8.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:8.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:8.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:8.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:8.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:8.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:8.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:8.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:8.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:8.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:8.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:8.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:8.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:8.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:8.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:8.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:9.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:9.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:9.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:9.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:9.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:9.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:9.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:9.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:9.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:9.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:9.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:9.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:9.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:9.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:9.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:9.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:9.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:9.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:9.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:9.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:9.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:9.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:9.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:9.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:10.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:10.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:10.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:10.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:10.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:10.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:10.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:10.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:10.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:10.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:10.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:10.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:10.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:10.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:10.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:10.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:10.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:10.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:10.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:10.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:10.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:10.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:10.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:10.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:11.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:11.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:11.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:11.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:11.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:11.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:11.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:11.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:12.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:11.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:11.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:12.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:11.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:11.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:11.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:11.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:11.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:11.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:11.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:11.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:11.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:11.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:12.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:11.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:11.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:12.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:11.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:9.struct_blocks_y:11.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:1.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:1.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:1.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:1.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:1.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:1.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:1.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:1.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:1.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:1.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:1.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:1.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:1.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:1.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:1.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:1.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:1.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:1.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:1.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:1.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:1.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:1.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:1.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:1.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:1.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:1.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:1.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:1.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:2.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:2.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:2.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:2.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:2.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:2.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:2.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:2.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:2.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:2.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:2.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:2.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:2.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:2.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:2.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:2.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:2.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:2.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:2.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:2.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:2.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:2.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:2.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:2.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:3.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:3.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:3.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:3.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:3.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:3.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:3.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:3.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:3.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:3.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:3.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:3.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:3.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:3.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:3.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:3.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:3.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:3.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:3.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:3.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:3.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:3.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:3.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:3.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:4.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:4.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:4.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:4.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:4.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:4.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:4.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:4.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:4.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:4.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:4.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:4.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:4.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:4.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:4.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:4.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:4.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:4.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:4.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:4.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:4.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:4.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:4.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:4.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:5.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:5.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:5.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:5.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:5.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:5.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:5.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:5.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:5.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:5.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:5.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:5.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:5.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:5.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:5.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:5.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:5.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:5.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:5.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:5.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:5.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:5.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:5.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:5.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:6.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:6.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:6.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:6.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:6.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:6.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:6.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:6.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:6.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:6.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:6.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:6.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:6.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:6.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:6.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:6.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:6.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:6.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:6.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:6.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:6.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:6.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:6.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:6.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:7.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:7.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:7.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:7.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:7.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:7.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:7.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:7.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:7.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:7.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:7.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:7.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:7.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:7.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:7.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:7.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:7.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:7.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:7.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:7.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:7.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:7.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:7.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:7.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:8.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:8.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:8.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:8.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:8.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:8.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:8.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:8.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:8.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:8.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:8.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:8.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:8.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:8.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:8.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:8.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:8.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:8.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:8.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:8.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:8.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:8.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:8.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:8.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:9.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:9.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:9.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:9.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:9.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:9.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:9.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:9.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:9.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:9.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:9.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:9.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:9.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:9.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:9.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:9.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:9.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:9.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:9.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:9.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:9.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:9.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:9.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:9.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:10.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:10.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:10.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:10.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:10.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:10.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:10.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:10.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:10.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:10.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:10.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:10.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:10.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:10.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:10.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:10.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:10.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:10.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:10.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:10.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:10.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:10.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:10.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:10.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:11.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:11.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:11.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:11.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:11.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:11.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:11.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:11.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:12.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:11.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:11.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:12.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:11.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:11.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:11.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:11.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:11.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:11.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:11.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:11.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:11.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:11.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:12.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:11.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:11.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:12.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:11.struct_block/input*_i]
+set_max_delay -ignore_clock_latency 0.05 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.struct_blocks_x:10.struct_blocks_y:11.struct_block/outputs_o*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+
+# Routing node internal && RN <-> RN constraints
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:1.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:1.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:1.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:2.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:1.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:1.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:1.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:1.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:1.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:2.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:2.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:2.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:3.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:2.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:2.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:2.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:2.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:1.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:2.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:3.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:3.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:3.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:4.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:3.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:3.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:3.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:3.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:2.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:3.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:4.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:4.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:4.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:5.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:4.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:4.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:4.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:4.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:3.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:4.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:5.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:5.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:5.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:6.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:5.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:5.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:5.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:5.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:4.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:5.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:6.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:6.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:6.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:7.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:6.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:6.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:6.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:6.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:5.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:6.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:7.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:7.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:7.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:8.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:7.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:7.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:7.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:7.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:6.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:7.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:8.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:8.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:8.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:9.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:8.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:8.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:8.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:8.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:7.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:8.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:9.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:9.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:9.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:10.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:9.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:9.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:9.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:9.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:8.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:9.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:10.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:10.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:10.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:11.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:10.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:10.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:10.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:10.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:9.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:10.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:11.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:11.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:11.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:12.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:11.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:11.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:11.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:10.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:11.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:1.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:1.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:1.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:1.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:1.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:1.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:1.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:1.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:1.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:1.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:1.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:1.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:1.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:2.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:1.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:1.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:1.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:2.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:1.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:1.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:1.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:1.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:1.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:1.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:2.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:1.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:2.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:2.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:2.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:3.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:2.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:2.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:2.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:3.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:2.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:2.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:2.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:1.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:2.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:2.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:3.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:2.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:3.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:3.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:3.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:4.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:3.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:3.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:3.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:4.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:3.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:3.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:3.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:2.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:3.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:3.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:4.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:3.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:4.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:4.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:4.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:5.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:4.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:4.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:4.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:5.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:4.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:4.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:4.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:3.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:4.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:4.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:5.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:4.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:5.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:5.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:5.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:6.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:5.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:5.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:5.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:6.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:5.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:5.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:5.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:4.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:5.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:5.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:6.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:5.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:6.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:6.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:6.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:7.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:6.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:6.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:6.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:7.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:6.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:6.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:6.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:5.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:6.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:6.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:7.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:6.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:7.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:7.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:7.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:8.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:7.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:7.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:7.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:8.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:7.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:7.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:7.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:6.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:7.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:7.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:8.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:7.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:8.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:8.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:8.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:9.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:8.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:8.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:8.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:9.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:8.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:8.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:8.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:7.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:8.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:8.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:9.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:8.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:9.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:9.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:9.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:10.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:9.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:9.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:9.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:10.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:9.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:9.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:9.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:8.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:9.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:9.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:10.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:9.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:10.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:10.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:10.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:11.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:10.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:10.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:10.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:11.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:10.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:10.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:10.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:9.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:10.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:10.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:11.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:10.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:11.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:11.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:11.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:12.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:11.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:12.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:12.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:12.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:12.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:12.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:12.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:11.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:11.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:11.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:11.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:10.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:11.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:11.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:12.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:12.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:12.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:1.vertical_routing_network_y:11.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:1.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:1.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:1.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:1.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:1.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:1.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:1.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:1.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:1.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:1.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:1.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:1.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:1.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:1.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:1.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:2.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:1.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:1.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:1.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:2.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:1.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:1.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:1.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:1.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:1.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:1.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:2.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:1.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:2.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:2.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:2.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:3.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:2.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:2.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:2.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:3.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:2.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:2.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:2.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:1.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:2.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:2.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:3.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:2.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:3.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:3.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:3.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:4.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:3.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:3.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:3.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:4.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:3.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:3.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:3.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:2.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:3.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:3.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:4.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:3.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:4.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:4.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:4.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:5.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:4.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:4.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:4.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:5.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:4.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:4.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:4.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:3.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:4.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:4.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:5.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:4.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:5.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:5.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:5.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:6.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:5.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:5.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:5.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:6.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:5.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:5.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:5.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:4.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:5.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:5.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:6.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:5.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:6.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:6.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:6.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:7.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:6.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:6.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:6.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:7.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:6.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:6.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:6.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:5.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:6.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:6.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:7.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:6.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:7.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:7.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:7.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:8.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:7.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:7.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:7.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:8.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:7.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:7.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:7.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:6.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:7.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:7.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:8.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:7.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:8.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:8.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:8.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:9.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:8.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:8.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:8.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:9.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:8.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:8.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:8.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:7.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:8.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:8.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:9.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:8.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:9.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:9.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:9.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:10.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:9.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:9.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:9.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:10.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:9.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:9.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:9.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:8.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:9.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:9.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:10.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:9.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:10.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:10.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:10.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:11.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:10.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:10.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:10.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:11.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:10.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:10.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:10.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:9.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:10.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:10.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:11.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:10.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:11.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:11.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:11.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:12.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:11.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:12.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:12.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:12.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:12.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:12.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:12.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:11.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:11.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:11.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:11.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:10.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:11.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:11.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:12.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:12.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:12.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:1.horizontal_routing_network_y:12.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:12.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:2.vertical_routing_network_y:11.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:1.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:1.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:1.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:1.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:1.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:1.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:1.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:1.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:1.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:1.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:1.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:1.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:1.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:1.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:1.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:2.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:1.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:1.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:1.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:2.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:1.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:1.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:1.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:1.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:1.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:1.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:2.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:1.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:2.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:2.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:2.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:3.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:2.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:2.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:2.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:3.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:2.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:2.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:2.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:1.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:2.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:2.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:3.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:2.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:3.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:3.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:3.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:4.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:3.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:3.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:3.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:4.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:3.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:3.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:3.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:2.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:3.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:3.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:4.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:3.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:4.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:4.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:4.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:5.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:4.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:4.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:4.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:5.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:4.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:4.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:4.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:3.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:4.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:4.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:5.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:4.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:5.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:5.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:5.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:6.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:5.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:5.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:5.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:6.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:5.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:5.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:5.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:4.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:5.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:5.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:6.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:5.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:6.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:6.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:6.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:7.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:6.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:6.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:6.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:7.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:6.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:6.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:6.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:5.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:6.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:6.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:7.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:6.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:7.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:7.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:7.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:8.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:7.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:7.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:7.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:8.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:7.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:7.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:7.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:6.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:7.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:7.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:8.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:7.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:8.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:8.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:8.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:9.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:8.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:8.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:8.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:9.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:8.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:8.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:8.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:7.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:8.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:8.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:9.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:8.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:9.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:9.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:9.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:10.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:9.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:9.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:9.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:10.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:9.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:9.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:9.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:8.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:9.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:9.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:10.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:9.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:10.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:10.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:10.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:11.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:10.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:10.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:10.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:11.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:10.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:10.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:10.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:9.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:10.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:10.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:11.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:10.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:11.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:11.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:11.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:12.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:11.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:12.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:12.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:12.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:12.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:12.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:12.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:11.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:11.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:11.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:11.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:10.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:11.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:11.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:12.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:12.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:12.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:2.horizontal_routing_network_y:12.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:12.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:3.vertical_routing_network_y:11.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:1.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:1.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:1.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:1.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:1.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:1.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:1.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:1.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:1.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:1.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:1.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:1.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:1.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:1.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:1.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:2.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:1.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:1.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:1.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:2.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:1.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:1.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:1.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:1.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:1.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:1.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:2.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:1.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:2.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:2.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:2.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:3.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:2.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:2.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:2.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:3.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:2.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:2.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:2.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:1.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:2.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:2.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:3.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:2.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:3.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:3.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:3.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:4.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:3.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:3.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:3.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:4.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:3.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:3.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:3.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:2.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:3.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:3.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:4.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:3.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:4.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:4.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:4.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:5.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:4.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:4.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:4.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:5.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:4.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:4.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:4.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:3.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:4.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:4.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:5.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:4.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:5.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:5.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:5.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:6.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:5.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:5.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:5.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:6.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:5.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:5.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:5.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:4.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:5.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:5.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:6.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:5.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:6.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:6.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:6.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:7.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:6.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:6.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:6.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:7.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:6.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:6.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:6.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:5.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:6.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:6.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:7.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:6.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:7.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:7.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:7.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:8.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:7.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:7.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:7.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:8.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:7.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:7.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:7.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:6.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:7.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:7.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:8.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:7.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:8.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:8.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:8.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:9.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:8.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:8.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:8.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:9.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:8.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:8.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:8.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:7.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:8.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:8.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:9.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:8.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:9.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:9.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:9.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:10.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:9.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:9.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:9.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:10.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:9.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:9.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:9.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:8.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:9.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:9.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:10.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:9.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:10.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:10.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:10.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:11.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:10.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:10.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:10.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:11.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:10.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:10.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:10.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:9.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:10.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:10.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:11.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:10.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:11.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:11.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:11.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:12.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:11.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:12.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:12.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:12.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:12.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:12.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:12.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:11.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:11.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:11.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:11.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:10.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:11.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:11.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:12.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:12.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:12.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:3.horizontal_routing_network_y:12.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:12.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:4.vertical_routing_network_y:11.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:1.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:1.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:1.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:1.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:1.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:1.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:1.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:1.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:1.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:1.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:1.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:1.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:1.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:1.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:1.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:2.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:1.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:1.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:1.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:2.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:1.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:1.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:1.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:1.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:1.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:1.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:2.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:1.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:2.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:2.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:2.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:3.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:2.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:2.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:2.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:3.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:2.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:2.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:2.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:1.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:2.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:2.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:3.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:2.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:3.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:3.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:3.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:4.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:3.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:3.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:3.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:4.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:3.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:3.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:3.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:2.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:3.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:3.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:4.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:3.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:4.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:4.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:4.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:5.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:4.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:4.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:4.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:5.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:4.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:4.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:4.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:3.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:4.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:4.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:5.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:4.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:5.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:5.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:5.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:6.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:5.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:5.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:5.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:6.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:5.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:5.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:5.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:4.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:5.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:5.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:6.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:5.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:6.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:6.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:6.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:7.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:6.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:6.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:6.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:7.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:6.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:6.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:6.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:5.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:6.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:6.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:7.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:6.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:7.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:7.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:7.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:8.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:7.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:7.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:7.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:8.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:7.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:7.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:7.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:6.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:7.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:7.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:8.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:7.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:8.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:8.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:8.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:9.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:8.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:8.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:8.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:9.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:8.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:8.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:8.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:7.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:8.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:8.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:9.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:8.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:9.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:9.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:9.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:10.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:9.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:9.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:9.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:10.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:9.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:9.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:9.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:8.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:9.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:9.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:10.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:9.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:10.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:10.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:10.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:11.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:10.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:10.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:10.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:11.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:10.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:10.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:10.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:9.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:10.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:10.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:11.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:10.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:11.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:11.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:11.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:12.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:11.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:12.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:12.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:12.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:12.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:12.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:12.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:11.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:11.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:11.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:11.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:10.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:11.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:11.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:12.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:12.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:12.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:4.horizontal_routing_network_y:12.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:12.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:5.vertical_routing_network_y:11.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:1.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:1.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:1.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:1.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:1.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:1.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:1.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:1.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:1.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:1.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:1.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:1.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:1.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:1.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:1.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:2.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:1.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:1.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:1.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:2.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:1.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:1.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:1.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:1.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:1.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:1.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:2.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:1.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:2.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:2.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:2.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:3.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:2.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:2.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:2.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:3.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:2.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:2.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:2.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:1.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:2.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:2.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:3.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:2.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:3.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:3.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:3.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:4.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:3.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:3.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:3.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:4.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:3.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:3.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:3.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:2.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:3.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:3.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:4.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:3.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:4.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:4.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:4.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:5.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:4.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:4.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:4.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:5.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:4.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:4.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:4.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:3.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:4.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:4.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:5.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:4.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:5.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:5.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:5.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:6.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:5.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:5.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:5.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:6.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:5.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:5.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:5.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:4.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:5.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:5.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:6.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:5.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:6.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:6.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:6.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:7.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:6.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:6.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:6.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:7.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:6.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:6.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:6.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:5.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:6.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:6.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:7.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:6.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:7.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:7.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:7.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:8.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:7.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:7.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:7.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:8.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:7.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:7.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:7.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:6.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:7.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:7.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:8.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:7.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:8.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:8.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:8.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:9.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:8.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:8.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:8.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:9.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:8.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:8.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:8.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:7.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:8.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:8.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:9.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:8.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:9.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:9.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:9.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:10.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:9.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:9.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:9.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:10.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:9.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:9.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:9.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:8.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:9.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:9.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:10.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:9.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:10.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:10.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:10.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:11.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:10.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:10.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:10.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:11.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:10.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:10.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:10.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:9.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:10.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:10.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:11.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:10.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:11.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:11.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:11.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:12.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:11.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:12.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:12.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:12.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:12.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:12.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:12.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:11.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:11.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:11.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:11.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:10.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:11.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:11.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:12.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:12.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:12.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:5.horizontal_routing_network_y:12.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:12.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:6.vertical_routing_network_y:11.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:1.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:1.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:1.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:1.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:1.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:1.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:1.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:1.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:1.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:1.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:1.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:1.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:1.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:1.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:1.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:2.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:1.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:1.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:1.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:2.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:1.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:1.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:1.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:1.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:1.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:1.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:2.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:1.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:2.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:2.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:2.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:3.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:2.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:2.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:2.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:3.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:2.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:2.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:2.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:1.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:2.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:2.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:3.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:2.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:3.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:3.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:3.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:4.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:3.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:3.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:3.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:4.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:3.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:3.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:3.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:2.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:3.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:3.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:4.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:3.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:4.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:4.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:4.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:5.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:4.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:4.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:4.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:5.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:4.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:4.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:4.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:3.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:4.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:4.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:5.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:4.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:5.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:5.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:5.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:6.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:5.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:5.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:5.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:6.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:5.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:5.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:5.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:4.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:5.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:5.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:6.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:5.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:6.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:6.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:6.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:7.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:6.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:6.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:6.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:7.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:6.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:6.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:6.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:5.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:6.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:6.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:7.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:6.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:7.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:7.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:7.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:8.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:7.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:7.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:7.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:8.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:7.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:7.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:7.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:6.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:7.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:7.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:8.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:7.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:8.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:8.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:8.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:9.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:8.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:8.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:8.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:9.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:8.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:8.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:8.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:7.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:8.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:8.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:9.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:8.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:9.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:9.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:9.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:10.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:9.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:9.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:9.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:10.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:9.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:9.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:9.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:8.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:9.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:9.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:10.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:9.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:10.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:10.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:10.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:11.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:10.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:10.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:10.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:11.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:10.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:10.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:10.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:9.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:10.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:10.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:11.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:10.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:11.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:11.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:11.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:12.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:11.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:12.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:12.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:12.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:12.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:12.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:12.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:11.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:11.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:11.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:11.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:10.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:11.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:11.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:12.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:12.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:12.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:6.horizontal_routing_network_y:12.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:12.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:7.vertical_routing_network_y:11.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:1.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:1.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:1.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:1.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:1.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:1.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:1.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:1.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:1.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:1.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:1.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:1.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:1.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:1.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:1.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:2.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:1.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:1.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:1.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:2.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:1.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:1.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:1.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:1.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:1.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:1.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:2.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:1.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:2.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:2.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:2.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:3.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:2.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:2.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:2.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:3.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:2.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:2.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:2.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:1.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:2.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:2.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:3.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:2.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:3.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:3.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:3.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:4.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:3.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:3.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:3.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:4.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:3.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:3.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:3.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:2.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:3.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:3.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:4.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:3.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:4.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:4.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:4.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:5.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:4.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:4.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:4.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:5.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:4.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:4.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:4.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:3.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:4.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:4.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:5.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:4.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:5.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:5.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:5.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:6.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:5.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:5.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:5.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:6.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:5.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:5.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:5.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:4.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:5.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:5.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:6.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:5.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:6.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:6.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:6.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:7.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:6.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:6.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:6.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:7.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:6.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:6.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:6.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:5.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:6.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:6.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:7.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:6.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:7.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:7.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:7.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:8.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:7.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:7.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:7.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:8.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:7.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:7.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:7.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:6.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:7.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:7.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:8.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:7.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:8.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:8.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:8.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:9.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:8.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:8.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:8.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:9.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:8.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:8.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:8.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:7.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:8.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:8.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:9.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:8.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:9.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:9.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:9.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:10.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:9.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:9.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:9.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:10.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:9.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:9.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:9.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:8.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:9.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:9.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:10.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:9.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:10.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:10.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:10.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:11.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:10.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:10.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:10.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:11.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:10.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:10.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:10.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:9.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:10.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:10.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:11.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:10.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:11.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:11.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:11.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:12.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:11.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:12.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:12.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:12.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:12.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:12.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:12.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:11.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:11.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:11.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:11.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:10.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:11.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:11.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:12.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:12.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:12.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:7.horizontal_routing_network_y:12.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:12.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:8.vertical_routing_network_y:11.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:1.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:1.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:1.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:1.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:1.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:1.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:1.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:1.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:1.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:1.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:1.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:1.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:1.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:1.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:1.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:2.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:1.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:1.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:1.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:2.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:1.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:1.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:1.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:1.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:1.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:1.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:2.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:1.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:2.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:2.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:2.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:3.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:2.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:2.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:2.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:3.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:2.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:2.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:2.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:1.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:2.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:2.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:3.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:2.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:3.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:3.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:3.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:4.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:3.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:3.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:3.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:4.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:3.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:3.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:3.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:2.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:3.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:3.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:4.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:3.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:4.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:4.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:4.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:5.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:4.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:4.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:4.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:5.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:4.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:4.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:4.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:3.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:4.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:4.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:5.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:4.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:5.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:5.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:5.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:6.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:5.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:5.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:5.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:6.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:5.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:5.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:5.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:4.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:5.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:5.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:6.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:5.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:6.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:6.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:6.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:7.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:6.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:6.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:6.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:7.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:6.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:6.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:6.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:5.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:6.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:6.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:7.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:6.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:7.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:7.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:7.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:8.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:7.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:7.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:7.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:8.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:7.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:7.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:7.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:6.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:7.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:7.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:8.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:7.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:8.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:8.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:8.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:9.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:8.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:8.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:8.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:9.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:8.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:8.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:8.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:7.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:8.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:8.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:9.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:8.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:9.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:9.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:9.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:10.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:9.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:9.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:9.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:10.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:9.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:9.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:9.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:8.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:9.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:9.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:10.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:9.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:10.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:10.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:10.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:11.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:10.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:10.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:10.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:11.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:10.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:10.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:10.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:9.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:10.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:10.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:11.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:10.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:11.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:11.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:11.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:12.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:11.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:12.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:12.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:12.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:12.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:12.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:12.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:11.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:11.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:11.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:11.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:10.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:11.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:11.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:12.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:12.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:12.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:8.horizontal_routing_network_y:12.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:12.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:9.vertical_routing_network_y:11.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:1.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:1.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:1.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:1.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:1.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:1.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:1.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:1.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:1.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:1.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:1.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:1.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:1.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:2.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:1.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:1.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:2.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:2.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:1.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:1.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:1.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:1.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:2.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:1.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:2.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:2.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:2.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:3.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:2.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:2.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:3.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:3.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:2.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:2.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:2.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:1.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:2.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:2.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:3.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:2.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:3.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:3.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:3.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:4.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:3.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:3.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:4.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:4.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:3.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:3.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:3.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:2.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:3.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:3.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:4.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:3.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:4.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:4.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:4.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:5.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:4.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:4.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:5.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:5.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:4.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:4.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:4.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:3.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:4.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:4.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:5.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:4.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:5.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:5.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:5.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:6.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:5.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:5.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:6.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:6.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:5.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:5.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:5.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:4.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:5.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:5.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:6.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:5.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:6.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:6.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:6.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:7.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:6.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:6.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:7.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:7.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:6.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:6.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:6.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:5.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:6.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:6.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:7.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:6.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:7.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:7.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:7.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:8.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:7.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:7.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:8.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:8.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:7.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:7.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:7.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:6.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:7.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:7.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:8.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:7.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:8.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:8.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:8.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:9.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:8.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:8.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:9.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:9.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:8.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:8.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:8.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:7.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:8.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:8.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:9.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:8.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:9.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:9.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:9.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:10.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:9.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:9.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:10.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:10.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:9.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:9.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:9.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:8.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:9.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:9.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:10.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:9.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:10.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:10.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:10.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:11.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:10.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:10.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:11.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:11.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:10.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:10.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:10.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:9.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:10.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:10.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:11.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:10.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:11.routing_node_up.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:11.routing_node_up.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:11.routing_node_up.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:12.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:12.routing_node_right.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:12.routing_node_right.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:12.routing_node_right.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:11.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:11.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:11.routing_node_down.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:11.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:10.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:11.vertical_routing_network_y:11.routing_node_down.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:11.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.7 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:12.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:12.routing_node_left.node.muxes:*.rnode_tfinish.tech_buf/$BUFOPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:12.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:9.horizontal_routing_network_y:12.routing_node_left.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 0.35 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.horizontal_routing_network_x:10.horizontal_routing_network_y:12.routing_node_left.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.vertical_routing_network_x:10.vertical_routing_network_y:11.routing_node_down.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+
+# From IO to routing nodes constraints
+set_max_delay -ignore_clock_latency 1.0 -from [get_ports io_in*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.*_routing_network_x:1.*_routing_network_y:*.routing_node_*.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 2.1 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.*_routing_network_x:1.*_routing_network_y:*.routing_node_*.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_ports io_out*]
+set_max_delay -ignore_clock_latency 1.0 -from [get_ports io_in*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.*_routing_network_x:11.*_routing_network_y:*.routing_node_*.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 2.1 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.*_routing_network_x:11.*_routing_network_y:*.routing_node_*.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_ports io_out*]
+set_max_delay -ignore_clock_latency 1.0 -from [get_ports io_in*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.*_routing_network_x:*.*_routing_network_y:1.routing_node_*.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 2.1 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.*_routing_network_x:*.*_routing_network_y:1.routing_node_*.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_ports io_out*]
+set_max_delay -ignore_clock_latency 1.0 -from [get_ports io_in*] -to [get_pins ariel_fpga_top_inst.fpga_fabric_inst.*_routing_network_x:*.*_routing_network_y:12.routing_node_*.node.muxes:*.bufs:*.rnode_in.tech_buf/$BUFIPIN]
+set_max_delay -ignore_clock_latency 2.1 -from [get_pins ariel_fpga_top_inst.fpga_fabric_inst.*_routing_network_x:*.*_routing_network_y:12.routing_node_*.node.muxes:*.rnode_tstart.tech_buf/$BUFIPIN] -to [get_ports io_out*]
+set_input_delay 0 -clock [get_clocks wb_clk_i] [get_ports wbs*_i]

diff --git a/verilog/gl/user_project_wrapper.v.gz b/verilog/gl/user_project_wrapper.v.gz
index 4b8f349..e0d9ba6 100644
--- a/verilog/gl/user_project_wrapper.v.gz
+++ b/verilog/gl/user_project_wrapper.v.gz
Binary files differ