Modified DV to get instant fail on read (vs counting read errors and waiting for timeout).
diff --git a/verilog/dv/wb_openram/wb_openram.c b/verilog/dv/wb_openram/wb_openram.c
index 1d04320..8ce3422 100644
--- a/verilog/dv/wb_openram/wb_openram.c
+++ b/verilog/dv/wb_openram/wb_openram.c
@@ -93,26 +93,23 @@
reg_mprj_datal = 0xAB600000;
// Fill memory
- for (address = 0; address < OPENRAM_SIZE_DWORDS; address += 32)
+ for (address = 0; address < OPENRAM_SIZE_DWORDS; address += 4)
{
// generate some dword based on address
OPENRAM_MEM(address) = generate_value(address);
}
// Check memory
- err_cnt = 0;
- for (address = 0; address < OPENRAM_SIZE_DWORDS; address += 32)
+ for (address = 0; address < OPENRAM_SIZE_DWORDS; address += 4)
{
// check dword based on address
if (OPENRAM_MEM(address) != generate_value(address))
{
- err_cnt++;
+ reg_mprj_datal = 0xAB61dead;
+ return; // instant fail
}
}
- if (err_cnt == 0)
- {
- reg_mprj_datal = 0xAB610000;
- }
+ reg_mprj_datal = 0xAB610000; // pass
}
diff --git a/verilog/dv/wb_openram/wb_openram_tb.v b/verilog/dv/wb_openram/wb_openram_tb.v
index c189538..c43f4ef 100644
--- a/verilog/dv/wb_openram/wb_openram_tb.v
+++ b/verilog/dv/wb_openram/wb_openram_tb.v
@@ -30,9 +30,11 @@
wire gpio;
wire [37:0] mprj_io;
- wire [15:0] checkbits;
+ wire [15:0] checkpoint;
+ wire [15:0] status;
- assign checkbits = mprj_io[31:16];
+ assign checkpoint = mprj_io[31:16];
+ assign status = mprj_io[15:0];
// External clock is used by default. Make this artificially fast for the
@@ -65,18 +67,27 @@
end
initial begin
- wait(checkbits == 16'h AB60);
+ wait(checkpoint == 16'h AB60);
`ifdef GL
$display("Monitor: Test OpenRAM Project IO (GL) Started");
`else
$display("Monitor: Test OpenRAM Project IO (RTL) Started");
`endif
- wait(checkbits == 16'h AB61);
- `ifdef GL
- $display("Monitor: Test OpenRAM Project IO (GL) Passed");
- `else
- $display("Monitor: Test OpenRAM Project IO (RTL) Passed");
- `endif
+ wait(checkpoint == 16'h AB61);
+ if (status == 16'h 0000) begin
+ `ifdef GL
+ $display("Monitor: Test OpenRAM Project IO (GL) Passed");
+ `else
+ $display("Monitor: Test OpenRAM Project IO (RTL) Passed");
+ `endif
+ end
+ else begin
+ `ifdef GL
+ $display("Monitor: Test OpenRAM Project IO (GL) Failed on read operation");
+ `else
+ $display("Monitor: Test OpenRAM Project IO (RTL) Failed on read operation");
+ `endif
+ end
$finish;
end
