| /root/8-bit_sar-adc_with_offset_calibration/Makefile |
| /root/8-bit_sar-adc_with_offset_calibration/docs/environment.yml |
| /root/8-bit_sar-adc_with_offset_calibration/docs/Makefile |
| /root/8-bit_sar-adc_with_offset_calibration/docs/source/index.rst |
| /root/8-bit_sar-adc_with_offset_calibration/docs/source/conf.py |
| /root/8-bit_sar-adc_with_offset_calibration/verilog/config.tcl |
| /root/8-bit_sar-adc_with_offset_calibration/verilog/dv/Makefile |
| /root/8-bit_sar-adc_with_offset_calibration/verilog/dv/mprj_por/mprj_por_tb.v |
| /root/8-bit_sar-adc_with_offset_calibration/verilog/dv/mprj_por/Makefile |
| /root/8-bit_sar-adc_with_offset_calibration/verilog/dv/mprj_por/mprj_por.c |
| /root/8-bit_sar-adc_with_offset_calibration/verilog/rtl/example_por.v |
| /root/8-bit_sar-adc_with_offset_calibration/verilog/rtl/uprj_analog_netlists.v |
| /root/8-bit_sar-adc_with_offset_calibration/verilog/rtl/user_analog_proj_example.v |
| /root/8-bit_sar-adc_with_offset_calibration/verilog/rtl/user_analog_project_wrapper.v |
| /root/8-bit_sar-adc_with_offset_calibration/verilog/src/sarlogic.v |
| /root/8-bit_sar-adc_with_offset_calibration/xschem/xschemrc |
| /root/8-bit_sar-adc_with_offset_calibration/xschem/user_analog_project_wrapper.sym |
| /root/8-bit_sar-adc_with_offset_calibration/xschem/user_analog_project_wrapper.sch |
| /root/8-bit_sar-adc_with_offset_calibration/xschem/.spiceinit |
| /root/8-bit_sar-adc_with_offset_calibration/xschem/xschem/scripts/sky130_models.tcl |
| /root/8-bit_sar-adc_with_offset_calibration/xschem/xschem/scripts/corner_preproc.sh |
| /root/8-bit_sar-adc_with_offset_calibration/xschem/xschem/scripts/get_pdk.sh |
| /root/8-bit_sar-adc_with_offset_calibration/xschem/tb/comparator/tran_comparator_trim.sch |
| /root/8-bit_sar-adc_with_offset_calibration/xschem/tb/sar/tr_sar.sch |
| /root/8-bit_sar-adc_with_offset_calibration/xschem/sar/unitcap/unitcap.sch |
| /root/8-bit_sar-adc_with_offset_calibration/xschem/sar/unitcap/unitcap.sym |
| /root/8-bit_sar-adc_with_offset_calibration/xschem/sar/sw/sw_top.sym |
| /root/8-bit_sar-adc_with_offset_calibration/xschem/sar/sw/sw_top.sch |
| /root/8-bit_sar-adc_with_offset_calibration/xschem/sar/dac/dac.sym |
| /root/8-bit_sar-adc_with_offset_calibration/xschem/sar/dac/carray.sym |
| /root/8-bit_sar-adc_with_offset_calibration/xschem/sar/dac/dac.sch |
| /root/8-bit_sar-adc_with_offset_calibration/xschem/sar/dac/carray.sch |
| /root/8-bit_sar-adc_with_offset_calibration/xschem/sar/control/sar_logic.sp |
| /root/8-bit_sar-adc_with_offset_calibration/xschem/sar/control/cmos_cells_digital.sp |
| /root/8-bit_sar-adc_with_offset_calibration/xschem/sar/latch/latch.sch |
| /root/8-bit_sar-adc_with_offset_calibration/xschem/sar/latch/latch.sym |
| /root/8-bit_sar-adc_with_offset_calibration/xschem/sar/comparator/comparator.sym |
| /root/8-bit_sar-adc_with_offset_calibration/xschem/sar/comparator/trim.sch |
| /root/8-bit_sar-adc_with_offset_calibration/xschem/sar/comparator/trim_pex.sp |
| /root/8-bit_sar-adc_with_offset_calibration/xschem/sar/comparator/trim.sym |
| /root/8-bit_sar-adc_with_offset_calibration/xschem/sar/comparator/comparator.sch |
| /root/8-bit_sar-adc_with_offset_calibration/xschem/sar/comparator/trimcap.sym |
| /root/8-bit_sar-adc_with_offset_calibration/xschem/sar/comparator/trimcap.sch |
| /root/8-bit_sar-adc_with_offset_calibration/xschem/sar/sar/sar.sym |
| /root/8-bit_sar-adc_with_offset_calibration/xschem/sar/sar/sar.sch |
| /root/8-bit_sar-adc_with_offset_calibration/openlane/Makefile |
| /root/8-bit_sar-adc_with_offset_calibration/netgen/run_lvs_wrapper_verilog.sh |
| /root/8-bit_sar-adc_with_offset_calibration/netgen/run_lvs_por.sh |
| /root/8-bit_sar-adc_with_offset_calibration/netgen/run_lvs_wrapper_xschem.sh |
