| commit | aa0cb00d81d0c83e9b84ca05eac4ef0d2e2e47c7 | [log] [tgz] |
|---|---|---|
| author | Dhayalakumar <61288836+dhayalakumarm@users.noreply.github.com> | Wed Oct 20 23:17:44 2021 +0530 |
| committer | GitHub <noreply@github.com> | Wed Oct 20 23:17:44 2021 +0530 |
| tree | a1ebaa6ab44e31abcefaf704551c085011a96b06 | |
| parent | 3f0e55298bcd5250d530bb89fcfff7b3472bbab2 [diff] |
Update README.md
This projects aims to design an high speed adder based on recursive doubling technique and fabricate at the SKY130nm technology node.
Inputs: in1, in2 each of 18 bits
Mode for add/sub selection
Output: Sum which is of 19 bits.